2 * Based on arch/arm/kernel/setup.c
4 * Copyright (C) 1995-2001 Russell King
5 * Copyright (C) 2012 ARM Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/export.h>
21 #include <linux/kernel.h>
22 #include <linux/stddef.h>
23 #include <linux/ioport.h>
24 #include <linux/delay.h>
25 #include <linux/utsname.h>
26 #include <linux/initrd.h>
27 #include <linux/console.h>
28 #include <linux/bootmem.h>
29 #include <linux/seq_file.h>
30 #include <linux/screen_info.h>
31 #include <linux/init.h>
32 #include <linux/kexec.h>
33 #include <linux/crash_dump.h>
34 #include <linux/root_dev.h>
35 #include <linux/clk-provider.h>
36 #include <linux/cpu.h>
37 #include <linux/interrupt.h>
38 #include <linux/smp.h>
40 #include <linux/proc_fs.h>
41 #include <linux/memblock.h>
42 #include <linux/of_fdt.h>
43 #include <linux/of_platform.h>
45 #include <asm/cputype.h>
47 #include <asm/cputable.h>
48 #include <asm/cpu_ops.h>
49 #include <asm/sections.h>
50 #include <asm/setup.h>
51 #include <asm/smp_plat.h>
52 #include <asm/cacheflush.h>
53 #include <asm/tlbflush.h>
54 #include <asm/traps.h>
55 #include <asm/memblock.h>
58 unsigned int processor_id;
59 EXPORT_SYMBOL(processor_id);
61 unsigned int elf_hwcap __read_mostly;
62 EXPORT_SYMBOL_GPL(elf_hwcap);
64 static const char *cpu_name;
65 static const char *machine_name;
66 phys_addr_t __fdt_pointer __initdata;
69 * Standard memory resources
71 static struct resource mem_res[] = {
73 .name = "Kernel code",
76 .flags = IORESOURCE_MEM
79 .name = "Kernel data",
82 .flags = IORESOURCE_MEM
86 #define kernel_code mem_res[0]
87 #define kernel_data mem_res[1]
89 void __init early_print(const char *str, ...)
95 vsnprintf(buf, sizeof(buf), str, ap);
101 void __init smp_setup_processor_id(void)
104 * clear __my_cpu_offset on boot CPU to avoid hang caused by
105 * using percpu variable early, for example, lockdep will
106 * access percpu variable inside lock_release
108 set_my_cpu_offset(0);
111 bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
113 return phys_id == cpu_logical_map(cpu);
116 struct mpidr_hash mpidr_hash;
119 * smp_build_mpidr_hash - Pre-compute shifts required at each affinity
120 * level in order to build a linear index from an
121 * MPIDR value. Resulting algorithm is a collision
122 * free hash carried out through shifting and ORing
124 static void __init smp_build_mpidr_hash(void)
126 u32 i, affinity, fs[4], bits[4], ls;
129 * Pre-scan the list of MPIDRS and filter out bits that do
130 * not contribute to affinity levels, ie they never toggle.
132 for_each_possible_cpu(i)
133 mask |= (cpu_logical_map(i) ^ cpu_logical_map(0));
134 pr_debug("mask of set bits %#llx\n", mask);
136 * Find and stash the last and first bit set at all affinity levels to
137 * check how many bits are required to represent them.
139 for (i = 0; i < 4; i++) {
140 affinity = MPIDR_AFFINITY_LEVEL(mask, i);
142 * Find the MSB bit and LSB bits position
143 * to determine how many bits are required
144 * to express the affinity level.
147 fs[i] = affinity ? ffs(affinity) - 1 : 0;
148 bits[i] = ls - fs[i];
151 * An index can be created from the MPIDR_EL1 by isolating the
152 * significant bits at each affinity level and by shifting
153 * them in order to compress the 32 bits values space to a
154 * compressed set of values. This is equivalent to hashing
155 * the MPIDR_EL1 through shifting and ORing. It is a collision free
156 * hash though not minimal since some levels might contain a number
157 * of CPUs that is not an exact power of 2 and their bit
158 * representation might contain holes, eg MPIDR_EL1[7:0] = {0x2, 0x80}.
160 mpidr_hash.shift_aff[0] = MPIDR_LEVEL_SHIFT(0) + fs[0];
161 mpidr_hash.shift_aff[1] = MPIDR_LEVEL_SHIFT(1) + fs[1] - bits[0];
162 mpidr_hash.shift_aff[2] = MPIDR_LEVEL_SHIFT(2) + fs[2] -
164 mpidr_hash.shift_aff[3] = MPIDR_LEVEL_SHIFT(3) +
165 fs[3] - (bits[2] + bits[1] + bits[0]);
166 mpidr_hash.mask = mask;
167 mpidr_hash.bits = bits[3] + bits[2] + bits[1] + bits[0];
168 pr_debug("MPIDR hash: aff0[%u] aff1[%u] aff2[%u] aff3[%u] mask[%#llx] bits[%u]\n",
169 mpidr_hash.shift_aff[0],
170 mpidr_hash.shift_aff[1],
171 mpidr_hash.shift_aff[2],
172 mpidr_hash.shift_aff[3],
176 * 4x is an arbitrary value used to warn on a hash table much bigger
177 * than expected on most systems.
179 if (mpidr_hash_size() > 4 * num_possible_cpus())
180 pr_warn("Large number of MPIDR hash buckets detected\n");
181 __flush_dcache_area(&mpidr_hash, sizeof(struct mpidr_hash));
185 static void __init setup_processor(void)
187 struct cpu_info *cpu_info;
190 * locate processor in the list of supported processor
191 * types. The linker builds this table for us from the
192 * entries in arch/arm/mm/proc.S
194 cpu_info = lookup_processor_type(read_cpuid_id());
196 printk("CPU configuration botched (ID %08x), unable to continue.\n",
201 cpu_name = cpu_info->cpu_name;
203 printk("CPU: %s [%08x] revision %d\n",
204 cpu_name, read_cpuid_id(), read_cpuid_id() & 15);
206 sprintf(init_utsname()->machine, "aarch64");
210 static void __init setup_machine_fdt(phys_addr_t dt_phys)
212 struct boot_param_header *devtree;
213 unsigned long dt_root;
215 /* Check we have a non-NULL DT pointer */
218 "Error: NULL or invalid device tree blob\n"
219 "The dtb must be 8-byte aligned and passed in the first 512MB of memory\n"
220 "\nPlease check your bootloader.\n");
227 devtree = phys_to_virt(dt_phys);
229 /* Check device tree validity */
230 if (be32_to_cpu(devtree->magic) != OF_DT_HEADER) {
232 "Error: invalid device tree blob at physical address 0x%p (virtual address 0x%p)\n"
233 "Expected 0x%x, found 0x%x\n"
234 "\nPlease check your bootloader.\n",
235 dt_phys, devtree, OF_DT_HEADER,
236 be32_to_cpu(devtree->magic));
242 initial_boot_params = devtree;
243 dt_root = of_get_flat_dt_root();
245 machine_name = of_get_flat_dt_prop(dt_root, "model", NULL);
247 machine_name = of_get_flat_dt_prop(dt_root, "compatible", NULL);
249 machine_name = "<unknown>";
250 pr_info("Machine: %s\n", machine_name);
252 /* Retrieve various information from the /chosen node */
253 of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line);
254 /* Initialize {size,address}-cells info */
255 of_scan_flat_dt(early_init_dt_scan_root, NULL);
256 /* Setup memory, calling early_init_dt_add_memory_arch */
257 of_scan_flat_dt(early_init_dt_scan_memory, NULL);
260 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
264 if (base + size < PHYS_OFFSET) {
265 pr_warning("Ignoring memory block 0x%llx - 0x%llx\n",
269 if (base < PHYS_OFFSET) {
270 pr_warning("Ignoring memory range 0x%llx - 0x%llx\n",
272 size -= PHYS_OFFSET - base;
275 memblock_add(base, size);
278 void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
280 return __va(memblock_alloc(size, align));
284 * Limit the memory size that was specified via FDT.
286 static int __init early_mem(char *p)
293 limit = memparse(p, &p) & PAGE_MASK;
294 pr_notice("Memory limited to %lldMB\n", limit >> 20);
296 memblock_enforce_memory_limit(limit);
300 early_param("mem", early_mem);
302 static void __init request_standard_resources(void)
304 struct memblock_region *region;
305 struct resource *res;
307 kernel_code.start = virt_to_phys(_text);
308 kernel_code.end = virt_to_phys(_etext - 1);
309 kernel_data.start = virt_to_phys(_sdata);
310 kernel_data.end = virt_to_phys(_end - 1);
312 for_each_memblock(memory, region) {
313 res = alloc_bootmem_low(sizeof(*res));
314 res->name = "System RAM";
315 res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
316 res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
317 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
319 request_resource(&iomem_resource, res);
321 if (kernel_code.start >= res->start &&
322 kernel_code.end <= res->end)
323 request_resource(res, &kernel_code);
324 if (kernel_data.start >= res->start &&
325 kernel_data.end <= res->end)
326 request_resource(res, &kernel_data);
330 u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID };
332 void __init setup_arch(char **cmdline_p)
336 setup_machine_fdt(__fdt_pointer);
338 init_mm.start_code = (unsigned long) _text;
339 init_mm.end_code = (unsigned long) _etext;
340 init_mm.end_data = (unsigned long) _edata;
341 init_mm.brk = (unsigned long) _end;
343 *cmdline_p = boot_command_line;
347 arm64_memblock_init();
350 request_standard_resources();
352 unflatten_device_tree();
356 cpu_logical_map(0) = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
357 cpu_read_bootcpu_ops();
360 smp_build_mpidr_hash();
364 #if defined(CONFIG_VGA_CONSOLE)
365 conswitchp = &vga_con;
366 #elif defined(CONFIG_DUMMY_CONSOLE)
367 conswitchp = &dummy_con;
372 static int __init arm64_device_init(void)
375 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
378 arch_initcall(arm64_device_init);
380 static DEFINE_PER_CPU(struct cpu, cpu_data);
382 static int __init topology_init(void)
386 for_each_possible_cpu(i) {
387 struct cpu *cpu = &per_cpu(cpu_data, i);
388 cpu->hotpluggable = 1;
389 register_cpu(cpu, i);
394 subsys_initcall(topology_init);
396 static const char *hwcap_str[] = {
402 static int c_show(struct seq_file *m, void *v)
406 seq_printf(m, "Processor\t: %s rev %d (%s)\n",
407 cpu_name, read_cpuid_id() & 15, ELF_PLATFORM);
409 for_each_online_cpu(i) {
411 * glibc reads /proc/cpuinfo to determine the number of
412 * online processors, looking for lines beginning with
413 * "processor". Give glibc what it expects.
416 seq_printf(m, "processor\t: %d\n", i);
418 seq_printf(m, "BogoMIPS\t: %lu.%02lu\n\n",
419 loops_per_jiffy / (500000UL/HZ),
420 loops_per_jiffy / (5000UL/HZ) % 100);
423 /* dump out the processor features */
424 seq_puts(m, "Features\t: ");
426 for (i = 0; hwcap_str[i]; i++)
427 if (elf_hwcap & (1 << i))
428 seq_printf(m, "%s ", hwcap_str[i]);
430 seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
431 seq_printf(m, "CPU architecture: AArch64\n");
432 seq_printf(m, "CPU variant\t: 0x%x\n", (read_cpuid_id() >> 20) & 15);
433 seq_printf(m, "CPU part\t: 0x%03x\n", (read_cpuid_id() >> 4) & 0xfff);
434 seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);
438 seq_printf(m, "Hardware\t: %s\n", machine_name);
443 static void *c_start(struct seq_file *m, loff_t *pos)
445 return *pos < 1 ? (void *)1 : NULL;
448 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
454 static void c_stop(struct seq_file *m, void *v)
458 const struct seq_operations cpuinfo_op = {