2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include <dt-bindings/sensor-dev.h>
46 #include "rk3399.dtsi"
47 #include "rk3399-android.dtsi"
48 #include "rk3399-opp.dtsi"
51 model = "Rockchip RK3399 VR Board";
52 compatible = "rockchip,vr", "rockchip,rk3399";
55 compatible = "pwm-regulator";
56 pwms = <&pwm2 0 25000 0>;
58 rockchip,pwm_voltage = <900000>;
59 regulator-name = "vdd_log";
60 regulator-min-microvolt = <800000>;
61 regulator-max-microvolt = <1400000>;
66 compatible = "regulator-fixed";
67 regulator-name = "vcc_sys";
70 regulator-min-microvolt = <4000000>;
71 regulator-max-microvolt = <4000000>;
73 vcc3v3_sys: vcc3v3-sys {
74 compatible = "regulator-fixed";
75 regulator-name = "vcc3v3_sys";
78 regulator-min-microvolt = <3300000>;
79 regulator-max-microvolt = <3300000>;
82 vcc5v0_host: vcc5v0-host-regulator {
83 compatible = "regulator-fixed";
85 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
86 pinctrl-names = "default";
87 pinctrl-0 = <&host_vbus_drv>;
88 regulator-name = "vcc5v0_host";
91 backlight: backlight {
92 compatible = "pwm-backlight";
93 pwms = <&pwm0 0 25000 0>;
97 16 17 18 19 20 21 22 23
98 24 25 26 27 28 29 30 31
99 32 33 34 35 36 37 38 39
100 40 41 42 43 44 45 46 47
101 48 49 50 51 52 53 54 55
102 56 57 58 59 60 61 62 63
103 64 65 66 67 68 69 70 71
104 72 73 74 75 76 77 78 79
105 80 81 82 83 84 85 86 87
106 88 89 90 91 92 93 94 95
107 96 97 98 99 100 101 102 103
108 104 105 106 107 108 109 110 111
109 112 113 114 115 116 117 118 119
110 120 121 122 123 124 125 126 127
111 128 129 130 131 132 133 134 135
112 136 137 138 139 140 141 142 143
113 144 145 146 147 148 149 150 151
114 152 153 154 155 156 157 158 159
115 160 161 162 163 164 165 166 167
116 168 169 170 171 172 173 174 175
117 176 177 178 179 180 181 182 183
118 184 185 186 187 188 189 190 191
119 192 193 194 195 196 197 198 199
120 200 201 202 203 204 205 206 207
121 208 209 210 211 212 213 214 215
122 216 217 218 219 220 221 222 223
123 224 225 226 227 228 229 230 231
124 232 233 234 235 236 237 238 239
125 240 241 242 243 244 245 246 247
126 248 249 250 251 252 253 254 255>;
127 default-brightness-level = <100>;
130 vcc_phy: vcc-phy-regulator {
131 compatible = "regulator-fixed";
132 regulator-name = "vcc_phy";
138 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
139 rockchip,grf = <&pmugrf>;
141 pmu1830-supply = <&vcc_1v8>;
145 compatible = "simple-audio-card";
146 simple-audio-card,format = "i2s";
147 simple-audio-card,name = "rockchip,es8316-codec";
148 simple-audio-card,mclk-fs = <256>;
149 simple-audio-card,widgets =
150 "Microphone", "Mic Jack",
151 "Headphone", "Headphone Jack";
152 simple-audio-card,routing =
153 "Mic Jack", "MICBIAS1",
155 "Headphone Jack", "HPOL",
156 "Headphone Jack", "HPOR";
157 simple-audio-card,cpu {
160 simple-audio-card,codec {
161 sound-dai = <&es8316>;
166 compatible = "simple-audio-card";
167 simple-audio-card,name = "rockchip,spdif";
168 simple-audio-card,cpu {
169 sound-dai = <&spdif>;
171 simple-audio-card,codec {
172 sound-dai = <&spdif_out>;
176 spdif_out: spdif-out {
177 compatible = "linux,spdif-dit";
178 #sound-dai-cells = <0>;
181 sdio_pwrseq: sdio-pwrseq {
182 compatible = "mmc-pwrseq-simple";
184 clock-names = "ext_clock";
185 pinctrl-names = "default";
186 pinctrl-0 = <&wifi_enable_h>;
189 * On the module itself this is one of these (depending
190 * on the actual card populated):
191 * - SDIO_RESET_L_WL_REG_ON
192 * - PDN (power down when low)
194 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
198 compatible = "wlan-platdata";
199 rockchip,grf = <&grf>;
200 wifi_chip_type = "ap6330";
202 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
207 compatible = "bluetooth-platdata";
209 clock-names = "ext_clock";
210 //wifi-bt-power-toggle;
211 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
212 pinctrl-names = "default", "rts_gpio";
213 pinctrl-0 = <&uart0_rts>;
214 pinctrl-1 = <&uart0_gpios>;
215 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
216 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
217 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
218 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
223 compatible = "rockchip,uboot-charge";
224 rockchip,uboot-charge-on = <0>;
225 rockchip,android-charge-on = <1>;
228 rk_vr_key: rockchip-vr-key {
229 compatible = "rockchip,key";
232 io-channels = <&saradc 1>;
236 label = "volume down";
237 rockchip,adc_value = <170>;
243 rockchip,adc_value = <340>;
249 rockchip,adc_value = <420>;
255 rockchip,adc_value = <520>;
259 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
268 rockchip,adc_value = <620>;
274 rockchip,adc_value = <700>;
280 rockchip,adc_value = <780>;
285 compatible = "rockchip_headset";
286 headset_gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
287 pinctrl-names = "default";
288 pinctrl-0 = <&hp_det>;
289 io-channels = <&saradc 2>;
294 clock-frequency = <150000000>;
295 clock-freq-min-max = <400000 150000000>;
303 vqmmc-supply = <&vcc_sd>;
304 pinctrl-names = "default";
305 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
310 clock-frequency = <50000000>;
311 clock-freq-min-max = <200000 50000000>;
317 keep-power-in-suspend;
318 mmc-pwrseq = <&sdio_pwrseq>;
321 pinctrl-names = "default";
322 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
336 keep-power-in-suspend;
337 mmc-hs400-enhanced-strobe;
343 rockchip,i2s-broken-burst-len;
344 rockchip,playback-channels = <8>;
345 rockchip,capture-channels = <8>;
346 #sound-dai-cells = <0>;
350 #sound-dai-cells = <0>;
356 bt656-supply = <&vcc1v8_dvp>;
357 audio-supply = <&vcca1v8_codec>;
358 sdmmc-supply = <&vcc_sd>;
359 gpio1830-supply = <&vcc_3v0>;
364 #sound-dai-cells = <0>;
369 i2c-scl-rising-time-ns = <219>;
370 i2c-scl-falling-time-ns = <15>;
371 clock-frequency = <400000>;
373 vdd_cpu_b: syr827@40 {
374 compatible = "silergy,syr827";
376 vin-supply = <&vcc_sys>;
377 regulator-compatible = "fan53555-reg";
378 pinctrl-0 = <&vsel1_gpio>;
379 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
380 regulator-name = "vdd_cpu_b";
381 regulator-min-microvolt = <712500>;
382 regulator-max-microvolt = <1500000>;
383 regulator-ramp-delay = <1000>;
384 fcs,suspend-voltage-selector = <1>;
386 regulator-initial-state = <3>;
387 regulator-state-mem {
388 regulator-off-in-suspend;
393 compatible = "silergy,syr828";
395 vin-supply = <&vcc_sys>;
396 regulator-compatible = "fan53555-reg";
397 pinctrl-0 = <&vsel2_gpio>;
398 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
399 regulator-name = "vdd_gpu";
400 regulator-min-microvolt = <712500>;
401 regulator-max-microvolt = <1500000>;
402 regulator-ramp-delay = <1000>;
403 fcs,suspend-voltage-selector = <1>;
405 regulator-initial-state = <3>;
406 regulator-initial-mode = <1>;/*1:pwm 2: auto mode*/
407 regulator-state-mem {
408 regulator-off-in-suspend;
413 compatible = "rockchip,rk818";
416 clock-output-names = "xin32k", "wifibt_32kin";
417 interrupt-parent = <&gpio1>;
418 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
419 pinctrl-names = "default";
420 pinctrl-0 = <&pmic_int_l>;
421 rockchip,system-power-controller;
426 vcc1-supply = <&vcc_sys>;
427 vcc2-supply = <&vcc_sys>;
428 vcc3-supply = <&vcc_sys>;
429 vcc4-supply = <&vcc_sys>;
430 vcc6-supply = <&vcc_sys>;
431 vcc7-supply = <&vcc3v3_sys>;
432 vcc8-supply = <&vcc_sys>;
433 vcc9-supply = <&vcc3v3_sys>;
436 vdd_cpu_l: DCDC_REG1 {
437 regulator-name = "vdd_cpu_l";
440 regulator-min-microvolt = <750000>;
441 regulator-max-microvolt = <1350000>;
442 regulator-ramp-delay = <6001>;
443 regulator-state-mem {
444 regulator-off-in-suspend;
448 vdd_center: DCDC_REG2 {
449 regulator-name = "vdd_center";
452 regulator-min-microvolt = <800000>;
453 regulator-max-microvolt = <1350000>;
454 regulator-ramp-delay = <6001>;
455 regulator-state-mem {
456 regulator-off-in-suspend;
461 regulator-name = "vcc_ddr";
464 regulator-state-mem {
465 regulator-on-in-suspend;
470 regulator-name = "vcc_1v8";
473 regulator-min-microvolt = <1800000>;
474 regulator-max-microvolt = <1800000>;
475 regulator-state-mem {
476 regulator-on-in-suspend;
477 regulator-suspend-microvolt = <1800000>;
481 vcca3v0_codec: LDO_REG1 {
484 regulator-min-microvolt = <3000000>;
485 regulator-max-microvolt = <3000000>;
486 regulator-name = "vcca3v0_codec";
487 regulator-state-mem {
488 regulator-off-in-suspend;
492 vcc3v0_tp: LDO_REG2 {
495 regulator-min-microvolt = <3000000>;
496 regulator-max-microvolt = <3000000>;
497 regulator-name = "vcc3v0_tp";
498 regulator-state-mem {
499 regulator-off-in-suspend;
503 vcca1v8_codec: LDO_REG3 {
506 regulator-min-microvolt = <1800000>;
507 regulator-max-microvolt = <1800000>;
508 regulator-name = "vcca1v8_codec";
509 regulator-state-mem {
510 regulator-off-in-suspend;
514 vcc_power_on: LDO_REG4 {
517 regulator-min-microvolt = <3300000>;
518 regulator-max-microvolt = <3300000>;
519 regulator-name = "vcc_power_on";
520 regulator-state-mem {
521 regulator-on-in-suspend;
522 regulator-suspend-microvolt = <3300000>;
529 regulator-min-microvolt = <3000000>;
530 regulator-max-microvolt = <3000000>;
531 regulator-name = "vcc_3v0";
532 regulator-state-mem {
533 regulator-on-in-suspend;
534 regulator-suspend-microvolt = <3000000>;
541 regulator-min-microvolt = <1500000>;
542 regulator-max-microvolt = <1500000>;
543 regulator-name = "vcc_1v5";
544 regulator-state-mem {
545 regulator-on-in-suspend;
546 regulator-suspend-microvolt = <1500000>;
550 vcc1v8_dvp: LDO_REG7 {
553 regulator-min-microvolt = <1800000>;
554 regulator-max-microvolt = <1800000>;
555 regulator-name = "vcc1v8_dvp";
556 regulator-state-mem {
557 regulator-on-in-suspend;
558 regulator-suspend-microvolt = <1800000>;
562 vcc3v3_s3: LDO_REG8 {
565 regulator-min-microvolt = <3300000>;
566 regulator-max-microvolt = <3300000>;
567 regulator-name = "vcc3v3_s3";
568 regulator-state-mem {
569 regulator-on-in-suspend;
570 regulator-suspend-microvolt = <3300000>;
577 regulator-min-microvolt = <1800000>;
578 regulator-max-microvolt = <3300000>;
579 regulator-name = "vcc_sd";
580 regulator-state-mem {
581 regulator-on-in-suspend;
582 regulator-suspend-microvolt = <3300000>;
586 vcc3v3_s0: SWITCH_REG {
589 regulator-name = "vcc3v3_s0";
590 regulator-state-mem {
591 regulator-on-in-suspend;
597 compatible = "rk818-battery";
599 3400 3599 3671 3701 3728 3746 3762
600 3772 3781 3792 3816 3836 3866 3910
601 3942 3971 4002 4050 4088 4132 4183>;
602 design_capacity = <4000>;
603 design_qmax = <4100>;
605 max_input_current = <2000>;
606 max_chrg_current = <1800>;
607 max_chrg_voltage = <4200>;
608 sleep_enter_current = <300>;
609 sleep_exit_current = <300>;
610 power_off_thresd = <3400>;
611 zero_algorithm_vol = <3850>;
612 fb_temperature = <115>;
614 max_soc_offset = <60>;
625 i2c-scl-rising-time-ns = <164>;
626 i2c-scl-falling-time-ns = <15>;
629 #sound-dai-cells = <0>;
630 compatible = "everest,es8316";
632 clocks = <&cru SCLK_I2S_8CH_OUT>;
633 clock-names = "mclk";
634 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
640 i2c-scl-rising-time-ns = <345>;
641 i2c-scl-falling-time-ns = <11>;
642 clock-frequency = <400000>;
646 compatible = "ak8963";
647 pinctrl-names = "default";
648 pinctrl-0 = <&ak8963_irq_gpio>;
650 type = <SENSOR_TYPE_COMPASS>;
651 irq-gpio = <&gpio1 0 IRQ_TYPE_EDGE_RISING>;
653 poll_delay_ms = <30>;
658 compatible = "fairchild,fusb302";
660 pinctrl-names = "default";
661 pinctrl-0 = <&fusb0_int>;
662 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
671 compatible = "gslX680";
673 touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
674 reset-gpio = <&gpio4 22 GPIO_ACTIVE_LOW>;
683 max-freq = <50000000>;
684 pinctrl-names = "default", "sleep";
685 pinctrl-1 = <&spi1_gpio>;
688 compatible = "inv-spi,mpu6500";
689 pinctrl-names = "default";
690 pinctrl-0 = <&mpu6500_irq_gpio>;
691 irq-gpio = <&gpio1 4 IRQ_TYPE_EDGE_RISING>;
693 spi-max-frequency = <1000000>;
696 mpu-int_config = <0x00>;
697 mpu-level_shifter = <0>;
698 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
702 support-hw-poweroff = <1>;
708 temperature = <70000>; /* millicelsius */
712 temperature = <85000>; /* millicelsius */
716 temperature = <100000>; /* millicelsius */
720 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
721 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
722 rockchip,hw-tshut-temp = <110000>;
734 u2phy0_otg: otg-port {
738 u2phy0_host: host-port {
739 phy-supply = <&vcc5v0_host>;
747 u2phy1_otg: otg-port {
751 u2phy1_host: host-port {
752 phy-supply = <&vcc5v0_host>;
758 pinctrl-names = "default";
759 pinctrl-0 = <&uart0_xfer &uart0_cts>;
814 rockchip,pwm_id= <3>;
815 rockchip,pwm_voltage = <900000>;
823 assigned-clocks = <&cru PLL_VPLL>;
824 assigned-clock-rates = <245000000>;
825 #include <dt-bindings/display/screen-timing/lcd-ls055r1sx04-mipi.dtsi>
829 rockchip,uboot-logo-on = <1>;
830 rockchip,disp-mode = <NO_DUAL>;
835 power_ctr: power_ctr {
837 rockchip,power_type = <GPIO>;
838 gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>;
839 rockchip,delay = <10>;
842 rockchip,power_type = <GPIO>;
843 gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
844 rockchip,delay = <10>;
862 cpu-supply = <&vdd_cpu_l>;
866 cpu-supply = <&vdd_cpu_l>;
870 cpu-supply = <&vdd_cpu_l>;
874 cpu-supply = <&vdd_cpu_l>;
878 cpu-supply = <&vdd_cpu_b>;
882 cpu-supply = <&vdd_cpu_b>;
887 mali-supply = <&vdd_gpu>;
892 wifi_enable_h: wifi-enable-h {
893 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
898 uart0_gpios: uart0-gpios {
899 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
904 pmic_int_l: pmic-int-l {
906 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
909 pmic_dvs2: pmic-dvs2 {
911 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
914 vsel1_gpio: vsel1-gpio {
916 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
919 vsel2_gpio: vsel2-gpio {
921 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
926 mpu6500_irq_gpio: mpu6500-irq-gpio {
927 rockchip,pins = <1 4 RK_FUNC_GPIO &pcfg_pull_none>;
932 host_vbus_drv: host-vbus-drv {
934 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
939 ak8963_irq_gpio: ak8963-irq-gpio {
940 rockchip,pins = <1 0 RK_FUNC_GPIO &pcfg_pull_none>;
945 spi1_gpio: spi1-gpio {
947 <1 7 RK_FUNC_GPIO &pcfg_output_low>,
948 <1 8 RK_FUNC_GPIO &pcfg_output_low>,
949 <1 9 RK_FUNC_GPIO &pcfg_output_low>,
950 <1 10 RK_FUNC_GPIO &pcfg_output_low>;
955 fusb0_int: fusb0-int {
956 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
962 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;