2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include "rk3399.dtsi"
46 #include "rk3399-android.dtsi"
49 model = "Rockchip RK3399 VR Board";
50 compatible = "rockchip,vr", "rockchip,rk3399";
53 compatible = "pwm-regulator";
54 pwms = <&pwm2 0 25000 0>;
56 rockchip,pwm_voltage = <900000>;
57 regulator-name = "vdd_log";
58 regulator-min-microvolt = <800000>;
59 regulator-max-microvolt = <1400000>;
64 compatible = "regulator-fixed";
65 regulator-name = "vcc_sys";
68 regulator-min-microvolt = <4000000>;
69 regulator-max-microvolt = <4000000>;
71 vcc3v3_sys: vcc3v3-sys {
72 compatible = "regulator-fixed";
73 regulator-name = "vcc3v3_sys";
76 regulator-min-microvolt = <3300000>;
77 regulator-max-microvolt = <3300000>;
80 vcc5v0_host: vcc5v0-host-regulator {
81 compatible = "regulator-fixed";
83 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
84 pinctrl-names = "default";
85 pinctrl-0 = <&host_vbus_drv>;
86 regulator-name = "vcc5v0_host";
89 backlight: backlight {
90 compatible = "pwm-backlight";
91 pwms = <&pwm0 0 25000 0>;
95 16 17 18 19 20 21 22 23
96 24 25 26 27 28 29 30 31
97 32 33 34 35 36 37 38 39
98 40 41 42 43 44 45 46 47
99 48 49 50 51 52 53 54 55
100 56 57 58 59 60 61 62 63
101 64 65 66 67 68 69 70 71
102 72 73 74 75 76 77 78 79
103 80 81 82 83 84 85 86 87
104 88 89 90 91 92 93 94 95
105 96 97 98 99 100 101 102 103
106 104 105 106 107 108 109 110 111
107 112 113 114 115 116 117 118 119
108 120 121 122 123 124 125 126 127
109 128 129 130 131 132 133 134 135
110 136 137 138 139 140 141 142 143
111 144 145 146 147 148 149 150 151
112 152 153 154 155 156 157 158 159
113 160 161 162 163 164 165 166 167
114 168 169 170 171 172 173 174 175
115 176 177 178 179 180 181 182 183
116 184 185 186 187 188 189 190 191
117 192 193 194 195 196 197 198 199
118 200 201 202 203 204 205 206 207
119 208 209 210 211 212 213 214 215
120 216 217 218 219 220 221 222 223
121 224 225 226 227 228 229 230 231
122 232 233 234 235 236 237 238 239
123 240 241 242 243 244 245 246 247
124 248 249 250 251 252 253 254 255>;
125 default-brightness-level = <100>;
128 vcc_phy: vcc-phy-regulator {
129 compatible = "regulator-fixed";
130 regulator-name = "vcc_phy";
136 compatible = "rockchip,rk3399-io-voltage-domain";
137 rockchip,grf = <&grf>;
139 bt656-supply = <&vcc1v8_dvp>;
140 audio-supply = <&vcca1v8_codec>;
141 sdmmc-supply = <&vcc_sd>;
142 gpio1830-supply = <&vcc_3v0>;
146 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
147 rockchip,grf = <&pmugrf>;
149 pmu1830-supply = <&vcc_1v8>;
153 compatible = "simple-audio-card";
154 simple-audio-card,format = "i2s";
155 simple-audio-card,name = "rockchip,es8316-codec";
156 simple-audio-card,mclk-fs = <256>;
157 simple-audio-card,widgets =
158 "Microphone", "Mic Jack",
159 "Headphone", "Headphone Jack";
160 simple-audio-card,routing =
161 "Mic Jack", "MICBIAS1",
163 "Headphone Jack", "HPOL",
164 "Headphone Jack", "HPOR";
165 simple-audio-card,cpu {
168 simple-audio-card,codec {
169 sound-dai = <&es8316>;
174 compatible = "simple-audio-card";
175 simple-audio-card,name = "rockchip,spdif";
176 simple-audio-card,cpu {
177 sound-dai = <&spdif>;
179 simple-audio-card,codec {
180 sound-dai = <&spdif_out>;
184 spdif_out: spdif-out {
185 compatible = "linux,spdif-dit";
186 #sound-dai-cells = <0>;
189 sdio_pwrseq: sdio-pwrseq {
190 compatible = "mmc-pwrseq-simple";
192 clock-names = "ext_clock";
193 pinctrl-names = "default";
194 pinctrl-0 = <&wifi_enable_h>;
197 * On the module itself this is one of these (depending
198 * on the actual card populated):
199 * - SDIO_RESET_L_WL_REG_ON
200 * - PDN (power down when low)
202 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
206 compatible = "wlan-platdata";
207 rockchip,grf = <&grf>;
208 wifi_chip_type = "ap6330";
210 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
215 compatible = "bluetooth-platdata";
216 //wifi-bt-power-toggle;
217 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
218 pinctrl-names = "default", "rts_gpio";
219 pinctrl-0 = <&uart0_rts>;
220 pinctrl-1 = <&uart0_gpios>;
221 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
222 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
223 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
224 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
230 clock-frequency = <150000000>;
231 clock-freq-min-max = <400000 150000000>;
239 vqmmc-supply = <&vcc_sd>;
240 pinctrl-names = "default";
241 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
246 clock-frequency = <50000000>;
247 clock-freq-min-max = <200000 50000000>;
253 keep-power-in-suspend;
254 mmc-pwrseq = <&sdio_pwrseq>;
257 pinctrl-names = "default";
258 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
264 freq-sel = <200000000>;
275 mmc-hs400-enhanced-strobe;
281 rockchip,i2s-broken-burst-len;
282 rockchip,playback-channels = <8>;
283 rockchip,capture-channels = <8>;
284 #sound-dai-cells = <0>;
288 #sound-dai-cells = <0>;
293 #sound-dai-cells = <0>;
298 i2c-scl-rising-time-ns = <219>;
299 i2c-scl-falling-time-ns = <15>;
300 clock-frequency = <400000>;
302 vdd_cpu_b: syr828@41 {
303 compatible = "silergy,syr828";
305 vin-supply = <&vcc_sys>;
306 regulator-compatible = "fan53555-reg";
307 regulator-name = "vdd_cpu_b";
308 regulator-min-microvolt = <712500>;
309 regulator-max-microvolt = <1500000>;
310 regulator-ramp-delay = <1000>;
311 fcs,suspend-voltage-selector = <1>;
314 regulator-initial-state = <3>;
315 regulator-state-mem {
316 regulator-off-in-suspend;
321 compatible = "ti,lp8752";
323 vin0-supply = <&vcc_sys>;
325 vdd_gpu: lp8752_buck0 {
326 regulator-name = "vdd_gpu";
327 regulator-min-microvolt = <735000>;
328 regulator-max-microvolt = <1400000>;
336 compatible = "rockchip,rk818";
339 clock-output-names = "xin32k", "wifibt_32kin";
340 interrupt-parent = <&gpio1>;
341 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
342 pinctrl-names = "default";
343 pinctrl-0 = <&pmic_int_l>;
344 rockchip,system-power-controller;
348 vcc1-supply = <&vcc_sys>;
349 vcc2-supply = <&vcc_sys>;
350 vcc3-supply = <&vcc_sys>;
351 vcc4-supply = <&vcc_sys>;
352 vcc6-supply = <&vcc_sys>;
353 vcc7-supply = <&vcc3v3_sys>;
354 vcc8-supply = <&vcc_sys>;
355 vcc9-supply = <&vcc3v3_sys>;
358 vdd_cpu_l: DCDC_REG1 {
359 regulator-name = "vdd_cpu_l";
362 regulator-min-microvolt = <750000>;
363 regulator-max-microvolt = <1350000>;
364 regulator-ramp-delay = <6001>;
365 regulator-state-mem {
366 regulator-off-in-suspend;
370 vdd_center: DCDC_REG2 {
371 regulator-name = "vdd_center";
374 regulator-min-microvolt = <800000>;
375 regulator-max-microvolt = <1350000>;
376 regulator-ramp-delay = <6001>;
377 regulator-state-mem {
378 regulator-on-in-suspend;
379 regulator-suspend-microvolt = <1000000>;
384 regulator-name = "vcc_ddr";
387 regulator-state-mem {
388 regulator-on-in-suspend;
393 regulator-name = "vcc_1v8";
396 regulator-min-microvolt = <1800000>;
397 regulator-max-microvolt = <1800000>;
398 regulator-state-mem {
399 regulator-on-in-suspend;
400 regulator-suspend-microvolt = <1800000>;
404 vcca3v0_codec: LDO_REG1 {
407 regulator-min-microvolt = <3000000>;
408 regulator-max-microvolt = <3000000>;
409 regulator-name = "vcca3v0_codec";
410 regulator-state-mem {
411 regulator-off-in-suspend;
415 vcc3v0_tp: LDO_REG2 {
418 regulator-min-microvolt = <3000000>;
419 regulator-max-microvolt = <3000000>;
420 regulator-name = "vcc3v0_tp";
421 regulator-state-mem {
422 regulator-off-in-suspend;
426 vcca1v8_codec: LDO_REG3 {
429 regulator-min-microvolt = <1800000>;
430 regulator-max-microvolt = <1800000>;
431 regulator-name = "vcca1v8_codec";
432 regulator-state-mem {
433 regulator-off-in-suspend;
437 vcc_power_on: LDO_REG4 {
440 regulator-min-microvolt = <3300000>;
441 regulator-max-microvolt = <3300000>;
442 regulator-name = "vcc_power_on";
443 regulator-state-mem {
444 regulator-on-in-suspend;
445 regulator-suspend-microvolt = <3300000>;
452 regulator-min-microvolt = <3000000>;
453 regulator-max-microvolt = <3000000>;
454 regulator-name = "vcc_3v0";
455 regulator-state-mem {
456 regulator-on-in-suspend;
457 regulator-suspend-microvolt = <3000000>;
464 regulator-min-microvolt = <1500000>;
465 regulator-max-microvolt = <1500000>;
466 regulator-name = "vcc_1v5";
467 regulator-state-mem {
468 regulator-on-in-suspend;
469 regulator-suspend-microvolt = <1500000>;
473 vcc1v8_dvp: LDO_REG7 {
476 regulator-min-microvolt = <1800000>;
477 regulator-max-microvolt = <1800000>;
478 regulator-name = "vcc1v8_dvp";
479 regulator-state-mem {
480 regulator-on-in-suspend;
481 regulator-suspend-microvolt = <1800000>;
485 vcc3v3_s3: LDO_REG8 {
488 regulator-min-microvolt = <3300000>;
489 regulator-max-microvolt = <3300000>;
490 regulator-name = "vcc3v3_s3";
491 regulator-state-mem {
492 regulator-on-in-suspend;
493 regulator-suspend-microvolt = <3300000>;
500 regulator-min-microvolt = <1800000>;
501 regulator-max-microvolt = <3300000>;
502 regulator-name = "vcc_sd";
503 regulator-state-mem {
504 regulator-on-in-suspend;
505 regulator-suspend-microvolt = <3300000>;
509 vcc3v3_s0: SWITCH_REG {
512 regulator-name = "vcc3v3_s0";
513 regulator-state-mem {
514 regulator-on-in-suspend;
523 i2c-scl-rising-time-ns = <164>;
524 i2c-scl-falling-time-ns = <15>;
527 #sound-dai-cells = <0>;
528 compatible = "everest,es8316";
530 clocks = <&cru SCLK_I2S_8CH_OUT>;
531 clock-names = "mclk";
532 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
533 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
539 i2c-scl-rising-time-ns = <600>;
540 i2c-scl-falling-time-ns = <20>;
544 compatible = "invensense,mpu6500";
545 pinctrl-names = "default";
546 pinctrl-0 = <&mpu6500_irq_gpio>;
548 irq-gpio = <&gpio1 4 IRQ_TYPE_EDGE_RISING>;
549 mpu-int_config = <0x10>;
550 mpu-level_shifter = <0>;
551 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
563 compatible = "gslX680";
565 touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
566 reset-gpio = <&gpio4 22 GPIO_ACTIVE_LOW>;
575 max-freq = <50000000>;
578 compatible = "inv-spi,mpu6500";
579 pinctrl-names = "default";
580 pinctrl-0 = <&mpu6500_irq_gpio>;
581 irq-gpio = <&gpio1 4 IRQ_TYPE_EDGE_RISING>;
583 spi-max-frequency = <1000000>;
586 mpu-int_config = <0x00>;
587 mpu-level_shifter = <0>;
588 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
597 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
598 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
607 compatible = "rockchip,key";
609 io-channels = <&saradc 1>;
614 rockchip,adc_value = <340>;
619 label = "volume down";
620 rockchip,adc_value = <170>;
624 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
633 rockchip,adc_value = <620>;
638 label = "brightness";
639 rockchip,adc_value = <700>;
646 u2phy0_host: host-port {
647 phy-supply = <&vcc5v0_host>;
655 u2phy1_host: host-port {
656 phy-supply = <&vcc5v0_host>;
662 pinctrl-names = "default";
663 pinctrl-0 = <&uart0_xfer &uart0_cts>;
712 rockchip,pwm_id= <3>;
713 rockchip,pwm_voltage = <900000>;
717 #include <dt-bindings/display/screen-timing/lcd-ls055r1sx04-mipi.dtsi>
722 power_ctr: power_ctr {
724 rockchip,power_type = <GPIO>;
725 gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>;
726 rockchip,delay = <10>;
729 rockchip,power_type = <GPIO>;
730 gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
731 rockchip,delay = <10>;
749 cpu-supply = <&vdd_cpu_l>;
753 cpu-supply = <&vdd_cpu_l>;
757 cpu-supply = <&vdd_cpu_l>;
761 cpu-supply = <&vdd_cpu_l>;
765 cpu-supply = <&vdd_cpu_b>;
769 cpu-supply = <&vdd_cpu_b>;
774 mali-supply = <&vdd_gpu>;
779 wifi_enable_h: wifi-enable-h {
780 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
785 uart0_gpios: uart0-gpios {
786 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
791 pmic_int_l: pmic-int-l {
793 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
796 pmic_dvs2: pmic-dvs2 {
798 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
803 mpu6500_irq_gpio: mpu6500-irq-gpio {
804 rockchip,pins = <1 4 RK_FUNC_GPIO &pcfg_pull_none>;
809 host_vbus_drv: host-vbus-drv {
811 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;