2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include <dt-bindings/sensor-dev.h>
46 #include "rk3399.dtsi"
47 #include "rk3399-android.dtsi"
48 #include "rk3399-opp.dtsi"
51 model = "Rockchip RK3399 VR Board";
52 compatible = "rockchip,vr", "rockchip,rk3399";
55 compatible = "pwm-regulator";
56 pwms = <&pwm2 0 25000 0>;
58 rockchip,pwm_voltage = <900000>;
59 regulator-name = "vdd_log";
60 regulator-min-microvolt = <800000>;
61 regulator-max-microvolt = <1400000>;
66 compatible = "regulator-fixed";
67 regulator-name = "vcc_sys";
70 regulator-min-microvolt = <4000000>;
71 regulator-max-microvolt = <4000000>;
73 vcc3v3_sys: vcc3v3-sys {
74 compatible = "regulator-fixed";
75 regulator-name = "vcc3v3_sys";
78 regulator-min-microvolt = <3300000>;
79 regulator-max-microvolt = <3300000>;
82 vcc5v0_host: vcc5v0-host-regulator {
83 compatible = "regulator-fixed";
85 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
86 pinctrl-names = "default";
87 pinctrl-0 = <&host_vbus_drv>;
88 regulator-name = "vcc5v0_host";
91 backlight: backlight {
92 compatible = "pwm-backlight";
93 pwms = <&pwm0 0 25000 0>;
97 16 17 18 19 20 21 22 23
98 24 25 26 27 28 29 30 31
99 32 33 34 35 36 37 38 39
100 40 41 42 43 44 45 46 47
101 48 49 50 51 52 53 54 55
102 56 57 58 59 60 61 62 63
103 64 65 66 67 68 69 70 71
104 72 73 74 75 76 77 78 79
105 80 81 82 83 84 85 86 87
106 88 89 90 91 92 93 94 95
107 96 97 98 99 100 101 102 103
108 104 105 106 107 108 109 110 111
109 112 113 114 115 116 117 118 119
110 120 121 122 123 124 125 126 127
111 128 129 130 131 132 133 134 135
112 136 137 138 139 140 141 142 143
113 144 145 146 147 148 149 150 151
114 152 153 154 155 156 157 158 159
115 160 161 162 163 164 165 166 167
116 168 169 170 171 172 173 174 175
117 176 177 178 179 180 181 182 183
118 184 185 186 187 188 189 190 191
119 192 193 194 195 196 197 198 199
120 200 201 202 203 204 205 206 207
121 208 209 210 211 212 213 214 215
122 216 217 218 219 220 221 222 223
123 224 225 226 227 228 229 230 231
124 232 233 234 235 236 237 238 239
125 240 241 242 243 244 245 246 247
126 248 249 250 251 252 253 254 255>;
127 default-brightness-level = <100>;
130 vcc_phy: vcc-phy-regulator {
131 compatible = "regulator-fixed";
132 regulator-name = "vcc_phy";
138 compatible = "simple-audio-card";
139 simple-audio-card,format = "i2s";
140 simple-audio-card,name = "rockchip,es8316-codec";
141 simple-audio-card,mclk-fs = <256>;
142 simple-audio-card,widgets =
143 "Microphone", "Mic Jack",
144 "Headphone", "Headphone Jack";
145 simple-audio-card,routing =
146 "Mic Jack", "MICBIAS1",
148 "Headphone Jack", "HPOL",
149 "Headphone Jack", "HPOR";
150 simple-audio-card,cpu {
153 simple-audio-card,codec {
154 sound-dai = <&es8316>;
159 compatible = "simple-audio-card";
160 simple-audio-card,name = "rockchip,spdif";
161 simple-audio-card,cpu {
162 sound-dai = <&spdif>;
164 simple-audio-card,codec {
165 sound-dai = <&spdif_out>;
169 spdif_out: spdif-out {
170 compatible = "linux,spdif-dit";
171 #sound-dai-cells = <0>;
174 sdio_pwrseq: sdio-pwrseq {
175 compatible = "mmc-pwrseq-simple";
177 clock-names = "ext_clock";
178 pinctrl-names = "default";
179 pinctrl-0 = <&wifi_enable_h>;
182 * On the module itself this is one of these (depending
183 * on the actual card populated):
184 * - SDIO_RESET_L_WL_REG_ON
185 * - PDN (power down when low)
187 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
191 compatible = "wlan-platdata";
192 rockchip,grf = <&grf>;
193 wifi_chip_type = "ap6330";
195 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
200 compatible = "bluetooth-platdata";
202 clock-names = "ext_clock";
203 //wifi-bt-power-toggle;
204 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
205 pinctrl-names = "default", "rts_gpio";
206 pinctrl-0 = <&uart0_rts>;
207 pinctrl-1 = <&uart0_gpios>;
208 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
209 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
210 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
211 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
216 compatible = "rockchip,uboot-charge";
217 rockchip,uboot-charge-on = <0>;
218 rockchip,android-charge-on = <1>;
221 rk_vr_key: rockchip-vr-key {
222 compatible = "rockchip,key";
225 io-channels = <&saradc 1>;
229 label = "volume down";
230 rockchip,adc_value = <170>;
236 rockchip,adc_value = <340>;
242 rockchip,adc_value = <420>;
248 rockchip,adc_value = <520>;
252 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
261 rockchip,adc_value = <620>;
267 rockchip,adc_value = <700>;
273 rockchip,adc_value = <780>;
278 compatible = "rockchip_headset";
279 headset_gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
280 pinctrl-names = "default";
281 pinctrl-0 = <&hp_det>;
282 io-channels = <&saradc 2>;
287 clock-frequency = <150000000>;
288 clock-freq-min-max = <400000 150000000>;
296 vqmmc-supply = <&vcc_sd>;
297 pinctrl-names = "default";
298 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
303 clock-frequency = <50000000>;
304 clock-freq-min-max = <200000 50000000>;
310 keep-power-in-suspend;
311 mmc-pwrseq = <&sdio_pwrseq>;
314 pinctrl-names = "default";
315 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
329 keep-power-in-suspend;
330 mmc-hs400-enhanced-strobe;
336 rockchip,i2s-broken-burst-len;
337 rockchip,playback-channels = <8>;
338 rockchip,capture-channels = <8>;
339 #sound-dai-cells = <0>;
343 #sound-dai-cells = <0>;
349 bt656-supply = <&vcc1v8_dvp>;
350 audio-supply = <&vcca1v8_codec>;
351 sdmmc-supply = <&vcc_sd>;
352 gpio1830-supply = <&vcc_3v0>;
357 #sound-dai-cells = <0>;
362 i2c-scl-rising-time-ns = <219>;
363 i2c-scl-falling-time-ns = <15>;
364 clock-frequency = <400000>;
366 vdd_cpu_b: syr827@40 {
367 compatible = "silergy,syr827";
369 vin-supply = <&vcc_sys>;
370 regulator-compatible = "fan53555-reg";
371 pinctrl-0 = <&vsel1_gpio>;
372 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
373 regulator-name = "vdd_cpu_b";
374 regulator-min-microvolt = <712500>;
375 regulator-max-microvolt = <1500000>;
376 regulator-ramp-delay = <1000>;
377 fcs,suspend-voltage-selector = <1>;
379 regulator-initial-state = <3>;
380 regulator-state-mem {
381 regulator-off-in-suspend;
386 compatible = "silergy,syr828";
388 vin-supply = <&vcc_sys>;
389 regulator-compatible = "fan53555-reg";
390 pinctrl-0 = <&vsel2_gpio>;
391 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
392 regulator-name = "vdd_gpu";
393 regulator-min-microvolt = <712500>;
394 regulator-max-microvolt = <1500000>;
395 regulator-ramp-delay = <1000>;
396 fcs,suspend-voltage-selector = <1>;
398 regulator-initial-state = <3>;
399 regulator-initial-mode = <1>;/*1:pwm 2: auto mode*/
400 regulator-state-mem {
401 regulator-off-in-suspend;
406 compatible = "rockchip,rk818";
409 clock-output-names = "xin32k", "wifibt_32kin";
410 interrupt-parent = <&gpio1>;
411 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
412 pinctrl-names = "default";
413 pinctrl-0 = <&pmic_int_l>;
414 rockchip,system-power-controller;
419 vcc1-supply = <&vcc_sys>;
420 vcc2-supply = <&vcc_sys>;
421 vcc3-supply = <&vcc_sys>;
422 vcc4-supply = <&vcc_sys>;
423 vcc6-supply = <&vcc_sys>;
424 vcc7-supply = <&vcc3v3_sys>;
425 vcc8-supply = <&vcc_sys>;
426 vcc9-supply = <&vcc3v3_sys>;
429 vdd_cpu_l: DCDC_REG1 {
430 regulator-name = "vdd_cpu_l";
433 regulator-min-microvolt = <750000>;
434 regulator-max-microvolt = <1350000>;
435 regulator-ramp-delay = <6001>;
436 regulator-state-mem {
437 regulator-off-in-suspend;
441 vdd_center: DCDC_REG2 {
442 regulator-name = "vdd_center";
445 regulator-min-microvolt = <800000>;
446 regulator-max-microvolt = <1350000>;
447 regulator-ramp-delay = <6001>;
448 regulator-state-mem {
449 regulator-off-in-suspend;
454 regulator-name = "vcc_ddr";
457 regulator-state-mem {
458 regulator-on-in-suspend;
463 regulator-name = "vcc_1v8";
466 regulator-min-microvolt = <1800000>;
467 regulator-max-microvolt = <1800000>;
468 regulator-state-mem {
469 regulator-on-in-suspend;
470 regulator-suspend-microvolt = <1800000>;
474 vcca3v0_codec: LDO_REG1 {
477 regulator-min-microvolt = <3000000>;
478 regulator-max-microvolt = <3000000>;
479 regulator-name = "vcca3v0_codec";
480 regulator-state-mem {
481 regulator-off-in-suspend;
485 vcc3v0_tp: LDO_REG2 {
488 regulator-min-microvolt = <3000000>;
489 regulator-max-microvolt = <3000000>;
490 regulator-name = "vcc3v0_tp";
491 regulator-state-mem {
492 regulator-off-in-suspend;
496 vcca1v8_codec: LDO_REG3 {
499 regulator-min-microvolt = <1800000>;
500 regulator-max-microvolt = <1800000>;
501 regulator-name = "vcca1v8_codec";
502 regulator-state-mem {
503 regulator-off-in-suspend;
507 vcc_power_on: LDO_REG4 {
510 regulator-min-microvolt = <3300000>;
511 regulator-max-microvolt = <3300000>;
512 regulator-name = "vcc_power_on";
513 regulator-state-mem {
514 regulator-on-in-suspend;
515 regulator-suspend-microvolt = <3300000>;
522 regulator-min-microvolt = <3000000>;
523 regulator-max-microvolt = <3000000>;
524 regulator-name = "vcc_3v0";
525 regulator-state-mem {
526 regulator-on-in-suspend;
527 regulator-suspend-microvolt = <3000000>;
534 regulator-min-microvolt = <1500000>;
535 regulator-max-microvolt = <1500000>;
536 regulator-name = "vcc_1v5";
537 regulator-state-mem {
538 regulator-on-in-suspend;
539 regulator-suspend-microvolt = <1500000>;
543 vcc1v8_dvp: LDO_REG7 {
546 regulator-min-microvolt = <1800000>;
547 regulator-max-microvolt = <1800000>;
548 regulator-name = "vcc1v8_dvp";
549 regulator-state-mem {
550 regulator-on-in-suspend;
551 regulator-suspend-microvolt = <1800000>;
555 vcc3v3_s3: LDO_REG8 {
558 regulator-min-microvolt = <3300000>;
559 regulator-max-microvolt = <3300000>;
560 regulator-name = "vcc3v3_s3";
561 regulator-state-mem {
562 regulator-on-in-suspend;
563 regulator-suspend-microvolt = <3300000>;
570 regulator-min-microvolt = <1800000>;
571 regulator-max-microvolt = <3300000>;
572 regulator-name = "vcc_sd";
573 regulator-state-mem {
574 regulator-on-in-suspend;
575 regulator-suspend-microvolt = <3300000>;
579 vcc3v3_s0: SWITCH_REG {
582 regulator-name = "vcc3v3_s0";
583 regulator-state-mem {
584 regulator-on-in-suspend;
590 compatible = "rk818-battery";
592 3400 3599 3671 3701 3728 3746 3762
593 3772 3781 3792 3816 3836 3866 3910
594 3942 3971 4002 4050 4088 4132 4183>;
595 design_capacity = <4000>;
596 design_qmax = <4100>;
598 max_input_current = <2000>;
599 max_chrg_current = <1800>;
600 max_chrg_voltage = <4200>;
601 sleep_enter_current = <300>;
602 sleep_exit_current = <300>;
603 power_off_thresd = <3400>;
604 zero_algorithm_vol = <3850>;
605 fb_temperature = <115>;
607 max_soc_offset = <60>;
618 i2c-scl-rising-time-ns = <164>;
619 i2c-scl-falling-time-ns = <15>;
622 #sound-dai-cells = <0>;
623 compatible = "everest,es8316";
625 clocks = <&cru SCLK_I2S_8CH_OUT>;
626 clock-names = "mclk";
627 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
633 i2c-scl-rising-time-ns = <345>;
634 i2c-scl-falling-time-ns = <11>;
635 clock-frequency = <400000>;
639 compatible = "ak8963";
640 pinctrl-names = "default";
641 pinctrl-0 = <&ak8963_irq_gpio>;
643 type = <SENSOR_TYPE_COMPASS>;
644 irq-gpio = <&gpio1 0 IRQ_TYPE_EDGE_RISING>;
646 poll_delay_ms = <30>;
651 compatible = "fairchild,fusb302";
653 pinctrl-names = "default";
654 pinctrl-0 = <&fusb0_int>;
655 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
664 compatible = "gslX680";
666 touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
667 reset-gpio = <&gpio4 22 GPIO_ACTIVE_LOW>;
676 max-freq = <50000000>;
677 pinctrl-names = "default", "sleep";
678 pinctrl-1 = <&spi1_gpio>;
681 compatible = "inv-spi,mpu6500";
682 pinctrl-names = "default";
683 pinctrl-0 = <&mpu6500_irq_gpio>;
684 irq-gpio = <&gpio1 4 IRQ_TYPE_EDGE_RISING>;
686 spi-max-frequency = <1000000>;
689 mpu-int_config = <0x00>;
690 mpu-level_shifter = <0>;
691 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
695 support-hw-poweroff = <1>;
701 temperature = <70000>; /* millicelsius */
705 temperature = <85000>; /* millicelsius */
709 temperature = <100000>; /* millicelsius */
713 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
714 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
715 rockchip,hw-tshut-temp = <110000>;
727 u2phy0_otg: otg-port {
731 u2phy0_host: host-port {
732 phy-supply = <&vcc5v0_host>;
740 u2phy1_otg: otg-port {
744 u2phy1_host: host-port {
745 phy-supply = <&vcc5v0_host>;
751 pinctrl-names = "default";
752 pinctrl-0 = <&uart0_xfer &uart0_cts>;
807 rockchip,pwm_id= <3>;
808 rockchip,pwm_voltage = <900000>;
816 assigned-clocks = <&cru PLL_VPLL>;
817 assigned-clock-rates = <245000000>;
818 #include <dt-bindings/display/screen-timing/lcd-ls055r1sx04-mipi.dtsi>
822 rockchip,uboot-logo-on = <1>;
823 rockchip,disp-mode = <NO_DUAL>;
828 power_ctr: power_ctr {
830 rockchip,power_type = <GPIO>;
831 gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>;
832 rockchip,delay = <10>;
835 rockchip,power_type = <GPIO>;
836 gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
837 rockchip,delay = <10>;
855 cpu-supply = <&vdd_cpu_l>;
859 cpu-supply = <&vdd_cpu_l>;
863 cpu-supply = <&vdd_cpu_l>;
867 cpu-supply = <&vdd_cpu_l>;
871 cpu-supply = <&vdd_cpu_b>;
875 cpu-supply = <&vdd_cpu_b>;
880 mali-supply = <&vdd_gpu>;
885 wifi_enable_h: wifi-enable-h {
886 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
891 uart0_gpios: uart0-gpios {
892 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
897 pmic_int_l: pmic-int-l {
899 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
902 pmic_dvs2: pmic-dvs2 {
904 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
907 vsel1_gpio: vsel1-gpio {
909 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
912 vsel2_gpio: vsel2-gpio {
914 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
919 mpu6500_irq_gpio: mpu6500-irq-gpio {
920 rockchip,pins = <1 4 RK_FUNC_GPIO &pcfg_pull_none>;
925 host_vbus_drv: host-vbus-drv {
927 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
932 ak8963_irq_gpio: ak8963-irq-gpio {
933 rockchip,pins = <1 0 RK_FUNC_GPIO &pcfg_pull_none>;
938 spi1_gpio: spi1-gpio {
940 <1 7 RK_FUNC_GPIO &pcfg_output_low>,
941 <1 8 RK_FUNC_GPIO &pcfg_output_low>,
942 <1 9 RK_FUNC_GPIO &pcfg_output_low>,
943 <1 10 RK_FUNC_GPIO &pcfg_output_low>;
948 fusb0_int: fusb0-int {
949 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
955 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;
970 pmu1830-supply = <&vcc_1v8>;