arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 #include "dt-bindings/pwm/pwm.h"
  44 #include "rk3399.dtsi"
  45
  46 / {
  47         compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399";
  48
  49         clkin_gmac: external-gmac-clock {
  50                 compatible = "fixed-clock";
  51                 clock-frequency = <125000000>;
  52                 clock-output-names = "clkin_gmac";
  53                 #clock-cells = <0>;
  54         };
  55
  56         dw_hdmi_audio: dw-hdmi-audio {
  57                 status = "okay";
  58                 compatible = "rockchip,dw-hdmi-audio";
  59                 #sound-dai-cells = <0>;
  60         };
  61
  62         hdmi_sound: hdmi-sound {
  63                 status = "okay";
  64                 compatible = "simple-audio-card";
  65                 simple-audio-card,format = "i2s";
  66                 simple-audio-card,mclk-fs = <256>;
  67                 simple-audio-card,name = "rockchip,hdmi";
  68
  69                 simple-audio-card,cpu {
  70                         sound-dai = <&i2s2>;
  71                 };
  72                 simple-audio-card,codec {
  73                         sound-dai = <&dw_hdmi_audio>;
  74                 };
  75         };
  76
  77         io-domains {
  78                 compatible = "rockchip,rk3399-io-voltage-domain";
  79                 rockchip,grf = <&grf>;
  80
  81                 bt656-supply = <&vcc_3v0>;              /* bt656_gpio2ab_ms */
  82                 audio-supply = <&vcca1v8_codec>;        /* audio_gpio3d4a_ms */
  83                 sdmmc-supply = <&vcc_sd>;               /* sdmmc_gpio4b_ms */
  84                 gpio1830-supply = <&vcc_3v0>;           /* gpio1833_gpio4cd_ms */
  85         };
  86
  87         pmu-io-domains {
  88                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
  89                 rockchip,grf = <&pmugrf>;
  90                 pmu1830-supply = <&vcc_3v0>;
  91         };
  92
  93         sdio_pwrseq: sdio-pwrseq {
  94                 compatible = "mmc-pwrseq-simple";
  95                 clocks = <&rk808 1>;
  96                 clock-names = "ext_clock";
  97                 pinctrl-names = "default";
  98                 pinctrl-0 = <&wifi_enable_h>;
  99
 100                 /*
 101                  * On the module itself this is one of these (depending
 102                  * on the actual card populated):
 103                  * - SDIO_RESET_L_WL_REG_ON
 104                  * - PDN (power down when low)
 105                  */
 106                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
 107         };
 108
 109         vcc3v3_sys: vcc3v3-sys {
 110                 compatible = "regulator-fixed";
 111                 regulator-name = "vcc3v3_sys";
 112                 regulator-always-on;
 113                 regulator-boot-on;
 114                 regulator-min-microvolt = <3300000>;
 115                 regulator-max-microvolt = <3300000>;
 116         };
 117
 118         vcc5v0_host: vcc5v0-host-regulator {
 119                 compatible = "regulator-fixed";
 120                 enable-active-high;
 121                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
 122                 pinctrl-names = "default";
 123                 pinctrl-0 = <&host_vbus_drv>;
 124                 regulator-name = "vcc5v0_host";
 125         };
 126
 127         vcc5v0_sys: vcc5v0-sys {
 128                 compatible = "regulator-fixed";
 129                 regulator-name = "vcc5v0_sys";
 130                 regulator-always-on;
 131                 regulator-boot-on;
 132                 regulator-min-microvolt = <5000000>;
 133                 regulator-max-microvolt = <5000000>;
 134         };
 135
 136         vcc_phy: vcc-phy-regulator {
 137                 compatible = "regulator-fixed";
 138                 regulator-name = "vcc_phy";
 139                 regulator-always-on;
 140                 regulator-boot-on;
 141         };
 142
 143         vdd_log: vdd-log {
 144                 compatible = "pwm-regulator";
 145                 pwms = <&pwm2 0 25000 0>;
 146                 regulator-name = "vdd_log";
 147                 regulator-min-microvolt = <800000>;
 148                 regulator-max-microvolt = <1400000>;
 149                 regulator-always-on;
 150                 regulator-boot-on;
 151
 152                 /* for rockchip boot on */
 153                 rockchip,pwm_id= <2>;
 154                 rockchip,pwm_voltage = <1000000>;
 155         };
 156 };
 157
 158 &cpu_l0 {
 159         cpu-supply = <&vdd_cpu_l>;
 160 };
 161
 162 &cpu_l1 {
 163         cpu-supply = <&vdd_cpu_l>;
 164 };
 165
 166 &cpu_l2 {
 167         cpu-supply = <&vdd_cpu_l>;
 168 };
 169
 170 &cpu_l3 {
 171         cpu-supply = <&vdd_cpu_l>;
 172 };
 173
 174 &cpu_b0 {
 175         cpu-supply = <&vdd_cpu_b>;
 176 };
 177
 178 &cpu_b1 {
 179         cpu-supply = <&vdd_cpu_b>;
 180 };
 181
 182 &emmc_phy {
 183         freq-sel = <200000000>;
 184         dr-sel = <50>;
 185         opdelay = <4>;
 186         status = "okay";
 187 };
 188
 189 &gmac {
 190         phy-supply = <&vcc_phy>;
 191         phy-mode = "rgmii";
 192         clock_in_out = "input";
 193         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
 194         snps,reset-active-low;
 195         snps,reset-delays-us = <0 10000 50000>;
 196         assigned-clocks = <&cru SCLK_RMII_SRC>;
 197         assigned-clock-parents = <&clkin_gmac>;
 198         pinctrl-names = "default";
 199         pinctrl-0 = <&rgmii_pins>;
 200         tx_delay = <0x28>;
 201         rx_delay = <0x11>;
 202         status = "okay";
 203 };
 204
 205 &gpu {
 206         status = "okay";
 207         mali-supply = <&vdd_gpu>;
 208 };
 209
 210 &i2c0 {
 211         status = "okay";
 212         i2c-scl-rising-time-ns = <168>;
 213         i2c-scl-falling-time-ns = <4>;
 214         clock-frequency = <400000>;
 215
 216         vdd_cpu_b: syr827@40 {
 217                 compatible = "silergy,syr827";
 218                 reg = <0x40>;
 219                 vin-supply = <&vcc5v0_sys>;
 220                 regulator-compatible = "fan53555-reg";
 221                 regulator-name = "vdd_cpu_b";
 222                 regulator-min-microvolt = <712500>;
 223                 regulator-max-microvolt = <1500000>;
 224                 regulator-ramp-delay = <1000>;
 225                 fcs,suspend-voltage-selector = <1>;
 226                 regulator-always-on;
 227                 regulator-boot-on;
 228                 regulator-initial-state = <3>;
 229                         regulator-state-mem {
 230                         regulator-off-in-suspend;
 231                 };
 232         };
 233
 234         vdd_gpu: syr828@41 {
 235                 compatible = "silergy,syr828";
 236                 reg = <0x41>;
 237                 vin-supply = <&vcc5v0_sys>;
 238                 regulator-compatible = "fan53555-reg";
 239                 regulator-name = "vdd_gpu";
 240                 regulator-min-microvolt = <712500>;
 241                 regulator-max-microvolt = <1500000>;
 242                 regulator-ramp-delay = <1000>;
 243                 fcs,suspend-voltage-selector = <1>;
 244                 regulator-always-on;
 245                 regulator-boot-on;
 246                 regulator-initial-state = <3>;
 247                         regulator-state-mem {
 248                         regulator-off-in-suspend;
 249                 };
 250         };
 251
 252         rk808: pmic@1b {
 253                 compatible = "rockchip,rk808";
 254                 reg = <0x1b>;
 255                 interrupt-parent = <&gpio1>;
 256                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 257                 pinctrl-names = "default";
 258                 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
 259                 rockchip,system-power-controller;
 260                 wakeup-source;
 261                 #clock-cells = <1>;
 262                 clock-output-names = "xin32k", "rk808-clkout2";
 263
 264                 vcc1-supply = <&vcc3v3_sys>;
 265                 vcc2-supply = <&vcc3v3_sys>;
 266                 vcc3-supply = <&vcc3v3_sys>;
 267                 vcc4-supply = <&vcc3v3_sys>;
 268                 vcc6-supply = <&vcc3v3_sys>;
 269                 vcc7-supply = <&vcc3v3_sys>;
 270                 vcc8-supply = <&vcc3v3_sys>;
 271                 vcc9-supply = <&vcc3v3_sys>;
 272                 vcc10-supply = <&vcc3v3_sys>;
 273                 vcc11-supply = <&vcc3v3_sys>;
 274                 vcc12-supply = <&vcc3v3_sys>;
 275                 vddio-supply = <&vcc1v8_pmu>;
 276
 277                 regulators {
 278                         vdd_center: DCDC_REG1 {
 279                                 regulator-always-on;
 280                                 regulator-boot-on;
 281                                 regulator-min-microvolt = <750000>;
 282                                 regulator-max-microvolt = <1350000>;
 283                                 regulator-name = "vdd_center";
 284                                 regulator-state-mem {
 285                                         regulator-off-in-suspend;
 286                                 };
 287                         };
 288
 289                         vdd_cpu_l: DCDC_REG2 {
 290                                 regulator-always-on;
 291                                 regulator-boot-on;
 292                                 regulator-min-microvolt = <750000>;
 293                                 regulator-max-microvolt = <1350000>;
 294                                 regulator-name = "vdd_cpu_l";
 295                                 regulator-state-mem {
 296                                         regulator-off-in-suspend;
 297                                 };
 298                         };
 299
 300                         vcc_ddr: DCDC_REG3 {
 301                                 regulator-always-on;
 302                                 regulator-boot-on;
 303                                 regulator-name = "vcc_ddr";
 304                                 regulator-state-mem {
 305                                         regulator-on-in-suspend;
 306                                 };
 307                         };
 308
 309                         vcc_1v8: DCDC_REG4 {
 310                                 regulator-always-on;
 311                                 regulator-boot-on;
 312                                 regulator-min-microvolt = <1800000>;
 313                                 regulator-max-microvolt = <1800000>;
 314                                 regulator-name = "vcc_1v8";
 315                                 regulator-state-mem {
 316                                         regulator-on-in-suspend;
 317                                         regulator-suspend-microvolt = <1800000>;
 318                                 };
 319                         };
 320
 321                         vcc1v8_dvp: LDO_REG1 {
 322                                 regulator-always-on;
 323                                 regulator-boot-on;
 324                                 regulator-min-microvolt = <1800000>;
 325                                 regulator-max-microvolt = <1800000>;
 326                                 regulator-name = "vcc1v8_dvp";
 327                                 regulator-state-mem {
 328                                         regulator-off-in-suspend;
 329                                 };
 330                         };
 331
 332                         vcc3v0_tp: LDO_REG2 {
 333                                 regulator-always-on;
 334                                 regulator-boot-on;
 335                                 regulator-min-microvolt = <3000000>;
 336                                 regulator-max-microvolt = <3000000>;
 337                                 regulator-name = "vcc3v0_tp";
 338                                 regulator-state-mem {
 339                                         regulator-off-in-suspend;
 340                                 };
 341                         };
 342
 343                         vcc1v8_pmu: LDO_REG3 {
 344                                 regulator-always-on;
 345                                 regulator-boot-on;
 346                                 regulator-min-microvolt = <1800000>;
 347                                 regulator-max-microvolt = <1800000>;
 348                                 regulator-name = "vcc1v8_pmu";
 349                                 regulator-state-mem {
 350                                         regulator-on-in-suspend;
 351                                         regulator-suspend-microvolt = <1800000>;
 352                                 };
 353                         };
 354
 355                         vcc_sd: LDO_REG4 {
 356                                 regulator-always-on;
 357                                 regulator-boot-on;
 358                                 regulator-min-microvolt = <1800000>;
 359                                 regulator-max-microvolt = <3300000>;
 360                                 regulator-name = "vcc_sd";
 361                                 regulator-state-mem {
 362                                         regulator-on-in-suspend;
 363                                         regulator-suspend-microvolt = <3300000>;
 364                                 };
 365                         };
 366
 367                         vcca3v0_codec: LDO_REG5 {
 368                                 regulator-always-on;
 369                                 regulator-boot-on;
 370                                 regulator-min-microvolt = <3000000>;
 371                                 regulator-max-microvolt = <3000000>;
 372                                 regulator-name = "vcca3v0_codec";
 373                                 regulator-state-mem {
 374                                         regulator-off-in-suspend;
 375                                 };
 376                         };
 377
 378                         vcc_1v5: LDO_REG6 {
 379                                 regulator-always-on;
 380                                 regulator-boot-on;
 381                                 regulator-min-microvolt = <1500000>;
 382                                 regulator-max-microvolt = <1500000>;
 383                                 regulator-name = "vcc_1v5";
 384                                 regulator-state-mem {
 385                                         regulator-on-in-suspend;
 386                                         regulator-suspend-microvolt = <1500000>;
 387                                 };
 388                         };
 389
 390                         vcca1v8_codec: LDO_REG7 {
 391                                 regulator-always-on;
 392                                 regulator-boot-on;
 393                                 regulator-min-microvolt = <1800000>;
 394                                 regulator-max-microvolt = <1800000>;
 395                                 regulator-name = "vcca1v8_codec";
 396                                 regulator-state-mem {
 397                                         regulator-off-in-suspend;
 398                                 };
 399                         };
 400
 401                         vcc_3v0: LDO_REG8 {
 402                                 regulator-always-on;
 403                                 regulator-boot-on;
 404                                 regulator-min-microvolt = <3000000>;
 405                                 regulator-max-microvolt = <3000000>;
 406                                 regulator-name = "vcc_3v0";
 407                                 regulator-state-mem {
 408                                         regulator-on-in-suspend;
 409                                         regulator-suspend-microvolt = <3000000>;
 410                                 };
 411                         };
 412
 413                         vcc3v3_s3: SWITCH_REG1 {
 414                                 regulator-always-on;
 415                                 regulator-boot-on;
 416                                 regulator-name = "vcc3v3_s3";
 417                                 regulator-state-mem {
 418                                         regulator-off-in-suspend;
 419                                 };
 420                         };
 421
 422                         vcc3v3_s0: SWITCH_REG2 {
 423                                 regulator-always-on;
 424                                 regulator-boot-on;
 425                                 regulator-name = "vcc3v3_s0";
 426                                 regulator-state-mem {
 427                                         regulator-off-in-suspend;
 428                                 };
 429                         };
 430                 };
 431         };
 432 };
 433
 434 &i2s0 {
 435         status = "okay";
 436         rockchip,i2s-broken-burst-len;
 437         rockchip,playback-channels = <8>;
 438         rockchip,capture-channels = <8>;
 439         #sound-dai-cells = <0>;
 440 };
 441
 442 &i2s2 {
 443         #sound-dai-cells = <0>;
 444         status = "okay";
 445 };
 446
 447 &pcie0 {
 448         assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
 449         assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
 450         assigned-clock-rates = <100000000>;
 451         ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
 452         num-lanes = <4>;
 453         pinctrl-names = "default";
 454         pinctrl-0 = <&pcie_clkreqn>;
 455         status = "okay";
 456 };
 457
 458 &pwm0 {
 459         status = "okay";
 460 };
 461
 462 &pwm2 {
 463         status = "okay";
 464 };
 465
 466 &sdhci {
 467         bus-width = <8>;
 468         mmc-hs400-1_8v;
 469         supports-emmc;
 470         non-removable;
 471         keep-power-in-suspend;
 472         mmc-hs400-enhanced-strobe;
 473         status = "okay";
 474 };
 475
 476 &sdio0 {
 477         clock-frequency = <50000000>;
 478         clock-freq-min-max = <200000 50000000>;
 479         supports-sdio;
 480         bus-width = <4>;
 481         disable-wp;
 482         cap-sd-highspeed;
 483         cap-sdio-irq;
 484         keep-power-in-suspend;
 485         mmc-pwrseq = <&sdio_pwrseq>;
 486         non-removable;
 487         num-slots = <1>;
 488         pinctrl-names = "default";
 489         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
 490         sd-uhs-sdr104;
 491         status = "okay";
 492 };
 493
 494 &sdmmc {
 495         clock-frequency = <150000000>;
 496         clock-freq-min-max = <100000 150000000>;
 497         supports-sd;
 498         bus-width = <4>;
 499         cap-mmc-highspeed;
 500         cap-sd-highspeed;
 501         disable-wp;
 502         num-slots = <1>;
 503         //sd-uhs-sdr104;
 504         vqmmc-supply = <&vcc_sd>;
 505         pinctrl-names = "default";
 506         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
 507         status = "okay";
 508 };
 509
 510 &saradc {
 511         status = "okay";
 512 };
 513
 514 &tsadc {
 515         /* tshut mode 0:CRU 1:GPIO */
 516         rockchip,hw-tshut-mode = <1>;
 517         /* tshut polarity 0:LOW 1:HIGH */
 518         rockchip,hw-tshut-polarity = <1>;
 519         status = "okay";
 520 };
 521
 522 &u2phy0 {
 523         status = "okay";
 524
 525         u2phy0_otg: otg-port {
 526                 status = "okay";
 527         };
 528
 529         u2phy0_host: host-port {
 530                 phy-supply = <&vcc5v0_host>;
 531                 status = "okay";
 532         };
 533 };
 534
 535 &u2phy1 {
 536         status = "okay";
 537
 538         u2phy1_otg: otg-port {
 539                 status = "okay";
 540         };
 541
 542         u2phy1_host: host-port {
 543                 phy-supply = <&vcc5v0_host>;
 544                 status = "okay";
 545         };
 546 };
 547
 548 &uart2 {
 549         status = "okay";
 550 };
 551
 552 &usbdrd3_0 {
 553         status = "okay";
 554 };
 555
 556 &usbdrd3_1 {
 557         status = "okay";
 558 };
 559
 560 &usbdrd_dwc3_0 {
 561         status = "okay";
 562 };
 563
 564 &usbdrd_dwc3_1 {
 565         status = "okay";
 566         dr_mode = "host";
 567 };
 568
 569 &usb_host0_ehci {
 570         status = "okay";
 571 };
 572
 573 &usb_host0_ohci {
 574         status = "okay";
 575 };
 576
 577 &usb_host1_ehci {
 578         status = "okay";
 579 };
 580
 581 &usb_host1_ohci {
 582         status = "okay";
 583 };
 584
 585 &cluster0_opp {
 586         opp@408000000 {
 587                 opp-hz = /bits/ 64 <408000000>;
 588                 opp-microvolt = <800000>;
 589                 clock-latency-ns = <40000>;
 590         };
 591         opp@600000000 {
 592                 opp-hz = /bits/ 64 <600000000>;
 593                 opp-microvolt = <800000>;
 594         };
 595         opp@816000000 {
 596                 opp-hz = /bits/ 64 <816000000>;
 597                 opp-microvolt = <800000>;
 598         };
 599         opp@1008000000 {
 600                 opp-hz = /bits/ 64 <1008000000>;
 601                 opp-microvolt = <875000>;
 602         };
 603         opp@1200000000 {
 604                 opp-hz = /bits/ 64 <1200000000>;
 605                 opp-microvolt = <925000>;
 606         };
 607         opp@1416000000 {
 608                 opp-hz = /bits/ 64 <1416000000>;
 609                 opp-microvolt = <1050000>;
 610         };
 611         opp@1512000000 {
 612                 opp-hz = /bits/ 64 <1512000000>;
 613                 opp-microvolt = <1075000>;
 614         };
 615 };
 616
 617 &cluster1_opp {
 618         opp@408000000 {
 619                 opp-hz = /bits/ 64 <408000000>;
 620                 opp-microvolt = <800000>;
 621                 clock-latency-ns = <40000>;
 622         };
 623         opp@600000000 {
 624                 opp-hz = /bits/ 64 <600000000>;
 625                 opp-microvolt = <800000>;
 626         };
 627         opp@816000000 {
 628                 opp-hz = /bits/ 64 <816000000>;
 629                 opp-microvolt = <825000>;
 630         };
 631         opp@1008000000 {
 632                 opp-hz = /bits/ 64 <1008000000>;
 633                 opp-microvolt = <875000>;
 634         };
 635         opp@1200000000 {
 636                 opp-hz = /bits/ 64 <1200000000>;
 637                 opp-microvolt = <950000>;
 638         };
 639         opp@1416000000 {
 640                 opp-hz = /bits/ 64 <1416000000>;
 641                 opp-microvolt = <1025000>;
 642         };
 643         opp@1608000000 {
 644                 opp-hz = /bits/ 64 <1608000000>;
 645                 opp-microvolt = <1100000>;
 646         };
 647         opp@1800000000 {
 648                 opp-hz = /bits/ 64 <1800000000>;
 649                 opp-microvolt = <1175000>;
 650         };
 651         opp@1992000000 {
 652                 opp-hz = /bits/ 64 <1992000000>;
 653                 opp-microvolt = <1250000>;
 654         };
 655 };
 656
 657 &CPU_COST_A72 {
 658         busy-cost-data = <
 659                 210   129       /*  408MHz */
 660                 308   184       /*  600MHz */
 661                 419   246       /*  816MHz */
 662                 518   335       /* 1008MHz */
 663                 617   428       /* 1200MHz */
 664                 728   573       /* 1416MHz */
 665                 827   724       /* 1608MHz */
 666                 925   900       /* 1800MHz */
 667                 1024  1108      /* 1992MHz */
 668         >;
 669         idle-cost-data = <
 670                 15
 671                 15
 672                 0
 673         >;
 674 };
 675
 676 &CPU_COST_A53 {
 677         busy-cost-data = <
 678                 108    46       /*  408M */
 679                 159    67       /*  600M */
 680                 216    90       /*  816M */
 681                 267    120      /* 1008M */
 682                 318    153      /* 1200M */
 683                 375    198      /* 1416M */
 684                 401    222      /* 1512M */
 685         >;
 686         idle-cost-data = <
 687                 6
 688                 6
 689                 0
 690         >;
 691 };
 692
 693 &CLUSTER_COST_A72 {
 694         busy-cost-data = <
 695                 210   129       /*  408MHz */
 696                 308   184       /*  600MHz */
 697                 419   246       /*  816MHz */
 698                 518   335       /* 1008MHz */
 699                 617   428       /* 1200MHz */
 700                 728   573       /* 1416MHz */
 701                 827   724       /* 1608MHz */
 702                 925   900       /* 1800MHz */
 703                 1024  1108      /* 1992MHz */
 704         >;
 705         idle-cost-data = <
 706                 65
 707                 65
 708                 65
 709         >;
 710 };
 711
 712 &CLUSTER_COST_A53 {
 713         busy-cost-data = <
 714                 108    46       /*  408M */
 715                 159    67       /*  600M */
 716                 216    90       /*  816M */
 717                 267    120      /* 1008M */
 718                 318    153      /* 1200M */
 719                 375    198      /* 1416M */
 720                 401    222      /* 1512M */
 721         >;
 722         idle-cost-data = <
 723                 56
 724                 56
 725                 56
 726         >;
 727 };
 728
 729 &gpu_opp_table {
 730         opp@200000000 {
 731                 opp-hz = /bits/ 64 <200000000>;
 732                 opp-microvolt = <800000>;
 733         };
 734         opp@300000000 {
 735                 opp-hz = /bits/ 64 <300000000>;
 736                 opp-microvolt = <800000>;
 737         };
 738         opp@400000000 {
 739                 opp-hz = /bits/ 64 <400000000>;
 740                 opp-microvolt = <800000>;
 741         };
 742         opp@500000000 {
 743                 opp-hz = /bits/ 64 <500000000>;
 744                 opp-microvolt = <900000>;
 745         };
 746         opp@600000000 {
 747                 opp-hz = /bits/ 64 <600000000>;
 748                 opp-microvolt = <900000>;
 749         };
 750         opp@800000000 {
 751                 opp-hz = /bits/ 64 <800000000>;
 752                 opp-microvolt = <1000000>;
 753         };
 754 };
 755
 756 &pinctrl {
 757         pmic {
 758                 pmic_int_l: pmic-int-l {
 759                         rockchip,pins =
 760                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
 761                 };
 762
 763                 pmic_dvs2: pmic-dvs2 {
 764                         rockchip,pins =
 765                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
 766                 };
 767         };
 768
 769         usb2 {
 770                 host_vbus_drv: host-vbus-drv {
 771                         rockchip,pins =
 772                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
 773                 };
 774         };
 775 };