c070547250d1843f7bcc312b1bebca69b6dfb8b4
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399-sapphire.dtsi
1 /*
2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42
43 #include "dt-bindings/pwm/pwm.h"
44 #include "rk3399.dtsi"
45 #include "rk3399-opp.dtsi"
46
47 / {
48         compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399";
49
50         backlight: backlight {
51                 status = "disabled";
52                 compatible = "pwm-backlight";
53                 pwms = <&pwm0 0 25000 0>;
54                 brightness-levels = <
55                           0   1   2   3   4   5   6   7
56                           8   9  10  11  12  13  14  15
57                          16  17  18  19  20  21  22  23
58                          24  25  26  27  28  29  30  31
59                          32  33  34  35  36  37  38  39
60                          40  41  42  43  44  45  46  47
61                          48  49  50  51  52  53  54  55
62                          56  57  58  59  60  61  62  63
63                          64  65  66  67  68  69  70  71
64                          72  73  74  75  76  77  78  79
65                          80  81  82  83  84  85  86  87
66                          88  89  90  91  92  93  94  95
67                          96  97  98  99 100 101 102 103
68                         104 105 106 107 108 109 110 111
69                         112 113 114 115 116 117 118 119
70                         120 121 122 123 124 125 126 127
71                         128 129 130 131 132 133 134 135
72                         136 137 138 139 140 141 142 143
73                         144 145 146 147 148 149 150 151
74                         152 153 154 155 156 157 158 159
75                         160 161 162 163 164 165 166 167
76                         168 169 170 171 172 173 174 175
77                         176 177 178 179 180 181 182 183
78                         184 185 186 187 188 189 190 191
79                         192 193 194 195 196 197 198 199
80                         200 201 202 203 204 205 206 207
81                         208 209 210 211 212 213 214 215
82                         216 217 218 219 220 221 222 223
83                         224 225 226 227 228 229 230 231
84                         232 233 234 235 236 237 238 239
85                         240 241 242 243 244 245 246 247
86                         248 249 250 251 252 253 254 255>;
87                 default-brightness-level = <200>;
88         };
89
90         clkin_gmac: external-gmac-clock {
91                 compatible = "fixed-clock";
92                 clock-frequency = <125000000>;
93                 clock-output-names = "clkin_gmac";
94                 #clock-cells = <0>;
95         };
96
97         dw_hdmi_audio: dw-hdmi-audio {
98                 status = "disabled";
99                 compatible = "rockchip,dw-hdmi-audio";
100                 #sound-dai-cells = <0>;
101         };
102
103         hdmi_sound: hdmi-sound {
104                 status = "disabled";
105                 compatible = "simple-audio-card";
106                 simple-audio-card,format = "i2s";
107                 simple-audio-card,mclk-fs = <256>;
108                 simple-audio-card,name = "rockchip,hdmi";
109
110                 simple-audio-card,cpu {
111                         sound-dai = <&i2s2>;
112                 };
113                 simple-audio-card,codec {
114                         sound-dai = <&dw_hdmi_audio>;
115                 };
116         };
117
118         pmu-io-domains {
119                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
120                 rockchip,grf = <&pmugrf>;
121                 pmu1830-supply = <&vcc_3v0>;
122         };
123
124         sdio_pwrseq: sdio-pwrseq {
125                 compatible = "mmc-pwrseq-simple";
126                 clocks = <&rk808 1>;
127                 clock-names = "ext_clock";
128                 pinctrl-names = "default";
129                 pinctrl-0 = <&wifi_enable_h>;
130
131                 /*
132                  * On the module itself this is one of these (depending
133                  * on the actual card populated):
134                  * - SDIO_RESET_L_WL_REG_ON
135                  * - PDN (power down when low)
136                  */
137                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
138         };
139
140         vcc3v3_sys: vcc3v3-sys {
141                 compatible = "regulator-fixed";
142                 regulator-name = "vcc3v3_sys";
143                 regulator-always-on;
144                 regulator-boot-on;
145                 regulator-min-microvolt = <3300000>;
146                 regulator-max-microvolt = <3300000>;
147         };
148
149         vcc5v0_host: vcc5v0-host-regulator {
150                 compatible = "regulator-fixed";
151                 enable-active-high;
152                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
153                 pinctrl-names = "default";
154                 pinctrl-0 = <&host_vbus_drv>;
155                 regulator-name = "vcc5v0_host";
156         };
157
158         vcc5v0_sys: vcc5v0-sys {
159                 compatible = "regulator-fixed";
160                 regulator-name = "vcc5v0_sys";
161                 regulator-always-on;
162                 regulator-boot-on;
163                 regulator-min-microvolt = <5000000>;
164                 regulator-max-microvolt = <5000000>;
165         };
166
167         vcc_phy: vcc-phy-regulator {
168                 compatible = "regulator-fixed";
169                 regulator-name = "vcc_phy";
170                 regulator-always-on;
171                 regulator-boot-on;
172         };
173
174         vdd_log: vdd-log {
175                 compatible = "pwm-regulator";
176                 pwms = <&pwm2 0 25000 0>;
177                 regulator-name = "vdd_log";
178                 regulator-min-microvolt = <800000>;
179                 regulator-max-microvolt = <1400000>;
180                 regulator-always-on;
181                 regulator-boot-on;
182
183                 /* for rockchip boot on */
184                 rockchip,pwm_id= <2>;
185                 rockchip,pwm_voltage = <1000000>;
186         };
187 };
188
189 &cpu_l0 {
190         cpu-supply = <&vdd_cpu_l>;
191 };
192
193 &cpu_l1 {
194         cpu-supply = <&vdd_cpu_l>;
195 };
196
197 &cpu_l2 {
198         cpu-supply = <&vdd_cpu_l>;
199 };
200
201 &cpu_l3 {
202         cpu-supply = <&vdd_cpu_l>;
203 };
204
205 &cpu_b0 {
206         cpu-supply = <&vdd_cpu_b>;
207 };
208
209 &cpu_b1 {
210         cpu-supply = <&vdd_cpu_b>;
211 };
212
213 &emmc_phy {
214         freq-sel = <200000000>;
215         dr-sel = <50>;
216         opdelay = <4>;
217         status = "okay";
218 };
219
220 &gmac {
221         phy-supply = <&vcc_phy>;
222         phy-mode = "rgmii";
223         clock_in_out = "input";
224         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
225         snps,reset-active-low;
226         snps,reset-delays-us = <0 10000 50000>;
227         assigned-clocks = <&cru SCLK_RMII_SRC>;
228         assigned-clock-parents = <&clkin_gmac>;
229         pinctrl-names = "default";
230         pinctrl-0 = <&rgmii_pins>;
231         tx_delay = <0x28>;
232         rx_delay = <0x11>;
233         status = "okay";
234 };
235
236 &gpu {
237         status = "okay";
238         mali-supply = <&vdd_gpu>;
239 };
240
241 &i2c0 {
242         status = "okay";
243         i2c-scl-rising-time-ns = <168>;
244         i2c-scl-falling-time-ns = <4>;
245         clock-frequency = <400000>;
246
247         vdd_cpu_b: syr827@40 {
248                 compatible = "silergy,syr827";
249                 reg = <0x40>;
250                 vin-supply = <&vcc5v0_sys>;
251                 regulator-compatible = "fan53555-reg";
252                 regulator-name = "vdd_cpu_b";
253                 regulator-min-microvolt = <712500>;
254                 regulator-max-microvolt = <1500000>;
255                 regulator-ramp-delay = <1000>;
256                 fcs,suspend-voltage-selector = <1>;
257                 regulator-always-on;
258                 regulator-boot-on;
259                 regulator-initial-state = <3>;
260                         regulator-state-mem {
261                         regulator-off-in-suspend;
262                 };
263         };
264
265         vdd_gpu: syr828@41 {
266                 compatible = "silergy,syr828";
267                 reg = <0x41>;
268                 vin-supply = <&vcc5v0_sys>;
269                 regulator-compatible = "fan53555-reg";
270                 regulator-name = "vdd_gpu";
271                 regulator-min-microvolt = <712500>;
272                 regulator-max-microvolt = <1500000>;
273                 regulator-ramp-delay = <1000>;
274                 fcs,suspend-voltage-selector = <1>;
275                 regulator-always-on;
276                 regulator-boot-on;
277                 regulator-initial-state = <3>;
278                         regulator-state-mem {
279                         regulator-off-in-suspend;
280                 };
281         };
282
283         rk808: pmic@1b {
284                 compatible = "rockchip,rk808";
285                 reg = <0x1b>;
286                 interrupt-parent = <&gpio1>;
287                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
288                 pinctrl-names = "default";
289                 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
290                 rockchip,system-power-controller;
291                 wakeup-source;
292                 #clock-cells = <1>;
293                 clock-output-names = "xin32k", "rk808-clkout2";
294
295                 vcc1-supply = <&vcc3v3_sys>;
296                 vcc2-supply = <&vcc3v3_sys>;
297                 vcc3-supply = <&vcc3v3_sys>;
298                 vcc4-supply = <&vcc3v3_sys>;
299                 vcc6-supply = <&vcc3v3_sys>;
300                 vcc7-supply = <&vcc3v3_sys>;
301                 vcc8-supply = <&vcc3v3_sys>;
302                 vcc9-supply = <&vcc3v3_sys>;
303                 vcc10-supply = <&vcc3v3_sys>;
304                 vcc11-supply = <&vcc3v3_sys>;
305                 vcc12-supply = <&vcc3v3_sys>;
306                 vddio-supply = <&vcc1v8_pmu>;
307
308                 regulators {
309                         vdd_center: DCDC_REG1 {
310                                 regulator-always-on;
311                                 regulator-boot-on;
312                                 regulator-min-microvolt = <750000>;
313                                 regulator-max-microvolt = <1350000>;
314                                 regulator-ramp-delay = <6001>;
315                                 regulator-name = "vdd_center";
316                                 regulator-state-mem {
317                                         regulator-off-in-suspend;
318                                 };
319                         };
320
321                         vdd_cpu_l: DCDC_REG2 {
322                                 regulator-always-on;
323                                 regulator-boot-on;
324                                 regulator-min-microvolt = <750000>;
325                                 regulator-max-microvolt = <1350000>;
326                                 regulator-ramp-delay = <6001>;
327                                 regulator-name = "vdd_cpu_l";
328                                 regulator-state-mem {
329                                         regulator-off-in-suspend;
330                                 };
331                         };
332
333                         vcc_ddr: DCDC_REG3 {
334                                 regulator-always-on;
335                                 regulator-boot-on;
336                                 regulator-name = "vcc_ddr";
337                                 regulator-state-mem {
338                                         regulator-on-in-suspend;
339                                 };
340                         };
341
342                         vcc_1v8: DCDC_REG4 {
343                                 regulator-always-on;
344                                 regulator-boot-on;
345                                 regulator-min-microvolt = <1800000>;
346                                 regulator-max-microvolt = <1800000>;
347                                 regulator-name = "vcc_1v8";
348                                 regulator-state-mem {
349                                         regulator-on-in-suspend;
350                                         regulator-suspend-microvolt = <1800000>;
351                                 };
352                         };
353
354                         vcc1v8_dvp: LDO_REG1 {
355                                 regulator-always-on;
356                                 regulator-boot-on;
357                                 regulator-min-microvolt = <1800000>;
358                                 regulator-max-microvolt = <1800000>;
359                                 regulator-name = "vcc1v8_dvp";
360                                 regulator-state-mem {
361                                         regulator-off-in-suspend;
362                                 };
363                         };
364
365                         vcc3v0_tp: LDO_REG2 {
366                                 regulator-always-on;
367                                 regulator-boot-on;
368                                 regulator-min-microvolt = <3000000>;
369                                 regulator-max-microvolt = <3000000>;
370                                 regulator-name = "vcc3v0_tp";
371                                 regulator-state-mem {
372                                         regulator-off-in-suspend;
373                                 };
374                         };
375
376                         vcc1v8_pmu: LDO_REG3 {
377                                 regulator-always-on;
378                                 regulator-boot-on;
379                                 regulator-min-microvolt = <1800000>;
380                                 regulator-max-microvolt = <1800000>;
381                                 regulator-name = "vcc1v8_pmu";
382                                 regulator-state-mem {
383                                         regulator-on-in-suspend;
384                                         regulator-suspend-microvolt = <1800000>;
385                                 };
386                         };
387
388                         vcc_sd: LDO_REG4 {
389                                 regulator-always-on;
390                                 regulator-boot-on;
391                                 regulator-min-microvolt = <1800000>;
392                                 regulator-max-microvolt = <3300000>;
393                                 regulator-name = "vcc_sd";
394                                 regulator-state-mem {
395                                         regulator-on-in-suspend;
396                                         regulator-suspend-microvolt = <3300000>;
397                                 };
398                         };
399
400                         vcca3v0_codec: LDO_REG5 {
401                                 regulator-always-on;
402                                 regulator-boot-on;
403                                 regulator-min-microvolt = <3000000>;
404                                 regulator-max-microvolt = <3000000>;
405                                 regulator-name = "vcca3v0_codec";
406                                 regulator-state-mem {
407                                         regulator-off-in-suspend;
408                                 };
409                         };
410
411                         vcc_1v5: LDO_REG6 {
412                                 regulator-always-on;
413                                 regulator-boot-on;
414                                 regulator-min-microvolt = <1500000>;
415                                 regulator-max-microvolt = <1500000>;
416                                 regulator-name = "vcc_1v5";
417                                 regulator-state-mem {
418                                         regulator-on-in-suspend;
419                                         regulator-suspend-microvolt = <1500000>;
420                                 };
421                         };
422
423                         vcca1v8_codec: LDO_REG7 {
424                                 regulator-always-on;
425                                 regulator-boot-on;
426                                 regulator-min-microvolt = <1800000>;
427                                 regulator-max-microvolt = <1800000>;
428                                 regulator-name = "vcca1v8_codec";
429                                 regulator-state-mem {
430                                         regulator-off-in-suspend;
431                                 };
432                         };
433
434                         vcc_3v0: LDO_REG8 {
435                                 regulator-always-on;
436                                 regulator-boot-on;
437                                 regulator-min-microvolt = <3000000>;
438                                 regulator-max-microvolt = <3000000>;
439                                 regulator-name = "vcc_3v0";
440                                 regulator-state-mem {
441                                         regulator-on-in-suspend;
442                                         regulator-suspend-microvolt = <3000000>;
443                                 };
444                         };
445
446                         vcc3v3_s3: SWITCH_REG1 {
447                                 regulator-always-on;
448                                 regulator-boot-on;
449                                 regulator-name = "vcc3v3_s3";
450                                 regulator-state-mem {
451                                         regulator-off-in-suspend;
452                                 };
453                         };
454
455                         vcc3v3_s0: SWITCH_REG2 {
456                                 regulator-always-on;
457                                 regulator-boot-on;
458                                 regulator-name = "vcc3v3_s0";
459                                 regulator-state-mem {
460                                         regulator-off-in-suspend;
461                                 };
462                         };
463                 };
464         };
465 };
466
467 &i2c4 {
468         status = "okay";
469         i2c-scl-rising-time-ns = <475>;
470         i2c-scl-falling-time-ns = <26>;
471
472         fusb0: fusb30x@22 {
473                 compatible = "fairchild,fusb302";
474                 reg = <0x22>;
475                 pinctrl-names = "default";
476                 pinctrl-0 = <&fusb0_int>;
477                 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
478                 status = "okay";
479         };
480 };
481
482 &i2s0 {
483         status = "okay";
484         rockchip,i2s-broken-burst-len;
485         rockchip,playback-channels = <8>;
486         rockchip,capture-channels = <8>;
487         #sound-dai-cells = <0>;
488 };
489
490 &i2s2 {
491         #sound-dai-cells = <0>;
492         status = "okay";
493 };
494
495 &io_domains {
496         status = "okay";
497
498         bt656-supply = <&vcc_3v0>;              /* bt656_gpio2ab_ms */
499         audio-supply = <&vcca1v8_codec>;        /* audio_gpio3d4a_ms */
500         sdmmc-supply = <&vcc_sd>;               /* sdmmc_gpio4b_ms */
501         gpio1830-supply = <&vcc_3v0>;           /* gpio1833_gpio4cd_ms */
502 };
503
504 &pcie0 {
505         assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
506         assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
507         assigned-clock-rates = <100000000>;
508         ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
509         num-lanes = <4>;
510         pinctrl-names = "default";
511         pinctrl-0 = <&pcie_clkreqn>;
512         status = "okay";
513 };
514
515 &pwm0 {
516         status = "okay";
517 };
518
519 &pwm2 {
520         status = "okay";
521 };
522
523 &sdhci {
524         bus-width = <8>;
525         mmc-hs400-1_8v;
526         supports-emmc;
527         non-removable;
528         keep-power-in-suspend;
529         mmc-hs400-enhanced-strobe;
530         status = "okay";
531 };
532
533 &sdio0 {
534         clock-frequency = <50000000>;
535         clock-freq-min-max = <200000 50000000>;
536         supports-sdio;
537         bus-width = <4>;
538         disable-wp;
539         cap-sd-highspeed;
540         cap-sdio-irq;
541         keep-power-in-suspend;
542         mmc-pwrseq = <&sdio_pwrseq>;
543         non-removable;
544         num-slots = <1>;
545         pinctrl-names = "default";
546         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
547         sd-uhs-sdr104;
548         status = "okay";
549 };
550
551 &sdmmc {
552         clock-frequency = <150000000>;
553         clock-freq-min-max = <100000 150000000>;
554         supports-sd;
555         bus-width = <4>;
556         cap-mmc-highspeed;
557         cap-sd-highspeed;
558         disable-wp;
559         num-slots = <1>;
560         //sd-uhs-sdr104;
561         vqmmc-supply = <&vcc_sd>;
562         pinctrl-names = "default";
563         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
564         status = "okay";
565 };
566
567 &saradc {
568         status = "okay";
569 };
570
571 &tcphy0 {
572         extcon = <&fusb0>;
573         status = "okay";
574 };
575
576 &tcphy1 {
577         status = "okay";
578 };
579
580 &tsadc {
581         /* tshut mode 0:CRU 1:GPIO */
582         rockchip,hw-tshut-mode = <1>;
583         /* tshut polarity 0:LOW 1:HIGH */
584         rockchip,hw-tshut-polarity = <1>;
585         status = "okay";
586 };
587
588 &u2phy0 {
589         status = "okay";
590         extcon = <&fusb0>;
591
592         u2phy0_otg: otg-port {
593                 status = "okay";
594         };
595
596         u2phy0_host: host-port {
597                 phy-supply = <&vcc5v0_host>;
598                 status = "okay";
599         };
600 };
601
602 &u2phy1 {
603         status = "okay";
604
605         u2phy1_otg: otg-port {
606                 status = "okay";
607         };
608
609         u2phy1_host: host-port {
610                 phy-supply = <&vcc5v0_host>;
611                 status = "okay";
612         };
613 };
614
615 &uart2 {
616         status = "okay";
617 };
618
619 &usbdrd3_0 {
620         status = "okay";
621         extcon = <&fusb0>;
622 };
623
624 &usbdrd3_1 {
625         status = "okay";
626 };
627
628 &usbdrd_dwc3_0 {
629         status = "okay";
630 };
631
632 &usbdrd_dwc3_1 {
633         status = "okay";
634         dr_mode = "host";
635 };
636
637 &usb_host0_ehci {
638         status = "okay";
639 };
640
641 &usb_host0_ohci {
642         status = "okay";
643 };
644
645 &usb_host1_ehci {
646         status = "okay";
647 };
648
649 &usb_host1_ohci {
650         status = "okay";
651 };
652
653 &pinctrl {
654         pmic {
655                 pmic_int_l: pmic-int-l {
656                         rockchip,pins =
657                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
658                 };
659
660                 pmic_dvs2: pmic-dvs2 {
661                         rockchip,pins =
662                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
663                 };
664         };
665
666         usb2 {
667                 host_vbus_drv: host-vbus-drv {
668                         rockchip,pins =
669                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
670                 };
671         };
672
673         fusb30x {
674                 fusb0_int: fusb0-int {
675                         rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
676                 };
677         };
678 };