arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 #include "dt-bindings/pwm/pwm.h"
  44 #include "rk3399.dtsi"
  45 #include "rk3399-opp.dtsi"
  46
  47 / {
  48         compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399";
  49
  50         backlight: backlight {
  51                 status = "disabled";
  52                 compatible = "pwm-backlight";
  53                 pwms = <&pwm0 0 25000 0>;
  54                 brightness-levels = <
  55                           0   1   2   3   4   5   6   7
  56                           8   9  10  11  12  13  14  15
  57                          16  17  18  19  20  21  22  23
  58                          24  25  26  27  28  29  30  31
  59                          32  33  34  35  36  37  38  39
  60                          40  41  42  43  44  45  46  47
  61                          48  49  50  51  52  53  54  55
  62                          56  57  58  59  60  61  62  63
  63                          64  65  66  67  68  69  70  71
  64                          72  73  74  75  76  77  78  79
  65                          80  81  82  83  84  85  86  87
  66                          88  89  90  91  92  93  94  95
  67                          96  97  98  99 100 101 102 103
  68                         104 105 106 107 108 109 110 111
  69                         112 113 114 115 116 117 118 119
  70                         120 121 122 123 124 125 126 127
  71                         128 129 130 131 132 133 134 135
  72                         136 137 138 139 140 141 142 143
  73                         144 145 146 147 148 149 150 151
  74                         152 153 154 155 156 157 158 159
  75                         160 161 162 163 164 165 166 167
  76                         168 169 170 171 172 173 174 175
  77                         176 177 178 179 180 181 182 183
  78                         184 185 186 187 188 189 190 191
  79                         192 193 194 195 196 197 198 199
  80                         200 201 202 203 204 205 206 207
  81                         208 209 210 211 212 213 214 215
  82                         216 217 218 219 220 221 222 223
  83                         224 225 226 227 228 229 230 231
  84                         232 233 234 235 236 237 238 239
  85                         240 241 242 243 244 245 246 247
  86                         248 249 250 251 252 253 254 255>;
  87                 default-brightness-level = <200>;
  88         };
  89
  90         clkin_gmac: external-gmac-clock {
  91                 compatible = "fixed-clock";
  92                 clock-frequency = <125000000>;
  93                 clock-output-names = "clkin_gmac";
  94                 #clock-cells = <0>;
  95         };
  96
  97         dw_hdmi_audio: dw-hdmi-audio {
  98                 status = "disabled";
  99                 compatible = "rockchip,dw-hdmi-audio";
 100                 #sound-dai-cells = <0>;
 101         };
 102
 103         hdmi_sound: hdmi-sound {
 104                 status = "disabled";
 105                 compatible = "simple-audio-card";
 106                 simple-audio-card,format = "i2s";
 107                 simple-audio-card,mclk-fs = <256>;
 108                 simple-audio-card,name = "rockchip,hdmi";
 109
 110                 simple-audio-card,cpu {
 111                         sound-dai = <&i2s2>;
 112                 };
 113                 simple-audio-card,codec {
 114                         sound-dai = <&dw_hdmi_audio>;
 115                 };
 116         };
 117
 118         io-domains {
 119                 compatible = "rockchip,rk3399-io-voltage-domain";
 120                 rockchip,grf = <&grf>;
 121
 122                 bt656-supply = <&vcc_3v0>;              /* bt656_gpio2ab_ms */
 123                 audio-supply = <&vcca1v8_codec>;        /* audio_gpio3d4a_ms */
 124                 sdmmc-supply = <&vcc_sd>;               /* sdmmc_gpio4b_ms */
 125                 gpio1830-supply = <&vcc_3v0>;           /* gpio1833_gpio4cd_ms */
 126         };
 127
 128         pmu-io-domains {
 129                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
 130                 rockchip,grf = <&pmugrf>;
 131                 pmu1830-supply = <&vcc_3v0>;
 132         };
 133
 134         sdio_pwrseq: sdio-pwrseq {
 135                 compatible = "mmc-pwrseq-simple";
 136                 clocks = <&rk808 1>;
 137                 clock-names = "ext_clock";
 138                 pinctrl-names = "default";
 139                 pinctrl-0 = <&wifi_enable_h>;
 140
 141                 /*
 142                  * On the module itself this is one of these (depending
 143                  * on the actual card populated):
 144                  * - SDIO_RESET_L_WL_REG_ON
 145                  * - PDN (power down when low)
 146                  */
 147                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
 148         };
 149
 150         vcc3v3_sys: vcc3v3-sys {
 151                 compatible = "regulator-fixed";
 152                 regulator-name = "vcc3v3_sys";
 153                 regulator-always-on;
 154                 regulator-boot-on;
 155                 regulator-min-microvolt = <3300000>;
 156                 regulator-max-microvolt = <3300000>;
 157         };
 158
 159         vcc5v0_host: vcc5v0-host-regulator {
 160                 compatible = "regulator-fixed";
 161                 enable-active-high;
 162                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
 163                 pinctrl-names = "default";
 164                 pinctrl-0 = <&host_vbus_drv>;
 165                 regulator-name = "vcc5v0_host";
 166         };
 167
 168         vcc5v0_sys: vcc5v0-sys {
 169                 compatible = "regulator-fixed";
 170                 regulator-name = "vcc5v0_sys";
 171                 regulator-always-on;
 172                 regulator-boot-on;
 173                 regulator-min-microvolt = <5000000>;
 174                 regulator-max-microvolt = <5000000>;
 175         };
 176
 177         vcc_phy: vcc-phy-regulator {
 178                 compatible = "regulator-fixed";
 179                 regulator-name = "vcc_phy";
 180                 regulator-always-on;
 181                 regulator-boot-on;
 182         };
 183
 184         vdd_log: vdd-log {
 185                 compatible = "pwm-regulator";
 186                 pwms = <&pwm2 0 25000 0>;
 187                 regulator-name = "vdd_log";
 188                 regulator-min-microvolt = <800000>;
 189                 regulator-max-microvolt = <1400000>;
 190                 regulator-always-on;
 191                 regulator-boot-on;
 192
 193                 /* for rockchip boot on */
 194                 rockchip,pwm_id= <2>;
 195                 rockchip,pwm_voltage = <1000000>;
 196         };
 197 };
 198
 199 &cpu_l0 {
 200         cpu-supply = <&vdd_cpu_l>;
 201 };
 202
 203 &cpu_l1 {
 204         cpu-supply = <&vdd_cpu_l>;
 205 };
 206
 207 &cpu_l2 {
 208         cpu-supply = <&vdd_cpu_l>;
 209 };
 210
 211 &cpu_l3 {
 212         cpu-supply = <&vdd_cpu_l>;
 213 };
 214
 215 &cpu_b0 {
 216         cpu-supply = <&vdd_cpu_b>;
 217 };
 218
 219 &cpu_b1 {
 220         cpu-supply = <&vdd_cpu_b>;
 221 };
 222
 223 &emmc_phy {
 224         freq-sel = <200000000>;
 225         dr-sel = <50>;
 226         opdelay = <4>;
 227         status = "okay";
 228 };
 229
 230 &gmac {
 231         phy-supply = <&vcc_phy>;
 232         phy-mode = "rgmii";
 233         clock_in_out = "input";
 234         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
 235         snps,reset-active-low;
 236         snps,reset-delays-us = <0 10000 50000>;
 237         assigned-clocks = <&cru SCLK_RMII_SRC>;
 238         assigned-clock-parents = <&clkin_gmac>;
 239         pinctrl-names = "default";
 240         pinctrl-0 = <&rgmii_pins>;
 241         tx_delay = <0x28>;
 242         rx_delay = <0x11>;
 243         status = "okay";
 244 };
 245
 246 &gpu {
 247         status = "okay";
 248         mali-supply = <&vdd_gpu>;
 249 };
 250
 251 &i2c0 {
 252         status = "okay";
 253         i2c-scl-rising-time-ns = <168>;
 254         i2c-scl-falling-time-ns = <4>;
 255         clock-frequency = <400000>;
 256
 257         vdd_cpu_b: syr827@40 {
 258                 compatible = "silergy,syr827";
 259                 reg = <0x40>;
 260                 vin-supply = <&vcc5v0_sys>;
 261                 regulator-compatible = "fan53555-reg";
 262                 regulator-name = "vdd_cpu_b";
 263                 regulator-min-microvolt = <712500>;
 264                 regulator-max-microvolt = <1500000>;
 265                 regulator-ramp-delay = <1000>;
 266                 fcs,suspend-voltage-selector = <1>;
 267                 regulator-always-on;
 268                 regulator-boot-on;
 269                 regulator-initial-state = <3>;
 270                         regulator-state-mem {
 271                         regulator-off-in-suspend;
 272                 };
 273         };
 274
 275         vdd_gpu: syr828@41 {
 276                 compatible = "silergy,syr828";
 277                 reg = <0x41>;
 278                 vin-supply = <&vcc5v0_sys>;
 279                 regulator-compatible = "fan53555-reg";
 280                 regulator-name = "vdd_gpu";
 281                 regulator-min-microvolt = <712500>;
 282                 regulator-max-microvolt = <1500000>;
 283                 regulator-ramp-delay = <1000>;
 284                 fcs,suspend-voltage-selector = <1>;
 285                 regulator-always-on;
 286                 regulator-boot-on;
 287                 regulator-initial-state = <3>;
 288                         regulator-state-mem {
 289                         regulator-off-in-suspend;
 290                 };
 291         };
 292
 293         rk808: pmic@1b {
 294                 compatible = "rockchip,rk808";
 295                 reg = <0x1b>;
 296                 interrupt-parent = <&gpio1>;
 297                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 298                 pinctrl-names = "default";
 299                 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
 300                 rockchip,system-power-controller;
 301                 wakeup-source;
 302                 #clock-cells = <1>;
 303                 clock-output-names = "xin32k", "rk808-clkout2";
 304
 305                 vcc1-supply = <&vcc3v3_sys>;
 306                 vcc2-supply = <&vcc3v3_sys>;
 307                 vcc3-supply = <&vcc3v3_sys>;
 308                 vcc4-supply = <&vcc3v3_sys>;
 309                 vcc6-supply = <&vcc3v3_sys>;
 310                 vcc7-supply = <&vcc3v3_sys>;
 311                 vcc8-supply = <&vcc3v3_sys>;
 312                 vcc9-supply = <&vcc3v3_sys>;
 313                 vcc10-supply = <&vcc3v3_sys>;
 314                 vcc11-supply = <&vcc3v3_sys>;
 315                 vcc12-supply = <&vcc3v3_sys>;
 316                 vddio-supply = <&vcc1v8_pmu>;
 317
 318                 regulators {
 319                         vdd_center: DCDC_REG1 {
 320                                 regulator-always-on;
 321                                 regulator-boot-on;
 322                                 regulator-min-microvolt = <750000>;
 323                                 regulator-max-microvolt = <1350000>;
 324                                 regulator-ramp-delay = <6001>;
 325                                 regulator-name = "vdd_center";
 326                                 regulator-state-mem {
 327                                         regulator-off-in-suspend;
 328                                 };
 329                         };
 330
 331                         vdd_cpu_l: DCDC_REG2 {
 332                                 regulator-always-on;
 333                                 regulator-boot-on;
 334                                 regulator-min-microvolt = <750000>;
 335                                 regulator-max-microvolt = <1350000>;
 336                                 regulator-ramp-delay = <6001>;
 337                                 regulator-name = "vdd_cpu_l";
 338                                 regulator-state-mem {
 339                                         regulator-off-in-suspend;
 340                                 };
 341                         };
 342
 343                         vcc_ddr: DCDC_REG3 {
 344                                 regulator-always-on;
 345                                 regulator-boot-on;
 346                                 regulator-name = "vcc_ddr";
 347                                 regulator-state-mem {
 348                                         regulator-on-in-suspend;
 349                                 };
 350                         };
 351
 352                         vcc_1v8: DCDC_REG4 {
 353                                 regulator-always-on;
 354                                 regulator-boot-on;
 355                                 regulator-min-microvolt = <1800000>;
 356                                 regulator-max-microvolt = <1800000>;
 357                                 regulator-name = "vcc_1v8";
 358                                 regulator-state-mem {
 359                                         regulator-on-in-suspend;
 360                                         regulator-suspend-microvolt = <1800000>;
 361                                 };
 362                         };
 363
 364                         vcc1v8_dvp: LDO_REG1 {
 365                                 regulator-always-on;
 366                                 regulator-boot-on;
 367                                 regulator-min-microvolt = <1800000>;
 368                                 regulator-max-microvolt = <1800000>;
 369                                 regulator-name = "vcc1v8_dvp";
 370                                 regulator-state-mem {
 371                                         regulator-off-in-suspend;
 372                                 };
 373                         };
 374
 375                         vcc3v0_tp: LDO_REG2 {
 376                                 regulator-always-on;
 377                                 regulator-boot-on;
 378                                 regulator-min-microvolt = <3000000>;
 379                                 regulator-max-microvolt = <3000000>;
 380                                 regulator-name = "vcc3v0_tp";
 381                                 regulator-state-mem {
 382                                         regulator-off-in-suspend;
 383                                 };
 384                         };
 385
 386                         vcc1v8_pmu: LDO_REG3 {
 387                                 regulator-always-on;
 388                                 regulator-boot-on;
 389                                 regulator-min-microvolt = <1800000>;
 390                                 regulator-max-microvolt = <1800000>;
 391                                 regulator-name = "vcc1v8_pmu";
 392                                 regulator-state-mem {
 393                                         regulator-on-in-suspend;
 394                                         regulator-suspend-microvolt = <1800000>;
 395                                 };
 396                         };
 397
 398                         vcc_sd: LDO_REG4 {
 399                                 regulator-always-on;
 400                                 regulator-boot-on;
 401                                 regulator-min-microvolt = <1800000>;
 402                                 regulator-max-microvolt = <3300000>;
 403                                 regulator-name = "vcc_sd";
 404                                 regulator-state-mem {
 405                                         regulator-on-in-suspend;
 406                                         regulator-suspend-microvolt = <3300000>;
 407                                 };
 408                         };
 409
 410                         vcca3v0_codec: LDO_REG5 {
 411                                 regulator-always-on;
 412                                 regulator-boot-on;
 413                                 regulator-min-microvolt = <3000000>;
 414                                 regulator-max-microvolt = <3000000>;
 415                                 regulator-name = "vcca3v0_codec";
 416                                 regulator-state-mem {
 417                                         regulator-off-in-suspend;
 418                                 };
 419                         };
 420
 421                         vcc_1v5: LDO_REG6 {
 422                                 regulator-always-on;
 423                                 regulator-boot-on;
 424                                 regulator-min-microvolt = <1500000>;
 425                                 regulator-max-microvolt = <1500000>;
 426                                 regulator-name = "vcc_1v5";
 427                                 regulator-state-mem {
 428                                         regulator-on-in-suspend;
 429                                         regulator-suspend-microvolt = <1500000>;
 430                                 };
 431                         };
 432
 433                         vcca1v8_codec: LDO_REG7 {
 434                                 regulator-always-on;
 435                                 regulator-boot-on;
 436                                 regulator-min-microvolt = <1800000>;
 437                                 regulator-max-microvolt = <1800000>;
 438                                 regulator-name = "vcca1v8_codec";
 439                                 regulator-state-mem {
 440                                         regulator-off-in-suspend;
 441                                 };
 442                         };
 443
 444                         vcc_3v0: LDO_REG8 {
 445                                 regulator-always-on;
 446                                 regulator-boot-on;
 447                                 regulator-min-microvolt = <3000000>;
 448                                 regulator-max-microvolt = <3000000>;
 449                                 regulator-name = "vcc_3v0";
 450                                 regulator-state-mem {
 451                                         regulator-on-in-suspend;
 452                                         regulator-suspend-microvolt = <3000000>;
 453                                 };
 454                         };
 455
 456                         vcc3v3_s3: SWITCH_REG1 {
 457                                 regulator-always-on;
 458                                 regulator-boot-on;
 459                                 regulator-name = "vcc3v3_s3";
 460                                 regulator-state-mem {
 461                                         regulator-off-in-suspend;
 462                                 };
 463                         };
 464
 465                         vcc3v3_s0: SWITCH_REG2 {
 466                                 regulator-always-on;
 467                                 regulator-boot-on;
 468                                 regulator-name = "vcc3v3_s0";
 469                                 regulator-state-mem {
 470                                         regulator-off-in-suspend;
 471                                 };
 472                         };
 473                 };
 474         };
 475 };
 476
 477 &i2c4 {
 478         status = "okay";
 479         i2c-scl-rising-time-ns = <475>;
 480         i2c-scl-falling-time-ns = <26>;
 481
 482         fusb0: fusb30x@22 {
 483                 compatible = "fairchild,fusb302";
 484                 reg = <0x22>;
 485                 pinctrl-names = "default";
 486                 pinctrl-0 = <&fusb0_int>;
 487                 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
 488                 status = "okay";
 489         };
 490 };
 491
 492 &i2s0 {
 493         status = "okay";
 494         rockchip,i2s-broken-burst-len;
 495         rockchip,playback-channels = <8>;
 496         rockchip,capture-channels = <8>;
 497         #sound-dai-cells = <0>;
 498 };
 499
 500 &i2s2 {
 501         #sound-dai-cells = <0>;
 502         status = "okay";
 503 };
 504
 505 &pcie0 {
 506         assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
 507         assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
 508         assigned-clock-rates = <100000000>;
 509         ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
 510         num-lanes = <4>;
 511         pinctrl-names = "default";
 512         pinctrl-0 = <&pcie_clkreqn>;
 513         status = "okay";
 514 };
 515
 516 &pwm0 {
 517         status = "okay";
 518 };
 519
 520 &pwm2 {
 521         status = "okay";
 522 };
 523
 524 &sdhci {
 525         bus-width = <8>;
 526         mmc-hs400-1_8v;
 527         supports-emmc;
 528         non-removable;
 529         keep-power-in-suspend;
 530         mmc-hs400-enhanced-strobe;
 531         status = "okay";
 532 };
 533
 534 &sdio0 {
 535         clock-frequency = <50000000>;
 536         clock-freq-min-max = <200000 50000000>;
 537         supports-sdio;
 538         bus-width = <4>;
 539         disable-wp;
 540         cap-sd-highspeed;
 541         cap-sdio-irq;
 542         keep-power-in-suspend;
 543         mmc-pwrseq = <&sdio_pwrseq>;
 544         non-removable;
 545         num-slots = <1>;
 546         pinctrl-names = "default";
 547         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
 548         sd-uhs-sdr104;
 549         status = "okay";
 550 };
 551
 552 &sdmmc {
 553         clock-frequency = <150000000>;
 554         clock-freq-min-max = <100000 150000000>;
 555         supports-sd;
 556         bus-width = <4>;
 557         cap-mmc-highspeed;
 558         cap-sd-highspeed;
 559         disable-wp;
 560         num-slots = <1>;
 561         //sd-uhs-sdr104;
 562         vqmmc-supply = <&vcc_sd>;
 563         pinctrl-names = "default";
 564         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
 565         status = "okay";
 566 };
 567
 568 &saradc {
 569         status = "okay";
 570 };
 571
 572 &tcphy0 {
 573         extcon = <&fusb0>;
 574         status = "okay";
 575 };
 576
 577 &tcphy1 {
 578         status = "okay";
 579 };
 580
 581 &tsadc {
 582         /* tshut mode 0:CRU 1:GPIO */
 583         rockchip,hw-tshut-mode = <1>;
 584         /* tshut polarity 0:LOW 1:HIGH */
 585         rockchip,hw-tshut-polarity = <1>;
 586         status = "okay";
 587 };
 588
 589 &u2phy0 {
 590         status = "okay";
 591         extcon = <&fusb0>;
 592
 593         u2phy0_otg: otg-port {
 594                 status = "okay";
 595         };
 596
 597         u2phy0_host: host-port {
 598                 phy-supply = <&vcc5v0_host>;
 599                 status = "okay";
 600         };
 601 };
 602
 603 &u2phy1 {
 604         status = "okay";
 605
 606         u2phy1_otg: otg-port {
 607                 status = "okay";
 608         };
 609
 610         u2phy1_host: host-port {
 611                 phy-supply = <&vcc5v0_host>;
 612                 status = "okay";
 613         };
 614 };
 615
 616 &uart2 {
 617         status = "okay";
 618 };
 619
 620 &usbdrd3_0 {
 621         status = "okay";
 622         extcon = <&fusb0>;
 623 };
 624
 625 &usbdrd3_1 {
 626         status = "okay";
 627 };
 628
 629 &usbdrd_dwc3_0 {
 630         status = "okay";
 631 };
 632
 633 &usbdrd_dwc3_1 {
 634         status = "okay";
 635         dr_mode = "host";
 636 };
 637
 638 &usb_host0_ehci {
 639         status = "okay";
 640 };
 641
 642 &usb_host0_ohci {
 643         status = "okay";
 644 };
 645
 646 &usb_host1_ehci {
 647         status = "okay";
 648 };
 649
 650 &usb_host1_ohci {
 651         status = "okay";
 652 };
 653
 654 &pinctrl {
 655         pmic {
 656                 pmic_int_l: pmic-int-l {
 657                         rockchip,pins =
 658                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
 659                 };
 660
 661                 pmic_dvs2: pmic-dvs2 {
 662                         rockchip,pins =
 663                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
 664                 };
 665         };
 666
 667         usb2 {
 668                 host_vbus_drv: host-vbus-drv {
 669                         rockchip,pins =
 670                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
 671                 };
 672         };
 673
 674         fusb30x {
 675                 fusb0_int: fusb0-int {
 676                         rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
 677                 };
 678         };
 679 };