2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include <dt-bindings/sensor-dev.h>
46 #include "rk3399.dtsi"
47 #include "rk3399-android.dtsi"
48 #include "rk3399-opp.dtsi"
51 model = "Rockchip RK3399 VR Board";
52 compatible = "rockchip,vr", "rockchip,rk3399";
55 compatible = "pwm-regulator";
56 pwms = <&pwm2 0 25000 0>;
58 rockchip,pwm_voltage = <900000>;
59 regulator-name = "vdd_log";
60 regulator-min-microvolt = <800000>;
61 regulator-max-microvolt = <1400000>;
67 compatible = "regulator-fixed";
68 regulator-name = "vcc_sys";
71 regulator-min-microvolt = <4000000>;
72 regulator-max-microvolt = <4000000>;
75 vcc3v3_sys: vcc3v3-sys {
76 compatible = "regulator-fixed";
77 regulator-name = "vcc3v3_sys";
80 regulator-min-microvolt = <3300000>;
81 regulator-max-microvolt = <3300000>;
84 vcc_phy: vcc-phy-regulator {
85 compatible = "regulator-fixed";
86 regulator-name = "vcc_phy";
91 vcc1v8_s3: vcc1v8-s3-regulator {
92 compatible = "regulator-fixed";
93 regulator-name = "vcc1v8_s3";
97 regulator-off-in-suspend;
102 compatible = "rockchip,rk3399-io-voltage-domain";
103 rockchip,grf = <&grf>;
105 bt656-supply = <&vcc1v8_s3>;
106 audio-supply = <&vcc1v8_s3>;
107 sdmmc-supply = <&vcc_sd>;
108 gpio1830-supply = <&vcc1v8_s3>;
112 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
113 rockchip,grf = <&pmugrf>;
114 pmu1830-supply = <&vcc_1v8>;
117 dw_hdmi_audio: dw-hdmi-audio {
119 compatible = "rockchip,dw-hdmi-audio";
120 #sound-dai-cells = <0>;
123 hdmi_sound: hdmi-sound {
125 compatible = "simple-audio-card";
126 simple-audio-card,format = "i2s";
127 simple-audio-card,mclk-fs = <256>;
128 simple-audio-card,name = "rockchip,hdmi";
130 simple-audio-card,cpu {
133 simple-audio-card,codec {
134 sound-dai = <&dw_hdmi_audio>;
138 sdio_pwrseq: sdio-pwrseq {
139 compatible = "mmc-pwrseq-simple";
141 clock-names = "ext_clock";
142 pinctrl-names = "default";
143 pinctrl-0 = <&wifi_enable_h>;
146 * On the module itself this is one of these (depending
147 * on the actual card populated):
148 * - SDIO_RESET_L_WL_REG_ON
149 * - PDN (power down when low)
151 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
155 compatible = "wlan-platdata";
156 rockchip,grf = <&grf>;
157 wifi_chip_type = "ap6330";
159 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
164 compatible = "bluetooth-platdata";
166 clock-names = "ext_clock";
167 //wifi-bt-power-toggle;
168 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
169 pinctrl-names = "default", "rts_gpio";
170 pinctrl-0 = <&uart0_rts>;
171 pinctrl-1 = <&uart0_gpios>;
172 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
173 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
174 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
175 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
180 compatible = "rockchip,uboot-charge";
181 rockchip,uboot-charge-on = <0>;
182 rockchip,android-charge-on = <1>;
187 compatible = "inv-hid,mpu6500";
192 clock-frequency = <150000000>;
193 clock-freq-min-max = <400000 150000000>;
201 vqmmc-supply = <&vcc_sd>;
202 pinctrl-names = "default";
203 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
208 clock-frequency = <50000000>;
209 clock-freq-min-max = <200000 50000000>;
215 keep-power-in-suspend;
216 mmc-pwrseq = <&sdio_pwrseq>;
219 pinctrl-names = "default";
220 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
234 keep-power-in-suspend;
235 mmc-hs400-enhanced-strobe;
241 i2c-scl-rising-time-ns = <219>;
242 i2c-scl-falling-time-ns = <15>;
243 /* clock-frequency = <400000>; */
246 compatible = "fairchild,fusb302";
248 pinctrl-names = "default";
249 pinctrl-0 = <&fusb1_int>;
250 vbus-5v-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
251 int-n-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
255 vdd_cpu_b: syr827@40 {
256 compatible = "silergy,syr827";
258 vin-supply = <&vcc_sys>;
259 regulator-compatible = "fan53555-reg";
260 pinctrl-0 = <&vsel1_gpio>;
261 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
262 regulator-name = "vdd_cpu_b";
263 regulator-min-microvolt = <712500>;
264 regulator-max-microvolt = <1500000>;
265 regulator-ramp-delay = <1000>;
266 fcs,suspend-voltage-selector = <1>;
268 regulator-initial-state = <3>;
269 regulator-state-mem {
270 regulator-off-in-suspend;
275 compatible = "silergy,syr828";
277 vin-supply = <&vcc_sys>;
278 regulator-compatible = "fan53555-reg";
279 pinctrl-0 = <&vsel2_gpio>;
280 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
281 regulator-name = "vdd_gpu";
282 regulator-min-microvolt = <712500>;
283 regulator-max-microvolt = <1500000>;
284 regulator-ramp-delay = <1000>;
285 fcs,suspend-voltage-selector = <1>;
287 regulator-initial-state = <3>;
288 regulator-initial-mode = <1>;/*1:pwm 2: auto mode*/
289 regulator-state-mem {
290 regulator-off-in-suspend;
295 compatible = "rockchip,rk818";
298 clock-output-names = "xin32k", "wifibt_32kin";
299 interrupt-parent = <&gpio1>;
300 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
301 pinctrl-names = "default";
302 pinctrl-0 = <&pmic_int_l>;
303 rockchip,system-power-controller;
308 vcc1-supply = <&vcc_sys>;
309 vcc2-supply = <&vcc_sys>;
310 vcc3-supply = <&vcc_sys>;
311 vcc4-supply = <&vcc_sys>;
312 vcc6-supply = <&vcc_sys>;
313 vcc7-supply = <&vcc3v3_sys>;
314 vcc8-supply = <&vcc_sys>;
315 vcc9-supply = <&vcc3v3_sys>;
318 vdd_cpu_l: DCDC_REG1 {
319 regulator-name = "vdd_cpu_l";
322 regulator-min-microvolt = <750000>;
323 regulator-max-microvolt = <1350000>;
324 regulator-ramp-delay = <6001>;
325 regulator-state-mem {
326 regulator-off-in-suspend;
330 vdd_center: DCDC_REG2 {
331 regulator-name = "vdd_center";
334 regulator-min-microvolt = <800000>;
335 regulator-max-microvolt = <1350000>;
336 regulator-ramp-delay = <6001>;
337 regulator-state-mem {
338 regulator-off-in-suspend;
343 regulator-name = "vcc_ddr";
346 regulator-state-mem {
347 regulator-on-in-suspend;
352 regulator-name = "vcc_1v8";
355 regulator-min-microvolt = <1800000>;
356 regulator-max-microvolt = <1800000>;
357 regulator-state-mem {
358 regulator-on-in-suspend;
359 regulator-suspend-microvolt = <1800000>;
363 vcc1v8_rk1608: LDO_REG1 {
364 //regulator-always-on;
366 regulator-min-microvolt = <1800000>;
367 regulator-max-microvolt = <1800000>;
368 regulator-name = "vcc1v8_rk1608";
369 regulator-state-mem {
370 regulator-off-in-suspend;
374 vdd1v8_rk1608: LDO_REG2 {
375 //regulator-always-on;
377 regulator-min-microvolt = <1800000>;
378 regulator-max-microvolt = <1800000>;
379 regulator-name = "vdd1v8_rk1608";
380 regulator-state-mem {
381 regulator-off-in-suspend;
385 vdd1v0_rk1608: LDO_REG3 {
386 //regulator-always-on;
388 regulator-min-microvolt = <1000000>;
389 regulator-max-microvolt = <1000000>;
390 regulator-name = "vdd1v0_rk1608";
391 regulator-state-mem {
392 regulator-off-in-suspend;
396 vcc_power_on: LDO_REG4 {
399 regulator-min-microvolt = <3300000>;
400 regulator-max-microvolt = <3300000>;
401 regulator-name = "vcc_power_on";
402 regulator-state-mem {
403 regulator-on-in-suspend;
404 regulator-suspend-microvolt = <3300000>;
409 //regulator-always-on;
411 regulator-min-microvolt = <2800000>;
412 regulator-max-microvolt = <2800000>;
413 regulator-name = "vdd_2v8";
414 regulator-state-mem {
415 regulator-on-in-suspend;
416 regulator-suspend-microvolt = <2800000>;
421 //regulator-always-on;
423 regulator-min-microvolt = <1500000>;
424 regulator-max-microvolt = <1500000>;
425 regulator-name = "vcc_1v5";
426 regulator-state-mem {
427 regulator-on-in-suspend;
428 regulator-suspend-microvolt = <1500000>;
432 vcc1v8_dvp: LDO_REG7 {
433 //regulator-always-on;
435 regulator-min-microvolt = <1800000>;
436 regulator-max-microvolt = <1800000>;
437 regulator-name = "vcc1v8_dvp";
438 regulator-state-mem {
439 regulator-on-in-suspend;
440 regulator-suspend-microvolt = <1800000>;
444 vcc3v3_s3: LDO_REG8 {
447 regulator-min-microvolt = <3300000>;
448 regulator-max-microvolt = <3300000>;
449 regulator-name = "vcc3v3_s3";
450 regulator-state-mem {
451 regulator-on-in-suspend;
452 regulator-suspend-microvolt = <3300000>;
459 regulator-min-microvolt = <1800000>;
460 regulator-max-microvolt = <3300000>;
461 regulator-name = "vcc_sd";
462 regulator-state-mem {
463 regulator-on-in-suspend;
464 regulator-suspend-microvolt = <3300000>;
468 vcc3v3_s0: SWITCH_REG {
471 regulator-name = "vcc3v3_s0";
472 regulator-state-mem {
473 regulator-on-in-suspend;
479 compatible = "rk818-battery";
481 3400 3599 3671 3701 3728 3746 3762
482 3772 3781 3792 3816 3836 3866 3910
483 3942 3971 4002 4050 4088 4132 4183>;
484 design_capacity = <4000>;
485 design_qmax = <4100>;
487 max_input_current = <2000>;
488 max_chrg_current = <1800>;
489 max_chrg_voltage = <4200>;
490 sleep_enter_current = <300>;
491 sleep_exit_current = <300>;
492 power_off_thresd = <3400>;
493 zero_algorithm_vol = <3850>;
494 fb_temperature = <115>;
496 max_soc_offset = <60>;
507 i2c-scl-rising-time-ns = <345>;
508 i2c-scl-falling-time-ns = <11>;
511 compatible = "fairchild,fusb302";
513 pinctrl-names = "default";
514 pinctrl-0 = <&fusb0_int>;
515 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
521 temperature = <85000>; /* millicelsius */
525 temperature = <100000>; /* millicelsius */
529 temperature = <105000>; /* millicelsius */
533 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
534 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
535 rockchip,hw-tshut-temp = <110000>;
544 compatible = "rockchip,key";
546 io-channels = <&saradc 1>;
549 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
560 u2phy0_otg: otg-port {
569 u2phy1_otg: otg-port {
575 pinctrl-names = "default";
576 pinctrl-0 = <&uart0_xfer &uart0_cts>;
617 #include <dt-bindings/display/screen-timing/lcd-box.dtsi>
621 native-mode = <&timing0>; /* 720p */
625 screen-width = <130>;
630 rockchip,uboot-logo-on = <1>;
631 rockchip,disp-mode = <NO_DUAL>;
632 //rockchip,disp-policy = <DISPLAY_POLICY_BOX>;
645 rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC1>;
650 extcon = <&fusb0>, <&fusb1>;
651 dp_vop_sel = <DISPLAY_SOURCE_LCDC0>;
659 cpu-supply = <&vdd_cpu_l>;
663 cpu-supply = <&vdd_cpu_l>;
667 cpu-supply = <&vdd_cpu_l>;
671 cpu-supply = <&vdd_cpu_l>;
675 cpu-supply = <&vdd_cpu_b>;
679 cpu-supply = <&vdd_cpu_b>;
684 mali-supply = <&vdd_gpu>;
689 wifi_enable_h: wifi-enable-h {
690 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
695 uart0_gpios: uart0-gpios {
696 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
701 pmic_int_l: pmic-int-l {
703 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
706 vsel1_gpio: vsel1-gpio {
708 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
711 vsel2_gpio: vsel2-gpio {
713 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
718 spi1_gpio: spi1-gpio {
720 <1 7 RK_FUNC_GPIO &pcfg_output_low>,
721 <1 8 RK_FUNC_GPIO &pcfg_output_low>,
722 <1 9 RK_FUNC_GPIO &pcfg_output_low>,
723 <1 10 RK_FUNC_GPIO &pcfg_output_low>;
728 fusb0_int: fusb0-int {
729 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
732 fusb1_int: fusb1-int {
733 rockchip,pins = <1 24 RK_FUNC_GPIO &pcfg_pull_up>;