arch/arm64/boot/dts/rockchip/rk3399-mid-818-android.dts

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 /dts-v1/;
  44
  45 #include "rk3399.dtsi"
  46 #include "rk3399-android.dtsi"
  47 #include <dt-bindings/sensor-dev.h>
  48 #include <dt-bindings/pwm/pwm.h>
  49
  50 / {
  51         compatible = "rockchip,rk3399-mid", "rockchip,rk3399";
  52
  53         hall_sensor: hall-mh248 {
  54                 compatible = "hall-mh248";
  55                 pinctrl-names = "default";
  56                 pinctrl-0 = <&mh248_irq_gpio>;
  57                 irq-gpio = <&gpio1 2 IRQ_TYPE_EDGE_BOTH>;
  58                 hall-active = <1>;
  59                 status = "okay";
  60         };
  61
  62         vcc_sys: vcc-sys {
  63                 compatible = "regulator-fixed";
  64                 regulator-name = "vcc_sys";
  65                 regulator-always-on;
  66                 regulator-boot-on;
  67                 regulator-min-microvolt = <3900000>;
  68                 regulator-max-microvolt = <3900000>;
  69         };
  70
  71         vcc3v3_sys: vcc3v3-sys {
  72                 compatible = "regulator-fixed";
  73                 regulator-name = "vcc3v3_sys";
  74                 regulator-always-on;
  75                 regulator-boot-on;
  76                 regulator-min-microvolt = <3300000>;
  77                 regulator-max-microvolt = <3300000>;
  78         };
  79
  80         vcc5v0_host: vcc5v0-host-regulator {
  81                 compatible = "regulator-fixed";
  82                 enable-active-high;
  83                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
  84                 pinctrl-names = "default";
  85                 pinctrl-0 = <&host_vbus_drv>;
  86                 regulator-name = "vcc5v0_host";
  87         };
  88
  89         vdd_log: vdd-log {
  90                 compatible = "pwm-regulator";
  91                 pwms = <&pwm2 0 25000 0>;
  92                 rockchip,pwm_id= <2>;
  93                 rockchip,pwm_voltage = <900000>;
  94                 regulator-name = "vdd_log";
  95                 regulator-min-microvolt = <750000>;
  96                 regulator-max-microvolt = <1350000>;
  97                 regulator-always-on;
  98                 regulator-boot-on;
  99         };
 100
 101         backlight: backlight {
 102                 compatible = "pwm-backlight";
 103                 pwms = <&vop0_pwm 0 25000 PWM_POLARITY_INVERTED>;
 104                 brightness-levels = <
 105                         0   1   51  52  52  53  53  54
 106                         54  55  55  56  56  57  57  58
 107                         58  59  59  60  61  61  62  63
 108                         63  64  65  65  66  67  67  68
 109                         69  69  70  71  71  72  73  73
 110                         74  75  75  76  77  77  78  79
 111                         79  80  80  81  81  82  83  83
 112                         84  85  86  86  87  88  89  89
 113                         90  91  92  92  93  94  95  95
 114                         96  97  98  98  99 100 101  101
 115                         102 103 104 104 105 106 107 107
 116                         108 109 110 110 111 112 113 113
 117                         114 115 116 116 117 118 119 119
 118                         120 121 122 122 123 124 125 125
 119                         126 127 128 128 129 130 131 131
 120                         132 133 134 134 135 136 137 137
 121                         138 139 140 140 141 142 143 143
 122                         144 145 146 146 147 148 149 149
 123                         150 151 152 152 153 154 155 155
 124                         156 157 158 158 159 160 161 161
 125                         162 163 164 164 165 166 167 167
 126                         168 169 170 170 171 172 173 173
 127                         174 175 176 176 177 178 179 179
 128                         180 181 182 182 183 184 185 185
 129                         186 187 188 188 189 190 191 191
 130                         216 217 218 218 219 220 221 221
 131                         222 223 224 224 225 226 227 227
 132                         228 229 230 230 231 232 233 233
 133                         234 235 236 236 237 238 239 239
 134                         240 241 242 242 243 244 245 245
 135                         246 247 248 248 249 250 251 251
 136                         252 253 254 254 255 255 255 255>;
 137                 default-brightness-level = <200>;
 138                 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
 139         };
 140
 141         vcc_phy: vcc-phy-regulator {
 142                 compatible = "regulator-fixed";
 143                 regulator-name = "vcc_phy";
 144                 regulator-always-on;
 145                 regulator-boot-on;
 146         };
 147
 148         io-domains {
 149                 compatible = "rockchip,rk3399-io-voltage-domain";
 150                 rockchip,grf = <&grf>;
 151
 152                 bt656-supply = <&vcc1v8_dvp>;
 153                 audio-supply = <&vcca1v8_codec>;
 154                 sdmmc-supply = <&vcc_sd>;
 155                 gpio1830-supply = <&vcc_3v0>;
 156         };
 157
 158         pmu-io-domains {
 159                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
 160                 rockchip,grf = <&pmugrf>;
 161
 162                 pmu1830-supply = <&vcc_1v8>;
 163         };
 164
 165         es8316-sound {
 166                 compatible = "simple-audio-card";
 167                 simple-audio-card,format = "i2s";
 168                 simple-audio-card,name = "rockchip,es8316-codec";
 169                 simple-audio-card,mclk-fs = <256>;
 170                 simple-audio-card,widgets =
 171                         "Microphone", "Mic Jack",
 172                         "Headphone", "Headphone Jack";
 173                 simple-audio-card,routing =
 174                         "Mic Jack", "MICBIAS1",
 175                         "IN1P", "Mic Jack",
 176                         "Headphone Jack", "HPOL",
 177                         "Headphone Jack", "HPOR";
 178                 simple-audio-card,cpu {
 179                         sound-dai = <&i2s0>;
 180                 };
 181                 simple-audio-card,codec {
 182                         sound-dai = <&es8316>;
 183                 };
 184         };
 185
 186         spdif-sound {
 187                 compatible = "simple-audio-card";
 188                 simple-audio-card,name = "rockchip,spdif";
 189                 simple-audio-card,cpu {
 190                         sound-dai = <&spdif>;
 191                 };
 192                 simple-audio-card,codec {
 193                         sound-dai = <&spdif_out>;
 194                 };
 195         };
 196
 197         spdif_out: spdif-out {
 198                 compatible = "linux,spdif-dit";
 199                 #sound-dai-cells = <0>;
 200         };
 201
 202         sdio_pwrseq: sdio-pwrseq {
 203                 compatible = "mmc-pwrseq-simple";
 204                 clocks = <&rk818 1>;
 205                 clock-names = "ext_clock";
 206                 pinctrl-names = "default";
 207                 pinctrl-0 = <&wifi_enable_h>;
 208
 209                 /*
 210                  * On the module itself this is one of these (depending
 211                  * on the actual card populated):
 212                  * - SDIO_RESET_L_WL_REG_ON
 213                  * - PDN (power down when low)
 214                  */
 215                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
 216         };
 217
 218         wireless-wlan {
 219                 compatible = "wlan-platdata";
 220                 rockchip,grf = <&grf>;
 221                 wifi_chip_type = "ap6354";
 222                 sdio_vref = <1800>;
 223                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
 224                 status = "okay";
 225         };
 226
 227         wireless-bluetooth {
 228                 compatible = "bluetooth-platdata";
 229                 clocks = <&rk818 1>;
 230                 clock-names = "ext_clock";
 231                 //wifi-bt-power-toggle;
 232                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
 233                 pinctrl-names = "default", "rts_gpio";
 234                 pinctrl-0 = <&uart0_rts>;
 235                 pinctrl-1 = <&uart0_gpios>;
 236                 //BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
 237                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
 238                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
 239                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
 240                 status = "okay";
 241         };
 242
 243         uboot-charge {
 244                 compatible = "rockchip,uboot-charge";
 245                 rockchip,uboot-charge-on = <0>;
 246                 rockchip,android-charge-on = <1>;
 247         };
 248
 249         vibrator {
 250                 compatible = "rk-vibrator-gpio";
 251                 vibrator-gpio = <&gpio4 30 GPIO_ACTIVE_LOW>;
 252                 status = "okay";
 253         };
 254 };
 255
 256 &dfi {
 257         status = "okay";
 258 };
 259
 260 &dmc {
 261         status = "okay";
 262         center-supply = <&vdd_center>;
 263         upthreshold = <38>;
 264         downdifferential = <20>;
 265 };
 266
 267 &dmc_opp_table {
 268         opp@300000000 {
 269                 opp-hz = /bits/ 64 <300000000>;
 270                 opp-microvolt = <900000>;
 271         };
 272         opp@400000000 {
 273                 opp-hz = /bits/ 64 <400000000>;
 274                 opp-microvolt = <900000>;
 275         };
 276         opp@528000000 {
 277                 opp-hz = /bits/ 64 <528000000>;
 278                 opp-microvolt = <900000>;
 279         };
 280         opp@600000000 {
 281                 opp-hz = /bits/ 64 <600000000>;
 282                 opp-microvolt = <900000>;
 283         };
 284         opp@666000000 {
 285                 opp-hz = /bits/ 64 <666000000>;
 286                 opp-microvolt = <900000>;
 287                 opp-suspend;
 288         };
 289 };
 290
 291 &cluster0_opp {
 292         opp@408000000 {
 293                 opp-hz = /bits/ 64 <408000000>;
 294                 opp-microvolt = <800000>;
 295                 clock-latency-ns = <40000>;
 296         };
 297         opp@600000000 {
 298                 opp-hz = /bits/ 64 <600000000>;
 299                 opp-microvolt = <800000>;
 300         };
 301         opp@816000000 {
 302                 opp-hz = /bits/ 64 <816000000>;
 303                 opp-microvolt = <800000>;
 304         };
 305         opp@1008000000 {
 306                 opp-hz = /bits/ 64 <1008000000>;
 307                 opp-microvolt = <875000>;
 308         };
 309         opp@1200000000 {
 310                 opp-hz = /bits/ 64 <1200000000>;
 311                 opp-microvolt = <925000>;
 312         };
 313         opp@1416000000 {
 314                 opp-hz = /bits/ 64 <1416000000>;
 315                 opp-microvolt = <1050000>;
 316         };
 317         opp@1512000000 {
 318                 opp-hz = /bits/ 64 <1512000000>;
 319                 opp-microvolt = <1100000>;
 320                 status="disabled";
 321         };
 322 };
 323
 324 &cluster1_opp {
 325         opp@408000000 {
 326                 opp-hz = /bits/ 64 <408000000>;
 327                 opp-microvolt = <800000>;
 328                 clock-latency-ns = <40000>;
 329         };
 330         opp@600000000 {
 331                 opp-hz = /bits/ 64 <600000000>;
 332                 opp-microvolt = <800000>;
 333         };
 334         opp@816000000 {
 335                 opp-hz = /bits/ 64 <816000000>;
 336                 opp-microvolt = <825000>;
 337         };
 338         opp@1008000000 {
 339                 opp-hz = /bits/ 64 <1008000000>;
 340                 opp-microvolt = <875000>;
 341         };
 342         opp@1200000000 {
 343                 opp-hz = /bits/ 64 <1200000000>;
 344                 opp-microvolt = <950000>;
 345         };
 346         opp@1416000000 {
 347                 opp-hz = /bits/ 64 <1416000000>;
 348                 opp-microvolt = <1025000>;
 349         };
 350         opp@1608000000 {
 351                 opp-hz = /bits/ 64 <1608000000>;
 352                 opp-microvolt = <1100000>;
 353         };
 354         opp@1800000000 {
 355                 opp-hz = /bits/ 64 <1800000000>;
 356                 opp-microvolt = <1175000>;
 357         };
 358         opp@1992000000 {
 359                 opp-hz = /bits/ 64 <1992000000>;
 360                 opp-microvolt = <1250000>;
 361         };
 362 };
 363
 364 &CPU_COST_A72 {
 365         busy-cost-data = <
 366                 210   129       /*  408MHz */
 367                 308   184       /*  600MHz */
 368                 419   246       /*  816MHz */
 369                 518   335       /* 1008MHz */
 370                 617   428       /* 1200MHz */
 371                 728   573       /* 1416MHz */
 372                 827   724       /* 1608MHz */
 373                 925   900       /* 1800MHz */
 374                 1024  1108      /* 1992MHz */
 375         >;
 376         idle-cost-data = <
 377               15
 378               15
 379                0
 380         >;
 381 };
 382
 383 &CPU_COST_A53 {
 384         busy-cost-data = <
 385                 108    46       /*  408M */
 386                 159    67       /*  600M */
 387                 216    90       /*  816M */
 388                 267    120      /* 1008M */
 389                 318    153      /* 1200M */
 390                 375    198      /* 1416M */
 391                 401    222      /* 1512M */
 392         >;
 393         idle-cost-data = <
 394               6
 395               6
 396               0
 397         >;
 398 };
 399
 400 &CLUSTER_COST_A72 {
 401         busy-cost-data = <
 402                 210   129       /*  408MHz */
 403                 308   184       /*  600MHz */
 404                 419   246       /*  816MHz */
 405                 518   335       /* 1008MHz */
 406                 617   428       /* 1200MHz */
 407                 728   573       /* 1416MHz */
 408                 827   724       /* 1608MHz */
 409                 925   900       /* 1800MHz */
 410                 1024  1108      /* 1992MHz */
 411         >;
 412         idle-cost-data = <
 413                  65
 414                  65
 415                  65
 416         >;
 417 };
 418
 419 &CLUSTER_COST_A53 {
 420         busy-cost-data = <
 421                 108    46       /*  408M */
 422                 159    67       /*  600M */
 423                 216    90       /*  816M */
 424                 267    120      /* 1008M */
 425                 318    153      /* 1200M */
 426                 375    198      /* 1416M */
 427                 401    222      /* 1512M */
 428         >;
 429         idle-cost-data = <
 430                 56
 431                 56
 432                 56
 433         >;
 434 };
 435
 436 &gpu_opp_table {
 437         compatible = "operating-points-v2";
 438         opp-shared;
 439         opp@200000000 {
 440                 opp-hz = /bits/ 64 <200000000>;
 441                 opp-microvolt = <825000>;
 442         };
 443         opp@300000000 {
 444                 opp-hz = /bits/ 64 <300000000>;
 445                 opp-microvolt = <850000>;
 446         };
 447         opp@400000000 {
 448                 opp-hz = /bits/ 64 <400000000>;
 449                 opp-microvolt = <875000>;
 450         };
 451         opp@500000000 {
 452                 opp-hz = /bits/ 64 <500000000>;
 453                 opp-microvolt = <950000>;
 454         };
 455         opp@600000000 {
 456                 opp-hz = /bits/ 64 <600000000>;
 457                 opp-microvolt = <1025000>;
 458         };
 459         opp@800000000 {
 460                 opp-hz = /bits/ 64 <800000000>;
 461                 opp-microvolt = <1125000>;
 462         };
 463 };
 464
 465 &rk_key {
 466         compatible = "rockchip,key";
 467         status = "okay";
 468
 469         io-channels = <&saradc 1>;
 470
 471         vol-up-key {
 472                 linux,code = <114>;
 473                 label = "volume up";
 474                 rockchip,adc_value = <1>;
 475         };
 476
 477         vol-down-key {
 478                 linux,code = <115>;
 479                 label = "volume down";
 480                 rockchip,adc_value = <170>;
 481         };
 482
 483         power-key {
 484                 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
 485                 linux,code = <116>;
 486                 label = "power";
 487                 gpio-key,wakeup;
 488         };
 489
 490         menu-key {
 491                 linux,code = <59>;
 492                 label = "menu";
 493                 rockchip,adc_value = <746>;
 494         };
 495
 496         home-key {
 497                 linux,code = <102>;
 498                 label = "home";
 499                 rockchip,adc_value = <355>;
 500         };
 501
 502         back-key {
 503                 linux,code = <158>;
 504                 label = "back";
 505                 rockchip,adc_value = <560>;
 506         };
 507
 508         camera-key {
 509                 linux,code = <212>;
 510                 label = "camera";
 511                 rockchip,adc_value = <450>;
 512         };
 513 };
 514
 515 &sdmmc {
 516         clock-frequency = <50000000>;
 517         clock-freq-min-max = <400000 150000000>;
 518         supports-sd;
 519         bus-width = <4>;
 520         cap-mmc-highspeed;
 521         cap-sd-highspeed;
 522         disable-wp;
 523         num-slots = <1>;
 524         //sd-uhs-sdr104;
 525         vqmmc-supply = <&vcc_sd>;
 526         pinctrl-names = "default";
 527         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
 528         status = "okay";
 529 };
 530
 531 &sdio0 {
 532         clock-frequency = <150000000>;
 533         clock-freq-min-max = <200000 150000000>;
 534         supports-sdio;
 535         bus-width = <4>;
 536         disable-wp;
 537         cap-sd-highspeed;
 538         cap-sdio-irq;
 539         keep-power-in-suspend;
 540         mmc-pwrseq = <&sdio_pwrseq>;
 541         non-removable;
 542         num-slots = <1>;
 543         pinctrl-names = "default";
 544         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
 545         sd-uhs-sdr104;
 546         status = "okay";
 547 };
 548
 549 &emmc_phy {
 550         status = "okay";
 551 };
 552
 553 &sdhci {
 554         bus-width = <8>;
 555         mmc-hs400-1_8v;
 556         supports-emmc;
 557         non-removable;
 558         keep-power-in-suspend;
 559         mmc-hs400-enhanced-strobe;
 560         status = "okay";
 561 };
 562
 563 &i2s0 {
 564         status = "okay";
 565         rockchip,i2s-broken-burst-len;
 566         rockchip,playback-channels = <8>;
 567         rockchip,capture-channels = <8>;
 568         #sound-dai-cells = <0>;
 569 };
 570
 571 &i2s2 {
 572         #sound-dai-cells = <0>;
 573 };
 574
 575 &spdif {
 576         status = "okay";
 577         #sound-dai-cells = <0>;
 578 };
 579
 580 &i2c0 {
 581         status = "okay";
 582         i2c-scl-rising-time-ns = <180>;
 583         i2c-scl-falling-time-ns = <30>;
 584         clock-frequency = <400000>;
 585
 586         vdd_cpu_b: syr837@40 {
 587                 compatible = "silergy,syr827";
 588                 reg = <0x40>;
 589                 vin-supply = <&vcc_sys>;
 590                 regulator-compatible = "fan53555-reg";
 591                 pinctrl-0 = <&vsel1_gpio>;
 592                 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
 593                 regulator-name = "vdd_cpu_b";
 594                 regulator-min-microvolt = <712500>;
 595                 regulator-max-microvolt = <1500000>;
 596                 regulator-ramp-delay = <1000>;
 597                 fcs,suspend-voltage-selector = <1>;
 598                 regulator-always-on;
 599                 regulator-initial-state = <3>;
 600                 regulator-state-mem {
 601                         regulator-off-in-suspend;
 602                 };
 603         };
 604
 605         vdd_gpu: syr828@41 {
 606                 compatible = "silergy,syr828";
 607                 status = "okay";
 608                 reg = <0x41>;
 609                 vin-supply = <&vcc_sys>;
 610                 regulator-compatible = "fan53555-reg";
 611                 pinctrl-0 = <&vsel2_gpio>;
 612                 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
 613                 regulator-name = "vdd_gpu";
 614                 regulator-min-microvolt = <735000>;
 615                 regulator-max-microvolt = <1400000>;
 616                 regulator-ramp-delay = <1000>;
 617                 fcs,suspend-voltage-selector = <1>;
 618                 regulator-boot-on;
 619                 regulator-state-mem {
 620                         regulator-off-in-suspend;
 621                 };
 622         };
 623
 624         rk818: pmic@1c {
 625                 compatible = "rockchip,rk818";
 626                 status = "okay";
 627                 reg = <0x1c>;
 628                 clock-output-names = "xin32k", "wifibt_32kin";
 629                 interrupt-parent = <&gpio1>;
 630                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 631                 pinctrl-names = "default";
 632                 pinctrl-0 = <&pmic_int_l>;
 633                 rockchip,system-power-controller;
 634                 rk818,support_dc_chg = <1>;/*1: dc chg; 0:usb chg*/
 635                 wakeup-source;
 636                 extcon = <&fusb0>;
 637                 #clock-cells = <1>;
 638
 639                 vcc1-supply = <&vcc_sys>;
 640                 vcc2-supply = <&vcc_sys>;
 641                 vcc3-supply = <&vcc_sys>;
 642                 vcc4-supply = <&vcc_sys>;
 643                 vcc6-supply = <&vcc_sys>;
 644                 vcc7-supply = <&vcc3v3_sys>;
 645                 vcc8-supply = <&vcc_sys>;
 646                 vcc9-supply = <&vcc3v3_sys>;
 647
 648                 regulators {
 649                         vdd_cpu_l: DCDC_REG1 {
 650                                 regulator-name = "vdd_cpu_l";
 651                                 regulator-always-on;
 652                                 regulator-boot-on;
 653                                 regulator-min-microvolt = <750000>;
 654                                 regulator-max-microvolt = <1350000>;
 655                                 regulator-ramp-delay = <6001>;
 656                                 regulator-state-mem {
 657                                         regulator-off-in-suspend;
 658                                 };
 659                         };
 660
 661                         vdd_center: DCDC_REG2 {
 662                                 regulator-name = "vdd_center";
 663                                 regulator-always-on;
 664                                 regulator-boot-on;
 665                                 regulator-min-microvolt = <800000>;
 666                                 regulator-max-microvolt = <1350000>;
 667                                 regulator-ramp-delay = <6001>;
 668                                 regulator-state-mem {
 669                                         regulator-off-in-suspend;
 670                                 };
 671                         };
 672
 673                         vcc_ddr: DCDC_REG3 {
 674                                 regulator-name = "vcc_ddr";
 675                                 regulator-always-on;
 676                                 regulator-boot-on;
 677                                 regulator-state-mem {
 678                                         regulator-on-in-suspend;
 679                                 };
 680                         };
 681
 682                         vcc_1v8: DCDC_REG4 {
 683                                 regulator-name = "vcc_1v8";
 684                                 regulator-always-on;
 685                                 regulator-boot-on;
 686                                 regulator-min-microvolt = <1800000>;
 687                                 regulator-max-microvolt = <1800000>;
 688                                 regulator-state-mem {
 689                                         regulator-on-in-suspend;
 690                                         regulator-suspend-microvolt = <1800000>;
 691                                 };
 692                         };
 693
 694                         vcca3v0_codec: LDO_REG1 {
 695                                 regulator-always-on;
 696                                 regulator-boot-on;
 697                                 regulator-min-microvolt = <3000000>;
 698                                 regulator-max-microvolt = <3000000>;
 699                                 regulator-name = "vcca3v0_codec";
 700                                 regulator-state-mem {
 701                                         regulator-off-in-suspend;
 702                                 };
 703                         };
 704
 705                         vcc3v0_tp: LDO_REG2 {
 706                                 regulator-always-on;
 707                                 regulator-boot-on;
 708                                 regulator-min-microvolt = <3000000>;
 709                                 regulator-max-microvolt = <3000000>;
 710                                 regulator-name = "vcc3v0_tp";
 711                                 regulator-state-mem {
 712                                         regulator-off-in-suspend;
 713                                 };
 714                         };
 715
 716                         vcca1v8_codec: LDO_REG3 {
 717                                 regulator-always-on;
 718                                 regulator-boot-on;
 719                                 regulator-min-microvolt = <1800000>;
 720                                 regulator-max-microvolt = <1800000>;
 721                                 regulator-name = "vcca1v8_codec";
 722                                 regulator-state-mem {
 723                                         regulator-off-in-suspend;
 724                                 };
 725                         };
 726
 727                         vcc_power_on: LDO_REG4 {
 728                                 regulator-always-on;
 729                                 regulator-boot-on;
 730                                 regulator-min-microvolt = <3300000>;
 731                                 regulator-max-microvolt = <3300000>;
 732                                 regulator-name = "vcc_power_on";
 733                                 regulator-state-mem {
 734                                         regulator-on-in-suspend;
 735                                         regulator-suspend-microvolt = <3300000>;
 736                                 };
 737                         };
 738
 739                         vcc_3v0: LDO_REG5 {
 740                                 regulator-always-on;
 741                                 regulator-boot-on;
 742                                 regulator-min-microvolt = <3000000>;
 743                                 regulator-max-microvolt = <3000000>;
 744                                 regulator-name = "vcc_3v0";
 745                                 regulator-state-mem {
 746                                         regulator-on-in-suspend;
 747                                         regulator-suspend-microvolt = <3000000>;
 748                                 };
 749                         };
 750
 751                         vcc_1v5: LDO_REG6 {
 752                                 regulator-always-on;
 753                                 regulator-boot-on;
 754                                 regulator-min-microvolt = <1500000>;
 755                                 regulator-max-microvolt = <1500000>;
 756                                 regulator-name = "vcc_1v5";
 757                                 regulator-state-mem {
 758                                         regulator-on-in-suspend;
 759                                         regulator-suspend-microvolt = <1500000>;
 760                                 };
 761                         };
 762
 763                         vcc1v8_dvp: LDO_REG7 {
 764                                 regulator-always-on;
 765                                 regulator-boot-on;
 766                                 regulator-min-microvolt = <1800000>;
 767                                 regulator-max-microvolt = <1800000>;
 768                                 regulator-name = "vcc1v8_dvp";
 769                                 regulator-state-mem {
 770                                         regulator-off-in-suspend;
 771                                 };
 772                         };
 773
 774                         vcc3v3_s3: LDO_REG8 {
 775                                 regulator-always-on;
 776                                 regulator-boot-on;
 777                                 regulator-min-microvolt = <3300000>;
 778                                 regulator-max-microvolt = <3300000>;
 779                                 regulator-name = "vcc3v3_s3";
 780                                 regulator-state-mem {
 781                                         regulator-off-in-suspend;
 782                                 };
 783                         };
 784
 785                         vcc_sd: LDO_REG9 {
 786                                 regulator-always-on;
 787                                 regulator-boot-on;
 788                                 regulator-min-microvolt = <1800000>;
 789                                 regulator-max-microvolt = <3300000>;
 790                                 regulator-name = "vcc_sd";
 791                                 regulator-state-mem {
 792                                         regulator-on-in-suspend;
 793                                         regulator-suspend-microvolt = <3300000>;
 794                                 };
 795                         };
 796
 797                         vcc3v3_s0: SWITCH_REG {
 798                                 regulator-always-on;
 799                                 regulator-boot-on;
 800                                 regulator-name = "vcc3v3_s0";
 801                                 regulator-state-mem {
 802                                         regulator-on-in-suspend;
 803                                 };
 804                         };
 805                 };
 806
 807                 battery {
 808                         compatible = "rk818-battery";
 809                         ocv_table = <3400 3675 3689 3716 3740 3756 3768 3780
 810                                 3793 3807 3827 3853 3896 3937 3974 4007 4066
 811                                 4110 4161 4217 4308>;
 812                         design_capacity = <7916>;
 813                         design_qmax = <8708>;
 814                         bat_res = <65>;
 815                         max_input_current = <3000>;
 816                         max_chrg_current = <3000>;
 817                         max_chrg_voltage = <4350>;
 818                         sleep_enter_current = <300>;
 819                         sleep_exit_current = <300>;
 820                         power_off_thresd = <3400>;
 821                         zero_algorithm_vol = <3950>;
 822                         fb_temperature = <105>;
 823                         sample_res = <20>;
 824                         max_soc_offset = <60>;
 825                         energy_mode = <0>;
 826                         monitor_sec = <5>;
 827                         virtual_power = <0>;
 828                         power_dc2otg = <0>;
 829                 };
 830         };
 831 };
 832
 833 &i2c1 {
 834         status = "okay";
 835         i2c-scl-rising-time-ns = <140>;
 836         i2c-scl-falling-time-ns = <30>;
 837
 838         es8316: es8316@10 {
 839                 #sound-dai-cells = <0>;
 840                 compatible = "everest,es8316";
 841                 reg = <0x11>;
 842                 pinctrl-names = "default";
 843                 pinctrl-0 = <&hp_det>;
 844                 clocks = <&cru SCLK_I2S_8CH_OUT>;
 845                 clock-names = "mclk";
 846                 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
 847                 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
 848         };
 849 };
 850
 851 &i2c4 {
 852         status = "okay";
 853         i2c-scl-rising-time-ns = <345>;
 854         i2c-scl-falling-time-ns = <11>;
 855         clock-frequency = <400000>;
 856
 857         lsm330_accel@1e {
 858                 status = "okay";
 859                 compatible = "lsm330_acc";
 860                 pinctrl-names = "default";
 861                 pinctrl-0 = <&lsm330a_irq_gpio>;
 862                 reg = <0x1e>;
 863                 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
 864                 type = <SENSOR_TYPE_ACCEL>;
 865                 irq_enable = <1>;
 866                 poll_delay_ms = <30>;
 867                 power-off-in-suspend = <1>;
 868                 layout = <4>;
 869         };
 870
 871         lsm330_gyro@6a {
 872                 status = "okay";
 873                 compatible = "lsm330_gyro";
 874                 pinctrl-names = "default";
 875                 pinctrl-0 = <&lsm330g_irq_gpio>;
 876                 reg = <0x6a>;
 877                 irq-gpio = <&gpio1 20 IRQ_TYPE_EDGE_RISING>;
 878                 type = <SENSOR_TYPE_GYROSCOPE>;
 879                 irq_enable = <0>;
 880                 power-off-in-suspend = <1>;
 881                 poll_delay_ms = <30>;
 882         };
 883
 884         mpu6500@68 {
 885                 status = "disabled";
 886                 compatible = "invensense,mpu6500";
 887                 pinctrl-names = "default";
 888                 pinctrl-0 = <&mpu6500_irq_gpio>;
 889                 reg = <0x68>;
 890                 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
 891                 mpu-int_config = <0x10>;
 892                 mpu-level_shifter = <0>;
 893                 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
 894                 orientation-x= <1>;
 895                 orientation-y= <1>;
 896                 orientation-z= <0>;
 897                 support-hw-poweroff = <1>;
 898                 mpu-debug = <1>;
 899         };
 900
 901         sensor@0d {
 902                 status = "okay";
 903                 compatible = "ak8963";
 904                 pinctrl-names = "default";
 905                 pinctrl-0 = <&ak8963_irq_gpio>;
 906                 reg = <0x0d>;
 907                 type = <SENSOR_TYPE_COMPASS>;
 908                 irq-gpio = <&gpio2 28 IRQ_TYPE_EDGE_RISING>;
 909                 irq_enable = <0>;
 910                 poll_delay_ms = <30>;
 911                 layout = <3>;
 912         };
 913
 914         sensor@10 {
 915                 status = "okay";
 916                 compatible = "capella,light_cm3218";
 917                 pinctrl-names = "default";
 918                 pinctrl-0 = <&cm3218_irq_gpio>;
 919                 reg = <0x10>;
 920                 type = <SENSOR_TYPE_LIGHT>;
 921                 irq-gpio = <&gpio4 24 IRQ_TYPE_EDGE_FALLING>;
 922                 irq_enable = <1>;
 923                 poll_delay_ms = <30>;
 924         };
 925
 926         fusb0: fusb30x@22 {
 927                 compatible = "fairchild,fusb302";
 928                 reg = <0x22>;
 929                 pinctrl-names = "default";
 930                 pinctrl-0 = <&fusb0_int>;
 931                 int-n-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
 932                 status = "okay";
 933         };
 934 };
 935
 936 &i2c5 {
 937         status = "okay";
 938         i2c-scl-rising-time-ns = <150>;
 939         i2c-scl-falling-time-ns = <30>;
 940         clock-frequency = <400000>;
 941
 942         gt9xx: gt9xx@14 {
 943                 compatible = "goodix,gt9xx";
 944                 reg = <0x14>;
 945                 touch-gpio = <&gpio3 12 IRQ_TYPE_LEVEL_LOW>;
 946                 reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
 947                 max-x = <1536>;
 948                 max-y = <2048>;
 949                 tp-size = <970>;
 950                 tp-supply = <&vcc3v0_tp>;
 951         };
 952 };
 953
 954 &isp0 {
 955         status = "okay";
 956 };
 957
 958 &isp1 {
 959         status = "okay";
 960 };
 961
 962 &cpu_l0 {
 963         cpu-supply = <&vdd_cpu_l>;
 964 };
 965
 966 &cpu_l1 {
 967         cpu-supply = <&vdd_cpu_l>;
 968 };
 969
 970 &cpu_l2 {
 971         cpu-supply = <&vdd_cpu_l>;
 972 };
 973
 974 &cpu_l3 {
 975         cpu-supply = <&vdd_cpu_l>;
 976 };
 977
 978 &cpu_b0 {
 979         cpu-supply = <&vdd_cpu_b>;
 980 };
 981
 982 &cpu_b1 {
 983         cpu-supply = <&vdd_cpu_b>;
 984 };
 985
 986 &gpu {
 987         status = "okay";
 988         mali-supply = <&vdd_gpu>;
 989 };
 990
 991 &rga {
 992         status = "okay";
 993 };
 994
 995 &spi1 {
 996         status = "disabled";
 997         max-freq = <50000000>;
 998         mpu6500@0 {
 999                 status = "disabled";
1000                 compatible = "inv-spi,mpu6500";
1001                 pinctrl-names = "default";
1002                 pinctrl-0 = <&mpu6500_irq_gpio>;
1003                 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
1004                 reg = <0>;
1005                 spi-max-frequency = <1000000>;
1006                 spi-cpha;
1007                 spi-cpol;
1008                 mpu-int_config = <0x00>;
1009                 mpu-level_shifter = <0>;
1010                 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
1011                 orientation-x= <1>;
1012                 orientation-y= <0>;
1013                 orientation-z= <1>;
1014                 support-hw-poweroff = <1>;
1015                 mpu-debug = <1>;
1016         };
1017 };
1018
1019 &tcphy0 {
1020         extcon = <&fusb0>;
1021         status = "okay";
1022 };
1023
1024 &tsadc {
1025         rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
1026         rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
1027         status = "okay";
1028 };
1029
1030 &u2phy0 {
1031         status = "okay";
1032         extcon = <&fusb0>;
1033
1034         u2phy0_otg: otg-port {
1035                 status = "okay";
1036         };
1037
1038         u2phy0_host: host-port {
1039                 phy-supply = <&vcc5v0_host>;
1040                 status = "okay";
1041         };
1042 };
1043
1044 &uart0 {
1045         pinctrl-names = "default";
1046         pinctrl-0 = <&uart0_xfer &uart0_cts>;
1047         status = "okay";
1048 };
1049
1050 &uart2 {
1051         status = "okay";
1052 };
1053
1054 &usb_host0_ehci {
1055         status = "okay";
1056 };
1057
1058 &usb_host0_ohci {
1059         status = "okay";
1060 };
1061
1062 &usbdrd3_0 {
1063         extcon = <&fusb0>;
1064         status = "okay";
1065 };
1066
1067 &usbdrd_dwc3_0 {
1068         status = "okay";
1069 };
1070
1071 &vop0_pwm {
1072         assigned-clocks = <&cru SCLK_VOP0_PWM>;
1073         assigned-clock-rates = <50000000>;
1074         status = "okay";
1075 };
1076
1077 &pwm2 {
1078         status = "okay";
1079 };
1080
1081 &saradc {
1082         status = "okay";
1083 };
1084
1085 &pinctrl {
1086         sdio-pwrseq {
1087                 wifi_enable_h: wifi-enable-h {
1088                         rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
1089                 };
1090         };
1091
1092         wireless-bluetooth {
1093                 uart0_gpios: uart0-gpios {
1094                         rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
1095                 };
1096         };
1097
1098         pmic {
1099                 pmic_int_l: pmic-int-l {
1100                         rockchip,pins =
1101                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
1102                 };
1103
1104                 pmic_dvs2: pmic-dvs2 {
1105                         rockchip,pins =
1106                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
1107                 };
1108                 vsel1_gpio: vsel1-gpio {
1109                         rockchip,pins =
1110                                 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
1111                 };
1112                 vsel2_gpio: vsel2-gpio {
1113                         rockchip,pins =
1114                                 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
1115                 };
1116         };
1117
1118         hallsensor {
1119                 mh248_irq_gpio: mh248-irq-gpio {
1120                         rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
1121                 };
1122         };
1123
1124         headphone {
1125                 hp_det: hp-det {
1126                         rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;
1127                 };
1128         };
1129
1130         lcdpwr-enable {
1131                 lcdpwr_enable_h: lcdpwr-enable-h {
1132                         rockchip,pins = <3 8 RK_FUNC_GPIO &pcfg_pull_up>;
1133                 };
1134         };
1135
1136         lsm330_a {
1137                 lsm330a_irq_gpio: lsm330a-irq-gpio {
1138                         rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1139                 };
1140         };
1141
1142         lsm330_g {
1143                 lsm330g_irq_gpio: lsm330g-irq-gpio {
1144                         rockchip,pins = <1 20 RK_FUNC_GPIO &pcfg_pull_none>;
1145                 };
1146         };
1147
1148         mpu6500 {
1149                 mpu6500_irq_gpio: mpu6500-irq-gpio {
1150                         rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1151                 };
1152         };
1153
1154         ak8963 {
1155                 ak8963_irq_gpio: ak8963-irq-gpio {
1156                         rockchip,pins = <2 28 RK_FUNC_GPIO &pcfg_pull_none>;
1157                 };
1158         };
1159
1160         cm3218 {
1161                 cm3218_irq_gpio: cm3218-irq-gpio {
1162                         rockchip,pins = <4 24 RK_FUNC_GPIO &pcfg_pull_up>;
1163                 };
1164         };
1165
1166         usb2 {
1167                 host_vbus_drv: host-vbus-drv {
1168                         rockchip,pins =
1169                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
1170                 };
1171         };
1172
1173         fusb30x {
1174                 fusb0_int: fusb0-int {
1175                         rockchip,pins =
1176                                 <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
1177                 };
1178         };
1179 };
1180
1181 &rk_screen {
1182         #include <dt-bindings/display/screen-timing/lcd-LP097Qx2.dtsi>
1183 };
1184
1185 &cdn_dp_sound {
1186         status = "okay";
1187 };
1188
1189 &cdn_dp_fb {
1190         status = "okay";
1191         extcon = <&fusb0>;
1192         phys = <&tcphy0_dp>;
1193         dp_vop_sel = <DISPLAY_SOURCE_LCDC1>;
1194 };
1195
1196 &vopb_rk_fb {
1197         status = "okay";
1198         rockchip,cabc_mode = <1>;
1199         power_ctr: power_ctr {
1200                 rockchip,debug = <0>;
1201
1202                 lcd_en: lcd-en {
1203                         rockchip,power_type = <GPIO>;
1204                         pinctrl-names = "default";
1205                         pinctrl-0 = <&lcdpwr_enable_h>;
1206                         gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
1207                         rockchip,delay = <10>;
1208                 };
1209         };
1210 };
1211
1212 &vopl_rk_fb {
1213         status = "okay";
1214 };
1215
1216 &edp_rk_fb {
1217         status = "okay";
1218 };