arch/arm64/boot/dts/rockchip/rk3399-mid-818-android.dts

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 /dts-v1/;
  44
  45 #include "rk3399.dtsi"
  46 #include "rk3399-android.dtsi"
  47 #include <dt-bindings/sensor-dev.h>
  48 #include <dt-bindings/pwm/pwm.h>
  49
  50 / {
  51         compatible = "rockchip,rk3399-mid", "rockchip,rk3399";
  52
  53         hall_sensor: hall-mh248 {
  54                 compatible = "hall-mh248";
  55                 pinctrl-names = "default";
  56                 pinctrl-0 = <&mh248_irq_gpio>;
  57                 irq-gpio = <&gpio1 2 IRQ_TYPE_EDGE_BOTH>;
  58                 hall-active = <1>;
  59                 status = "okay";
  60         };
  61
  62         vcc_sys: vcc-sys {
  63                 compatible = "regulator-fixed";
  64                 regulator-name = "vcc_sys";
  65                 regulator-always-on;
  66                 regulator-boot-on;
  67                 regulator-min-microvolt = <3900000>;
  68                 regulator-max-microvolt = <3900000>;
  69         };
  70
  71         vcc3v3_sys: vcc3v3-sys {
  72                 compatible = "regulator-fixed";
  73                 regulator-name = "vcc3v3_sys";
  74                 regulator-always-on;
  75                 regulator-boot-on;
  76                 regulator-min-microvolt = <3300000>;
  77                 regulator-max-microvolt = <3300000>;
  78         };
  79
  80         vcc5v0_host: vcc5v0-host-regulator {
  81                 compatible = "regulator-fixed";
  82                 enable-active-high;
  83                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
  84                 pinctrl-names = "default";
  85                 pinctrl-0 = <&host_vbus_drv>;
  86                 regulator-name = "vcc5v0_host";
  87         };
  88
  89         vdd_log: vdd-log {
  90                 compatible = "pwm-regulator";
  91                 pwms = <&pwm2 0 25000 0>;
  92                 rockchip,pwm_id= <2>;
  93                 rockchip,pwm_voltage = <900000>;
  94                 regulator-name = "vdd_log";
  95                 regulator-min-microvolt = <750000>;
  96                 regulator-max-microvolt = <1350000>;
  97                 regulator-always-on;
  98                 regulator-boot-on;
  99         };
 100
 101         backlight: backlight {
 102                 compatible = "pwm-backlight";
 103                 pwms = <&vop0_pwm 0 25000 PWM_POLARITY_INVERTED>;
 104                 brightness-levels = <
 105                         0  255  51  51  52  53  53  54
 106                         54  55  56  56  57  57  58  59
 107                         59  60  60  61  62  62  63  63
 108                         64  65  65  66  66  67  68  68
 109                         69  69  70  71  71  72  72  73
 110                         74  74  75  75  76  77  77  78
 111                         78  79  80  80  81  81  82  83
 112                         83  84  85  85  86  86  87  88
 113                         88  89  89  90  91  91  92  92
 114                         93  94  94  95  95  96  97  97
 115                         98  98  99  100 100 101 101 102
 116                         103 103 104 104 105 106 106 107
 117                         107 108 109 109 110 110 111 112
 118                         112 113 113 114 114 115 116 116
 119                         117 118 118 119 119 120 120 121
 120                         122 122 123 123 124 125 125 126
 121                         126 127 128 128 129 129 130 131
 122                         131 132 132 133 133 134 135 135
 123                         136 137 138 138 139 140 140 141
 124                         141 142 143 143 144 144 145 146
 125                         146 147 148 148 149 149 149 150
 126                         150 151 151 151 152 152 152 153
 127                         153 153 154 154 155 156 156 157
 128                         157 158 159 159 160 160 161 161
 129                         162 163 163 164 165 165 166 166
 130                         167 168 168 169 169 170 171 171
 131                         172 172 173 174 174 175 175 176
 132                         176 177 178 178 179 179 180 181
 133                         181 182 183 183 184 185 185 186
 134                         186 187 188 188 189 189 190 190
 135                         191 191 192 193 193 194 194 195
 136                         196 197 197 198 199 199 200 200>;
 137                 default-brightness-level = <200>;
 138                 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
 139         };
 140
 141         vcc_phy: vcc-phy-regulator {
 142                 compatible = "regulator-fixed";
 143                 regulator-name = "vcc_phy";
 144                 regulator-always-on;
 145                 regulator-boot-on;
 146         };
 147
 148         io-domains {
 149                 compatible = "rockchip,rk3399-io-voltage-domain";
 150                 rockchip,grf = <&grf>;
 151
 152                 bt656-supply = <&vcc1v8_dvp>;
 153                 audio-supply = <&vcca1v8_codec>;
 154                 sdmmc-supply = <&vcc_sd>;
 155                 gpio1830-supply = <&vcc_3v0>;
 156         };
 157
 158         pmu-io-domains {
 159                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
 160                 rockchip,grf = <&pmugrf>;
 161
 162                 pmu1830-supply = <&vcc_1v8>;
 163         };
 164
 165         es8316-sound {
 166                 compatible = "simple-audio-card";
 167                 simple-audio-card,format = "i2s";
 168                 simple-audio-card,name = "rockchip,es8316-codec";
 169                 simple-audio-card,mclk-fs = <256>;
 170                 simple-audio-card,widgets =
 171                         "Microphone", "Mic Jack",
 172                         "Headphone", "Headphone Jack";
 173                 simple-audio-card,routing =
 174                         "Mic Jack", "MICBIAS1",
 175                         "IN1P", "Mic Jack",
 176                         "Headphone Jack", "HPOL",
 177                         "Headphone Jack", "HPOR";
 178                 simple-audio-card,cpu {
 179                         sound-dai = <&i2s0>;
 180                 };
 181                 simple-audio-card,codec {
 182                         sound-dai = <&es8316>;
 183                 };
 184         };
 185
 186         spdif-sound {
 187                 compatible = "simple-audio-card";
 188                 simple-audio-card,name = "rockchip,spdif";
 189                 simple-audio-card,cpu {
 190                         sound-dai = <&spdif>;
 191                 };
 192                 simple-audio-card,codec {
 193                         sound-dai = <&spdif_out>;
 194                 };
 195         };
 196
 197         spdif_out: spdif-out {
 198                 compatible = "linux,spdif-dit";
 199                 #sound-dai-cells = <0>;
 200         };
 201
 202         sdio_pwrseq: sdio-pwrseq {
 203                 compatible = "mmc-pwrseq-simple";
 204                 clocks = <&rk818 1>;
 205                 clock-names = "ext_clock";
 206                 pinctrl-names = "default";
 207                 pinctrl-0 = <&wifi_enable_h>;
 208
 209                 /*
 210                  * On the module itself this is one of these (depending
 211                  * on the actual card populated):
 212                  * - SDIO_RESET_L_WL_REG_ON
 213                  * - PDN (power down when low)
 214                  */
 215                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
 216         };
 217
 218         wireless-wlan {
 219                 compatible = "wlan-platdata";
 220                 rockchip,grf = <&grf>;
 221                 wifi_chip_type = "ap6354";
 222                 sdio_vref = <1800>;
 223                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
 224                 status = "okay";
 225         };
 226
 227         wireless-bluetooth {
 228                 compatible = "bluetooth-platdata";
 229                 clocks = <&rk818 1>;
 230                 clock-names = "ext_clock";
 231                 //wifi-bt-power-toggle;
 232                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
 233                 pinctrl-names = "default", "rts_gpio";
 234                 pinctrl-0 = <&uart0_rts>;
 235                 pinctrl-1 = <&uart0_gpios>;
 236                 //BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
 237                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
 238                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
 239                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
 240                 status = "okay";
 241         };
 242
 243         uboot-charge {
 244                 compatible = "rockchip,uboot-charge";
 245                 rockchip,uboot-charge-on = <0>;
 246                 rockchip,android-charge-on = <1>;
 247         };
 248
 249         vibrator {
 250                 compatible = "rk-vibrator-gpio";
 251                 vibrator-gpio = <&gpio4 30 GPIO_ACTIVE_LOW>;
 252                 status = "okay";
 253         };
 254 };
 255
 256 &dfi {
 257         status = "okay";
 258 };
 259
 260 &dmc {
 261         status = "okay";
 262         center-supply = <&vdd_center>;
 263         upthreshold = <38>;
 264         downdifferential = <20>;
 265 };
 266
 267 &dmc_opp_table {
 268         opp@300000000 {
 269                 opp-hz = /bits/ 64 <300000000>;
 270                 opp-microvolt = <900000>;
 271         };
 272         opp@400000000 {
 273                 opp-hz = /bits/ 64 <400000000>;
 274                 opp-microvolt = <900000>;
 275         };
 276         opp@528000000 {
 277                 opp-hz = /bits/ 64 <528000000>;
 278                 opp-microvolt = <900000>;
 279         };
 280         opp@600000000 {
 281                 opp-hz = /bits/ 64 <600000000>;
 282                 opp-microvolt = <900000>;
 283         };
 284         opp@666000000 {
 285                 opp-hz = /bits/ 64 <666000000>;
 286                 opp-microvolt = <900000>;
 287                 opp-suspend;
 288         };
 289 };
 290
 291 &cluster0_opp {
 292         opp@408000000 {
 293                 opp-hz = /bits/ 64 <408000000>;
 294                 opp-microvolt = <800000>;
 295                 clock-latency-ns = <40000>;
 296         };
 297         opp@600000000 {
 298                 opp-hz = /bits/ 64 <600000000>;
 299                 opp-microvolt = <800000>;
 300         };
 301         opp@816000000 {
 302                 opp-hz = /bits/ 64 <816000000>;
 303                 opp-microvolt = <800000>;
 304         };
 305         opp@1008000000 {
 306                 opp-hz = /bits/ 64 <1008000000>;
 307                 opp-microvolt = <875000>;
 308         };
 309         opp@1200000000 {
 310                 opp-hz = /bits/ 64 <1200000000>;
 311                 opp-microvolt = <925000>;
 312         };
 313         opp@1416000000 {
 314                 opp-hz = /bits/ 64 <1416000000>;
 315                 opp-microvolt = <1050000>;
 316         };
 317         opp@1512000000 {
 318                 opp-hz = /bits/ 64 <1512000000>;
 319                 opp-microvolt = <1100000>;
 320                 status="disabled";
 321         };
 322 };
 323
 324 &cluster1_opp {
 325         opp@408000000 {
 326                 opp-hz = /bits/ 64 <408000000>;
 327                 opp-microvolt = <800000>;
 328                 clock-latency-ns = <40000>;
 329         };
 330         opp@600000000 {
 331                 opp-hz = /bits/ 64 <600000000>;
 332                 opp-microvolt = <800000>;
 333         };
 334         opp@816000000 {
 335                 opp-hz = /bits/ 64 <816000000>;
 336                 opp-microvolt = <825000>;
 337         };
 338         opp@1008000000 {
 339                 opp-hz = /bits/ 64 <1008000000>;
 340                 opp-microvolt = <875000>;
 341         };
 342         opp@1200000000 {
 343                 opp-hz = /bits/ 64 <1200000000>;
 344                 opp-microvolt = <950000>;
 345         };
 346         opp@1416000000 {
 347                 opp-hz = /bits/ 64 <1416000000>;
 348                 opp-microvolt = <1025000>;
 349         };
 350         opp@1608000000 {
 351                 opp-hz = /bits/ 64 <1608000000>;
 352                 opp-microvolt = <1100000>;
 353         };
 354         opp@1800000000 {
 355                 opp-hz = /bits/ 64 <1800000000>;
 356                 opp-microvolt = <1175000>;
 357         };
 358         opp@1992000000 {
 359                 opp-hz = /bits/ 64 <1992000000>;
 360                 opp-microvolt = <1250000>;
 361         };
 362 };
 363
 364 &CPU_COST_A72 {
 365         busy-cost-data = <
 366                 210   129       /*  408MHz */
 367                 308   184       /*  600MHz */
 368                 419   246       /*  816MHz */
 369                 518   335       /* 1008MHz */
 370                 617   428       /* 1200MHz */
 371                 728   573       /* 1416MHz */
 372                 827   724       /* 1608MHz */
 373                 925   900       /* 1800MHz */
 374                 1024  1108      /* 1992MHz */
 375         >;
 376         idle-cost-data = <
 377               15
 378               15
 379                0
 380         >;
 381 };
 382
 383 &CPU_COST_A53 {
 384         busy-cost-data = <
 385                 108    46       /*  408M */
 386                 159    67       /*  600M */
 387                 216    90       /*  816M */
 388                 267    120      /* 1008M */
 389                 318    153      /* 1200M */
 390                 375    198      /* 1416M */
 391                 401    222      /* 1512M */
 392         >;
 393         idle-cost-data = <
 394               6
 395               6
 396               0
 397         >;
 398 };
 399
 400 &CLUSTER_COST_A72 {
 401         busy-cost-data = <
 402                 210   129       /*  408MHz */
 403                 308   184       /*  600MHz */
 404                 419   246       /*  816MHz */
 405                 518   335       /* 1008MHz */
 406                 617   428       /* 1200MHz */
 407                 728   573       /* 1416MHz */
 408                 827   724       /* 1608MHz */
 409                 925   900       /* 1800MHz */
 410                 1024  1108      /* 1992MHz */
 411         >;
 412         idle-cost-data = <
 413                  65
 414                  65
 415                  65
 416         >;
 417 };
 418
 419 &CLUSTER_COST_A53 {
 420         busy-cost-data = <
 421                 108    46       /*  408M */
 422                 159    67       /*  600M */
 423                 216    90       /*  816M */
 424                 267    120      /* 1008M */
 425                 318    153      /* 1200M */
 426                 375    198      /* 1416M */
 427                 401    222      /* 1512M */
 428         >;
 429         idle-cost-data = <
 430                 56
 431                 56
 432                 56
 433         >;
 434 };
 435
 436 &gpu_opp_table {
 437         compatible = "operating-points-v2";
 438         opp-shared;
 439         opp@200000000 {
 440                 opp-hz = /bits/ 64 <200000000>;
 441                 opp-microvolt = <825000>;
 442         };
 443         opp@300000000 {
 444                 opp-hz = /bits/ 64 <300000000>;
 445                 opp-microvolt = <850000>;
 446         };
 447         opp@400000000 {
 448                 opp-hz = /bits/ 64 <400000000>;
 449                 opp-microvolt = <875000>;
 450         };
 451         opp@500000000 {
 452                 opp-hz = /bits/ 64 <500000000>;
 453                 opp-microvolt = <950000>;
 454         };
 455         opp@600000000 {
 456                 opp-hz = /bits/ 64 <600000000>;
 457                 opp-microvolt = <1025000>;
 458         };
 459         opp@800000000 {
 460                 opp-hz = /bits/ 64 <800000000>;
 461                 opp-microvolt = <1125000>;
 462         };
 463 };
 464
 465 &rk_key {
 466         compatible = "rockchip,key";
 467         status = "okay";
 468
 469         io-channels = <&saradc 1>;
 470
 471         vol-up-key {
 472                 linux,code = <114>;
 473                 label = "volume up";
 474                 rockchip,adc_value = <1>;
 475         };
 476
 477         vol-down-key {
 478                 linux,code = <115>;
 479                 label = "volume down";
 480                 rockchip,adc_value = <170>;
 481         };
 482
 483         power-key {
 484                 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
 485                 linux,code = <116>;
 486                 label = "power";
 487                 gpio-key,wakeup;
 488         };
 489
 490         menu-key {
 491                 linux,code = <59>;
 492                 label = "menu";
 493                 rockchip,adc_value = <746>;
 494         };
 495
 496         home-key {
 497                 linux,code = <102>;
 498                 label = "home";
 499                 rockchip,adc_value = <355>;
 500         };
 501
 502         back-key {
 503                 linux,code = <158>;
 504                 label = "back";
 505                 rockchip,adc_value = <560>;
 506         };
 507
 508         camera-key {
 509                 linux,code = <212>;
 510                 label = "camera";
 511                 rockchip,adc_value = <450>;
 512         };
 513 };
 514
 515 &sdmmc {
 516         clock-frequency = <50000000>;
 517         clock-freq-min-max = <400000 150000000>;
 518         supports-sd;
 519         bus-width = <4>;
 520         cap-mmc-highspeed;
 521         cap-sd-highspeed;
 522         disable-wp;
 523         num-slots = <1>;
 524         sd-uhs-sdr104;
 525         vqmmc-supply = <&vcc_sd>;
 526         pinctrl-names = "default";
 527         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
 528         status = "okay";
 529 };
 530
 531 &sdio0 {
 532         clock-frequency = <150000000>;
 533         clock-freq-min-max = <200000 150000000>;
 534         supports-sdio;
 535         bus-width = <4>;
 536         disable-wp;
 537         cap-sd-highspeed;
 538         cap-sdio-irq;
 539         keep-power-in-suspend;
 540         mmc-pwrseq = <&sdio_pwrseq>;
 541         non-removable;
 542         num-slots = <1>;
 543         pinctrl-names = "default";
 544         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
 545         sd-uhs-sdr104;
 546         status = "okay";
 547 };
 548
 549 &emmc_phy {
 550         freq-sel = <200000000>;
 551         dr-sel = <50>;
 552         opdelay = <4>;
 553         status = "okay";
 554 };
 555
 556 &sdhci {
 557         bus-width = <8>;
 558         mmc-hs400-1_8v;
 559         supports-emmc;
 560         non-removable;
 561         mmc-hs400-enhanced-strobe;
 562         status = "okay";
 563 };
 564
 565 &i2s0 {
 566         status = "okay";
 567         rockchip,i2s-broken-burst-len;
 568         rockchip,playback-channels = <8>;
 569         rockchip,capture-channels = <8>;
 570         #sound-dai-cells = <0>;
 571 };
 572
 573 &i2s2 {
 574         #sound-dai-cells = <0>;
 575 };
 576
 577 &spdif {
 578         status = "okay";
 579         #sound-dai-cells = <0>;
 580 };
 581
 582 &i2c0 {
 583         status = "okay";
 584         i2c-scl-rising-time-ns = <180>;
 585         i2c-scl-falling-time-ns = <30>;
 586         clock-frequency = <400000>;
 587
 588         vdd_cpu_b: syr837@40 {
 589                 compatible = "silergy,syr827";
 590                 reg = <0x40>;
 591                 vin-supply = <&vcc_sys>;
 592                 regulator-compatible = "fan53555-reg";
 593                 pinctrl-0 = <&vsel1_gpio>;
 594                 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
 595                 regulator-name = "vdd_cpu_b";
 596                 regulator-min-microvolt = <712500>;
 597                 regulator-max-microvolt = <1500000>;
 598                 regulator-ramp-delay = <1000>;
 599                 fcs,suspend-voltage-selector = <1>;
 600                 regulator-always-on;
 601                 regulator-initial-state = <3>;
 602                 regulator-state-mem {
 603                         regulator-off-in-suspend;
 604                 };
 605         };
 606
 607         vdd_gpu: syr828@41 {
 608                 compatible = "silergy,syr828";
 609                 status = "okay";
 610                 reg = <0x41>;
 611                 vin-supply = <&vcc_sys>;
 612                 regulator-compatible = "fan53555-reg";
 613                 pinctrl-0 = <&vsel2_gpio>;
 614                 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
 615                 regulator-name = "vdd_gpu";
 616                 regulator-min-microvolt = <735000>;
 617                 regulator-max-microvolt = <1400000>;
 618                 regulator-ramp-delay = <1000>;
 619                 fcs,suspend-voltage-selector = <1>;
 620                 regulator-boot-on;
 621                 regulator-state-mem {
 622                         regulator-off-in-suspend;
 623                 };
 624         };
 625
 626         rk818: pmic@1c {
 627                 compatible = "rockchip,rk818";
 628                 status = "okay";
 629                 reg = <0x1c>;
 630                 clock-output-names = "xin32k", "wifibt_32kin";
 631                 interrupt-parent = <&gpio1>;
 632                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 633                 pinctrl-names = "default";
 634                 pinctrl-0 = <&pmic_int_l>;
 635                 rockchip,system-power-controller;
 636                 rk818,support_dc_chg = <1>;/*1: dc chg; 0:usb chg*/
 637                 wakeup-source;
 638                 extcon = <&fusb0>;
 639                 #clock-cells = <1>;
 640
 641                 vcc1-supply = <&vcc_sys>;
 642                 vcc2-supply = <&vcc_sys>;
 643                 vcc3-supply = <&vcc_sys>;
 644                 vcc4-supply = <&vcc_sys>;
 645                 vcc6-supply = <&vcc_sys>;
 646                 vcc7-supply = <&vcc3v3_sys>;
 647                 vcc8-supply = <&vcc_sys>;
 648                 vcc9-supply = <&vcc3v3_sys>;
 649
 650                 regulators {
 651                         vdd_cpu_l: DCDC_REG1 {
 652                                 regulator-name = "vdd_cpu_l";
 653                                 regulator-always-on;
 654                                 regulator-boot-on;
 655                                 regulator-min-microvolt = <750000>;
 656                                 regulator-max-microvolt = <1350000>;
 657                                 regulator-ramp-delay = <6001>;
 658                                 regulator-state-mem {
 659                                         regulator-off-in-suspend;
 660                                 };
 661                         };
 662
 663                         vdd_center: DCDC_REG2 {
 664                                 regulator-name = "vdd_center";
 665                                 regulator-always-on;
 666                                 regulator-boot-on;
 667                                 regulator-min-microvolt = <800000>;
 668                                 regulator-max-microvolt = <1350000>;
 669                                 regulator-ramp-delay = <6001>;
 670                                 regulator-state-mem {
 671                                         regulator-off-in-suspend;
 672                                 };
 673                         };
 674
 675                         vcc_ddr: DCDC_REG3 {
 676                                 regulator-name = "vcc_ddr";
 677                                 regulator-always-on;
 678                                 regulator-boot-on;
 679                                 regulator-state-mem {
 680                                         regulator-on-in-suspend;
 681                                 };
 682                         };
 683
 684                         vcc_1v8: DCDC_REG4 {
 685                                 regulator-name = "vcc_1v8";
 686                                 regulator-always-on;
 687                                 regulator-boot-on;
 688                                 regulator-min-microvolt = <1800000>;
 689                                 regulator-max-microvolt = <1800000>;
 690                                 regulator-state-mem {
 691                                         regulator-on-in-suspend;
 692                                         regulator-suspend-microvolt = <1800000>;
 693                                 };
 694                         };
 695
 696                         vcca3v0_codec: LDO_REG1 {
 697                                 regulator-always-on;
 698                                 regulator-boot-on;
 699                                 regulator-min-microvolt = <3000000>;
 700                                 regulator-max-microvolt = <3000000>;
 701                                 regulator-name = "vcca3v0_codec";
 702                                 regulator-state-mem {
 703                                         regulator-off-in-suspend;
 704                                 };
 705                         };
 706
 707                         vcc3v0_tp: LDO_REG2 {
 708                                 regulator-always-on;
 709                                 regulator-boot-on;
 710                                 regulator-min-microvolt = <3000000>;
 711                                 regulator-max-microvolt = <3000000>;
 712                                 regulator-name = "vcc3v0_tp";
 713                                 regulator-state-mem {
 714                                         regulator-off-in-suspend;
 715                                 };
 716                         };
 717
 718                         vcca1v8_codec: LDO_REG3 {
 719                                 regulator-always-on;
 720                                 regulator-boot-on;
 721                                 regulator-min-microvolt = <1800000>;
 722                                 regulator-max-microvolt = <1800000>;
 723                                 regulator-name = "vcca1v8_codec";
 724                                 regulator-state-mem {
 725                                         regulator-off-in-suspend;
 726                                 };
 727                         };
 728
 729                         vcc_power_on: LDO_REG4 {
 730                                 regulator-always-on;
 731                                 regulator-boot-on;
 732                                 regulator-min-microvolt = <3300000>;
 733                                 regulator-max-microvolt = <3300000>;
 734                                 regulator-name = "vcc_power_on";
 735                                 regulator-state-mem {
 736                                         regulator-on-in-suspend;
 737                                         regulator-suspend-microvolt = <3300000>;
 738                                 };
 739                         };
 740
 741                         vcc_3v0: LDO_REG5 {
 742                                 regulator-always-on;
 743                                 regulator-boot-on;
 744                                 regulator-min-microvolt = <3000000>;
 745                                 regulator-max-microvolt = <3000000>;
 746                                 regulator-name = "vcc_3v0";
 747                                 regulator-state-mem {
 748                                         regulator-off-in-suspend;
 749                                 };
 750                         };
 751
 752                         vcc_1v5: LDO_REG6 {
 753                                 regulator-always-on;
 754                                 regulator-boot-on;
 755                                 regulator-min-microvolt = <1500000>;
 756                                 regulator-max-microvolt = <1500000>;
 757                                 regulator-name = "vcc_1v5";
 758                                 regulator-state-mem {
 759                                         regulator-off-in-suspend;
 760                                 };
 761                         };
 762
 763                         vcc1v8_dvp: LDO_REG7 {
 764                                 regulator-always-on;
 765                                 regulator-boot-on;
 766                                 regulator-min-microvolt = <1800000>;
 767                                 regulator-max-microvolt = <1800000>;
 768                                 regulator-name = "vcc1v8_dvp";
 769                                 regulator-state-mem {
 770                                         regulator-off-in-suspend;
 771                                 };
 772                         };
 773
 774                         vcc3v3_s3: LDO_REG8 {
 775                                 regulator-always-on;
 776                                 regulator-boot-on;
 777                                 regulator-min-microvolt = <3300000>;
 778                                 regulator-max-microvolt = <3300000>;
 779                                 regulator-name = "vcc3v3_s3";
 780                                 regulator-state-mem {
 781                                         regulator-off-in-suspend;
 782                                 };
 783                         };
 784
 785                         vcc_sd: LDO_REG9 {
 786                                 regulator-always-on;
 787                                 regulator-boot-on;
 788                                 regulator-min-microvolt = <1800000>;
 789                                 regulator-max-microvolt = <3300000>;
 790                                 regulator-name = "vcc_sd";
 791                                 regulator-state-mem {
 792                                         regulator-on-in-suspend;
 793                                         regulator-suspend-microvolt = <3300000>;
 794                                 };
 795                         };
 796
 797                         vcc3v3_s0: SWITCH_REG {
 798                                 regulator-always-on;
 799                                 regulator-boot-on;
 800                                 regulator-name = "vcc3v3_s0";
 801                                 regulator-state-mem {
 802                                         regulator-on-in-suspend;
 803                                 };
 804                         };
 805                 };
 806
 807                 battery {
 808                         compatible = "rk818-battery";
 809                         ocv_table = <3400 3675 3689 3716 3740 3756 3768 3780
 810                                 3793 3807 3827 3853 3896 3937 3974 4007 4066
 811                                 4110 4161 4217 4308>;
 812                         design_capacity = <7916>;
 813                         design_qmax = <8708>;
 814                         bat_res = <65>;
 815                         max_input_current = <3000>;
 816                         max_chrg_current = <3000>;
 817                         max_chrg_voltage = <4350>;
 818                         sleep_enter_current = <300>;
 819                         sleep_exit_current = <300>;
 820                         power_off_thresd = <3400>;
 821                         zero_algorithm_vol = <3950>;
 822                         fb_temperature = <105>;
 823                         sample_res = <20>;
 824                         max_soc_offset = <60>;
 825                         energy_mode = <0>;
 826                         monitor_sec = <5>;
 827                         virtual_power = <0>;
 828                         power_dc2otg = <0>;
 829                 };
 830         };
 831 };
 832
 833 &i2c1 {
 834         status = "okay";
 835         i2c-scl-rising-time-ns = <140>;
 836         i2c-scl-falling-time-ns = <30>;
 837
 838         es8316: es8316@10 {
 839                 #sound-dai-cells = <0>;
 840                 compatible = "everest,es8316";
 841                 reg = <0x11>;
 842                 pinctrl-names = "default";
 843                 pinctrl-0 = <&hp_det>;
 844                 clocks = <&cru SCLK_I2S_8CH_OUT>;
 845                 clock-names = "mclk";
 846                 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
 847                 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
 848         };
 849 };
 850
 851 &i2c4 {
 852         status = "okay";
 853         i2c-scl-rising-time-ns = <345>;
 854         i2c-scl-falling-time-ns = <11>;
 855         clock-frequency = <400000>;
 856
 857         lsm330_accel@1e {
 858                 status = "okay";
 859                 compatible = "lsm330_acc";
 860                 pinctrl-names = "default";
 861                 pinctrl-0 = <&lsm330a_irq_gpio>;
 862                 reg = <0x1e>;
 863                 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
 864                 type = <SENSOR_TYPE_ACCEL>;
 865                 irq_enable = <1>;
 866                 poll_delay_ms = <30>;
 867                 layout = <4>;
 868         };
 869
 870         lsm330_gyro@6a {
 871                 status = "okay";
 872                 compatible = "lsm330_gyro";
 873                 pinctrl-names = "default";
 874                 pinctrl-0 = <&lsm330g_irq_gpio>;
 875                 reg = <0x6a>;
 876                 irq-gpio = <&gpio1 20 IRQ_TYPE_EDGE_RISING>;
 877                 type = <SENSOR_TYPE_GYROSCOPE>;
 878                 irq_enable = <0>;
 879                 poll_delay_ms = <30>;
 880         };
 881
 882         mpu6500@68 {
 883                 status = "disabled";
 884                 compatible = "invensense,mpu6500";
 885                 pinctrl-names = "default";
 886                 pinctrl-0 = <&mpu6500_irq_gpio>;
 887                 reg = <0x68>;
 888                 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
 889                 mpu-int_config = <0x10>;
 890                 mpu-level_shifter = <0>;
 891                 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
 892                 orientation-x= <1>;
 893                 orientation-y= <1>;
 894                 orientation-z= <0>;
 895                 support-hw-poweroff = <1>;
 896                 mpu-debug = <1>;
 897         };
 898
 899         sensor@0d {
 900                 status = "okay";
 901                 compatible = "ak8963";
 902                 pinctrl-names = "default";
 903                 pinctrl-0 = <&ak8963_irq_gpio>;
 904                 reg = <0x0d>;
 905                 type = <SENSOR_TYPE_COMPASS>;
 906                 irq-gpio = <&gpio2 28 IRQ_TYPE_EDGE_RISING>;
 907                 irq_enable = <0>;
 908                 poll_delay_ms = <30>;
 909                 layout = <3>;
 910         };
 911
 912         sensor@10 {
 913                 status = "okay";
 914                 compatible = "capella,light_cm3218";
 915                 pinctrl-names = "default";
 916                 pinctrl-0 = <&cm3218_irq_gpio>;
 917                 reg = <0x10>;
 918                 type = <SENSOR_TYPE_LIGHT>;
 919                 irq-gpio = <&gpio4 24 IRQ_TYPE_EDGE_FALLING>;
 920                 irq_enable = <1>;
 921                 poll_delay_ms = <30>;
 922         };
 923
 924         fusb0: fusb30x@22 {
 925                 compatible = "fairchild,fusb302";
 926                 reg = <0x22>;
 927                 pinctrl-names = "default";
 928                 pinctrl-0 = <&fusb0_int>;
 929                 int-n-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
 930                 status = "okay";
 931         };
 932 };
 933
 934 &i2c5 {
 935         status = "okay";
 936         i2c-scl-rising-time-ns = <150>;
 937         i2c-scl-falling-time-ns = <30>;
 938         clock-frequency = <400000>;
 939
 940         gt9xx: gt9xx@14 {
 941                 compatible = "goodix,gt9xx";
 942                 reg = <0x14>;
 943                 touch-gpio = <&gpio3 12 IRQ_TYPE_LEVEL_LOW>;
 944                 reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
 945                 max-x = <1536>;
 946                 max-y = <2048>;
 947                 tp-size = <970>;
 948                 tp-supply = <&vcc3v0_tp>;
 949         };
 950 };
 951
 952 &isp0 {
 953         status = "okay";
 954 };
 955
 956 &isp1 {
 957         status = "okay";
 958 };
 959
 960 &cpu_l0 {
 961         cpu-supply = <&vdd_cpu_l>;
 962 };
 963
 964 &cpu_l1 {
 965         cpu-supply = <&vdd_cpu_l>;
 966 };
 967
 968 &cpu_l2 {
 969         cpu-supply = <&vdd_cpu_l>;
 970 };
 971
 972 &cpu_l3 {
 973         cpu-supply = <&vdd_cpu_l>;
 974 };
 975
 976 &cpu_b0 {
 977         cpu-supply = <&vdd_cpu_b>;
 978 };
 979
 980 &cpu_b1 {
 981         cpu-supply = <&vdd_cpu_b>;
 982 };
 983
 984 &gpu {
 985         status = "okay";
 986         mali-supply = <&vdd_gpu>;
 987 };
 988
 989 &rga {
 990         status = "okay";
 991 };
 992
 993 &spi1 {
 994         status = "disabled";
 995         max-freq = <50000000>;
 996         mpu6500@0 {
 997                 status = "disabled";
 998                 compatible = "inv-spi,mpu6500";
 999                 pinctrl-names = "default";
1000                 pinctrl-0 = <&mpu6500_irq_gpio>;
1001                 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
1002                 reg = <0>;
1003                 spi-max-frequency = <1000000>;
1004                 spi-cpha;
1005                 spi-cpol;
1006                 mpu-int_config = <0x00>;
1007                 mpu-level_shifter = <0>;
1008                 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
1009                 orientation-x= <1>;
1010                 orientation-y= <0>;
1011                 orientation-z= <1>;
1012                 support-hw-poweroff = <1>;
1013                 mpu-debug = <1>;
1014         };
1015 };
1016
1017 &tcphy0 {
1018         extcon = <&fusb0>;
1019         status = "okay";
1020 };
1021
1022 &tsadc {
1023         rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
1024         rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
1025         status = "okay";
1026 };
1027
1028 &u2phy0 {
1029         status = "okay";
1030         extcon = <&fusb0>;
1031
1032         u2phy0_otg: otg-port {
1033                 status = "okay";
1034         };
1035
1036         u2phy0_host: host-port {
1037                 phy-supply = <&vcc5v0_host>;
1038                 status = "okay";
1039         };
1040 };
1041
1042 &uart0 {
1043         pinctrl-names = "default";
1044         pinctrl-0 = <&uart0_xfer &uart0_cts>;
1045         status = "okay";
1046 };
1047
1048 &uart2 {
1049         status = "okay";
1050 };
1051
1052 &usb_host0_ehci {
1053         status = "okay";
1054 };
1055
1056 &usb_host0_ohci {
1057         status = "okay";
1058 };
1059
1060 &usbdrd3_0 {
1061         extcon = <&fusb0>;
1062         status = "okay";
1063 };
1064
1065 &usbdrd_dwc3_0 {
1066         status = "okay";
1067 };
1068
1069 &vop0_pwm {
1070         assigned-clocks = <&cru SCLK_VOP0_PWM>;
1071         assigned-clock-rates = <50000000>;
1072         status = "okay";
1073 };
1074
1075 &pwm2 {
1076         status = "okay";
1077 };
1078
1079 &saradc {
1080         status = "okay";
1081 };
1082
1083 &pinctrl {
1084         sdio-pwrseq {
1085                 wifi_enable_h: wifi-enable-h {
1086                         rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
1087                 };
1088         };
1089
1090         wireless-bluetooth {
1091                 uart0_gpios: uart0-gpios {
1092                         rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
1093                 };
1094         };
1095
1096         pmic {
1097                 pmic_int_l: pmic-int-l {
1098                         rockchip,pins =
1099                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
1100                 };
1101
1102                 pmic_dvs2: pmic-dvs2 {
1103                         rockchip,pins =
1104                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
1105                 };
1106                 vsel1_gpio: vsel1-gpio {
1107                         rockchip,pins =
1108                                 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
1109                 };
1110                 vsel2_gpio: vsel2-gpio {
1111                         rockchip,pins =
1112                                 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
1113                 };
1114         };
1115
1116         hallsensor {
1117                 mh248_irq_gpio: mh248-irq-gpio {
1118                         rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_none>;
1119                 };
1120         };
1121
1122         headphone {
1123                 hp_det: hp-det {
1124                         rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;
1125                 };
1126         };
1127
1128         lcdpwr-enable {
1129                 lcdpwr_enable_h: lcdpwr-enable-h {
1130                         rockchip,pins = <3 8 RK_FUNC_GPIO &pcfg_pull_up>;
1131                 };
1132         };
1133
1134         lsm330_a {
1135                 lsm330a_irq_gpio: lsm330a-irq-gpio {
1136                         rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1137                 };
1138         };
1139
1140         lsm330_g {
1141                 lsm330g_irq_gpio: lsm330g-irq-gpio {
1142                         rockchip,pins = <1 20 RK_FUNC_GPIO &pcfg_pull_none>;
1143                 };
1144         };
1145
1146         mpu6500 {
1147                 mpu6500_irq_gpio: mpu6500-irq-gpio {
1148                         rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1149                 };
1150         };
1151
1152         ak8963 {
1153                 ak8963_irq_gpio: ak8963-irq-gpio {
1154                         rockchip,pins = <2 28 RK_FUNC_GPIO &pcfg_pull_none>;
1155                 };
1156         };
1157
1158         cm3218 {
1159                 cm3218_irq_gpio: cm3218-irq-gpio {
1160                         rockchip,pins = <4 24 RK_FUNC_GPIO &pcfg_pull_up>;
1161                 };
1162         };
1163
1164         usb2 {
1165                 host_vbus_drv: host-vbus-drv {
1166                         rockchip,pins =
1167                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
1168                 };
1169         };
1170
1171         fusb30x {
1172                 fusb0_int: fusb0-int {
1173                         rockchip,pins =
1174                                 <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
1175                 };
1176         };
1177 };
1178
1179 &rk_screen {
1180         #include <dt-bindings/display/screen-timing/lcd-LP097Qx2.dtsi>
1181 };
1182
1183 &vopb_rk_fb {
1184         status = "okay";
1185         rockchip,cabc_mode = <1>;
1186         power_ctr: power_ctr {
1187                 rockchip,debug = <0>;
1188
1189                 lcd_en: lcd-en {
1190                         rockchip,power_type = <GPIO>;
1191                         pinctrl-names = "default";
1192                         pinctrl-0 = <&lcdpwr_enable_h>;
1193                         gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
1194                         rockchip,delay = <10>;
1195                 };
1196         };
1197 };
1198
1199 &vopl_rk_fb {
1200         status = "okay";
1201 };
1202
1203 &edp_rk_fb {
1204         status = "okay";
1205 };