2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
45 #include "rk3399.dtsi"
46 #include "rk3399-android.dtsi"
49 compatible = "rockchip,rk3399-mid", "rockchip,rk3399";
52 compatible = "regulator-fixed";
53 regulator-name = "vcc_sys";
56 regulator-min-microvolt = <3900000>;
57 regulator-max-microvolt = <3900000>;
60 vcc3v3_sys: vcc3v3-sys {
61 compatible = "regulator-fixed";
62 regulator-name = "vcc3v3_sys";
65 regulator-min-microvolt = <3300000>;
66 regulator-max-microvolt = <3300000>;
70 compatible = "pwm-regulator";
71 pwms = <&pwm2 0 25000 0>;
73 rockchip,pwm_voltage = <900000>;
74 regulator-name = "vdd_log";
75 regulator-min-microvolt = <750000>;
76 regulator-max-microvolt = <1350000>;
81 backlight: backlight {
82 compatible = "pwm-backlight";
83 pwms = <&pwm0 0 25000 0>;
85 255 254 253 252 251 250 249 248 247 246 245 244
86 243 242 241 240 239 238 237 236 235 234 233 232
87 231 230 229 228 227 226 225 224 223 222 221 220
88 219 218 217 216 215 214 213 212 211 210 209 208
89 207 206 205 204 203 202 201 200 199 198 197 196
90 195 194 193 192 191 190 189 188 187 186 185 184
91 183 182 181 180 179 178 177 176 175 174 173 172
92 171 170 169 168 167 166 165 164 163 162 161 160
93 159 158 157 156 155 154 153 152 151 150 149 148
94 147 146 145 144 143 142 141 140 139 138 137 136
95 135 134 133 132 131 130 129 128 127 126 125 124
96 123 122 121 120 119 118 117 116 115 114 113 112
97 111 110 109 108 107 106 105 104 103 102 101 100
98 99 98 97 96 95 94 93 92 91 90 89 88
99 87 86 85 84 83 82 81 80 79 78 77 76
100 75 74 73 72 71 70 69 68 67 66 65 64
101 63 62 61 60 59 58 57 56 55 54 53 52
102 51 50 49 48 47 46 45 44 43 42 41 40
103 39 38 37 36 35 34 33 32 31 30 29 28
104 27 26 25 24 23 22 21 20 19 18 17 16
105 15 14 13 12 11 10 9 8 7 6 5 4
107 default-brightness-level = <200>;
108 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
111 vcc_phy: vcc-phy-regulator {
112 compatible = "regulator-fixed";
113 regulator-name = "vcc_phy";
119 compatible = "rockchip,rk3399-io-voltage-domain";
120 rockchip,grf = <&grf>;
122 bt656-supply = <&vcc1v8_dvp>;
123 audio-supply = <&vcca1v8_codec>;
124 sdmmc-supply = <&vcc_sd>;
125 gpio1830-supply = <&vcc_3v0>;
129 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
130 rockchip,grf = <&pmugrf>;
132 pmu1830-supply = <&vcc_1v8>;
136 compatible = "simple-audio-card";
137 simple-audio-card,format = "i2s";
138 simple-audio-card,name = "rockchip,es8316-codec";
139 simple-audio-card,mclk-fs = <256>;
140 simple-audio-card,widgets =
141 "Microphone", "Mic Jack",
142 "Headphone", "Headphone Jack";
143 simple-audio-card,routing =
144 "Mic Jack", "MICBIAS1",
146 "Headphone Jack", "HPOL",
147 "Headphone Jack", "HPOR";
148 simple-audio-card,cpu {
151 simple-audio-card,codec {
152 sound-dai = <&es8316>;
157 compatible = "simple-audio-card";
158 simple-audio-card,name = "rockchip,spdif";
159 simple-audio-card,cpu {
160 sound-dai = <&spdif>;
162 simple-audio-card,codec {
163 sound-dai = <&spdif_out>;
167 spdif_out: spdif-out {
168 compatible = "linux,spdif-dit";
169 #sound-dai-cells = <0>;
172 sdio_pwrseq: sdio-pwrseq {
173 compatible = "mmc-pwrseq-simple";
175 clock-names = "ext_clock";
176 pinctrl-names = "default";
177 pinctrl-0 = <&wifi_enable_h>;
180 * On the module itself this is one of these (depending
181 * on the actual card populated):
182 * - SDIO_RESET_L_WL_REG_ON
183 * - PDN (power down when low)
185 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
189 compatible = "wlan-platdata";
190 rockchip,grf = <&grf>;
191 wifi_chip_type = "ap6354";
193 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
198 compatible = "bluetooth-platdata";
199 //wifi-bt-power-toggle;
200 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
201 pinctrl-names = "default", "rts_gpio";
202 pinctrl-0 = <&uart0_rts>;
203 pinctrl-1 = <&uart0_gpios>;
204 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
205 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
206 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
207 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
213 clock-frequency = <50000000>;
214 clock-freq-min-max = <400000 150000000>;
222 vqmmc-supply = <&vcc_sd>;
223 pinctrl-names = "default";
224 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
229 clock-frequency = <150000000>;
230 clock-freq-min-max = <200000 150000000>;
236 keep-power-in-suspend;
237 mmc-pwrseq = <&sdio_pwrseq>;
240 pinctrl-names = "default";
241 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
247 freq-sel = <200000000>;
258 mmc-hs400-enhanced-strobe;
264 rockchip,i2s-broken-burst-len;
265 rockchip,playback-channels = <8>;
266 rockchip,capture-channels = <8>;
267 #sound-dai-cells = <0>;
272 #sound-dai-cells = <0>;
277 i2c-scl-rising-time-ns = <180>;
278 i2c-scl-falling-time-ns = <30>;
279 clock-frequency = <400000>;
282 compatible = "xz3216";
286 #address-cells = <1>;
288 vdd_cpu_b: regulator@0 {
290 vin-supply = <&vcc_sys>;
291 regulator-compatible = "xz_dcdc1";
292 regulator-name = "vdd_cpu_b";
293 regulator-min-microvolt = <712500>;
294 regulator-max-microvolt = <1500000>;
295 regulator-ramp-delay = <1000>;
296 fcs,suspend-voltage-selector = <1>;
299 regulator-state-mem {
300 regulator-off-in-suspend;
307 compatible = "silergy,syr828";
310 vin-supply = <&vcc_sys>;
311 regulator-compatible = "fan53555-reg";
312 regulator-name = "vdd_gpu";
313 regulator-min-microvolt = <735000>;
314 regulator-max-microvolt = <1400000>;
315 regulator-ramp-delay = <1000>;
316 fcs,suspend-voltage-selector = <1>;
319 regulator-state-mem {
320 regulator-off-in-suspend;
325 compatible = "rockchip,rk818";
328 clock-output-names = "xin32k", "wifibt_32kin";
329 interrupt-parent = <&gpio1>;
330 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
331 pinctrl-names = "default";
332 pinctrl-0 = <&pmic_int_l>;
333 rockchip,system-power-controller;
334 rk818,support_dc_chg = <1>;/*1: dc chg; 0:usb chg*/
338 vcc1-supply = <&vcc_sys>;
339 vcc2-supply = <&vcc_sys>;
340 vcc3-supply = <&vcc_sys>;
341 vcc4-supply = <&vcc_sys>;
342 vcc6-supply = <&vcc_sys>;
343 vcc7-supply = <&vcc3v3_sys>;
344 vcc8-supply = <&vcc_sys>;
345 vcc9-supply = <&vcc3v3_sys>;
348 vdd_cpu_l: DCDC_REG1 {
349 regulator-name = "vdd_cpu_l";
352 regulator-min-microvolt = <750000>;
353 regulator-max-microvolt = <1350000>;
354 regulator-ramp-delay = <6001>;
355 regulator-state-mem {
356 regulator-off-in-suspend;
360 vdd_center: DCDC_REG2 {
361 regulator-name = "vdd_center";
364 regulator-min-microvolt = <800000>;
365 regulator-max-microvolt = <1350000>;
366 regulator-ramp-delay = <6001>;
367 regulator-state-mem {
368 regulator-on-in-suspend;
369 regulator-suspend-microvolt = <1000000>;
374 regulator-name = "vcc_ddr";
377 regulator-state-mem {
378 regulator-on-in-suspend;
383 regulator-name = "vcc_1v8";
386 regulator-min-microvolt = <1800000>;
387 regulator-max-microvolt = <1800000>;
388 regulator-state-mem {
389 regulator-on-in-suspend;
390 regulator-suspend-microvolt = <1800000>;
394 vcca3v0_codec: LDO_REG1 {
397 regulator-min-microvolt = <3000000>;
398 regulator-max-microvolt = <3000000>;
399 regulator-name = "vcca3v0_codec";
400 regulator-state-mem {
401 regulator-off-in-suspend;
405 vcc3v0_tp: LDO_REG2 {
408 regulator-min-microvolt = <3000000>;
409 regulator-max-microvolt = <3000000>;
410 regulator-name = "vcc3v0_tp";
411 regulator-state-mem {
412 regulator-off-in-suspend;
416 vcca1v8_codec: LDO_REG3 {
419 regulator-min-microvolt = <1800000>;
420 regulator-max-microvolt = <1800000>;
421 regulator-name = "vcca1v8_codec";
422 regulator-state-mem {
423 regulator-off-in-suspend;
427 vcc_power_on: LDO_REG4 {
430 regulator-min-microvolt = <3300000>;
431 regulator-max-microvolt = <3300000>;
432 regulator-name = "vcc_power_on";
433 regulator-state-mem {
434 regulator-on-in-suspend;
435 regulator-suspend-microvolt = <3300000>;
442 regulator-min-microvolt = <3000000>;
443 regulator-max-microvolt = <3000000>;
444 regulator-name = "vcc_3v0";
445 regulator-state-mem {
446 regulator-off-in-suspend;
453 regulator-min-microvolt = <1500000>;
454 regulator-max-microvolt = <1500000>;
455 regulator-name = "vcc_1v5";
456 regulator-state-mem {
457 regulator-off-in-suspend;
461 vcc1v8_dvp: LDO_REG7 {
464 regulator-min-microvolt = <1800000>;
465 regulator-max-microvolt = <1800000>;
466 regulator-name = "vcc1v8_dvp";
467 regulator-state-mem {
468 regulator-off-in-suspend;
472 vcc3v3_s3: LDO_REG8 {
475 regulator-min-microvolt = <3300000>;
476 regulator-max-microvolt = <3300000>;
477 regulator-name = "vcc3v3_s3";
478 regulator-state-mem {
479 regulator-on-in-suspend;
480 regulator-suspend-microvolt = <3300000>;
487 regulator-min-microvolt = <3000000>;
488 regulator-max-microvolt = <3000000>;
489 regulator-name = "vcc_sd";
490 regulator-state-mem {
491 regulator-on-in-suspend;
492 regulator-suspend-microvolt = <3000000>;
496 vcc3v3_s0: SWITCH_REG {
499 regulator-name = "vcc3v3_s0";
500 regulator-state-mem {
501 regulator-on-in-suspend;
507 ocv_table = <3400 3675 3689 3716 3740 3756 3768 3780
508 3793 3807 3827 3853 3896 3937 3974 4007 4066
509 4110 4161 4217 4308>;
510 design_capacity = <7916>;
511 design_qmax = <8708>;
513 max_input_current = <3000>;
514 max_chrg_current = <4500>;
515 max_chrg_voltage = <4350>;
516 sleep_enter_current = <300>;
517 sleep_exit_current = <300>;
518 power_off_thresd = <3400>;
519 zero_algorithm_vol = <3950>;
520 fb_temperature = <115>;
521 max_soc_offset = <60>;
533 i2c-scl-rising-time-ns = <140>;
534 i2c-scl-falling-time-ns = <30>;
537 #sound-dai-cells = <0>;
538 compatible = "everest,es8316";
540 pinctrl-names = "default";
541 pinctrl-0 = <&hp_det>;
542 clocks = <&cru SCLK_I2S_8CH_OUT>;
543 clock-names = "mclk";
544 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
545 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
551 i2c-scl-rising-time-ns = <150>;
552 i2c-scl-falling-time-ns = <30>;
553 clock-frequency = <400000>;
556 compatible = "GT,Goodix-TS";
558 screen_max_x = <1536>;
559 screen_max_y = <2048>;
560 irq_gpio_number = <&gpio3 12 IRQ_TYPE_LEVEL_LOW>;
561 rst_gpio_number = <&gpio3 13 GPIO_ACTIVE_HIGH>;
566 cpu-supply = <&vdd_cpu_l>;
570 cpu-supply = <&vdd_cpu_l>;
574 cpu-supply = <&vdd_cpu_l>;
578 cpu-supply = <&vdd_cpu_l>;
582 cpu-supply = <&vdd_cpu_b>;
586 cpu-supply = <&vdd_cpu_b>;
591 mali-supply = <&vdd_gpu>;
599 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
600 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
605 pinctrl-names = "default";
606 pinctrl-0 = <&uart0_xfer &uart0_cts>;
615 vbus_drv-gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
664 wifi_enable_h: wifi-enable-h {
665 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
670 uart0_gpios: uart0-gpios {
671 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
676 pmic_int_l: pmic-int-l {
678 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
681 pmic_dvs2: pmic-dvs2 {
683 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
689 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;
694 lcdpwr_enable_h: lcdpwr-enable-h {
695 rockchip,pins = <3 8 RK_FUNC_GPIO &pcfg_pull_up>;
701 #include <dt-bindings/display/screen-timing/lcd-LP097Qx2.dtsi>
706 power_ctr: power_ctr {
707 rockchip,debug = <0>;
710 rockchip,power_type = <GPIO>;
711 pinctrl-names = "default";
712 pinctrl-0 = <&lcdpwr_enable_h>;
713 gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
714 rockchip,delay = <10>;