arch/arm64/boot/dts/rockchip/rk3399-mid-818-android.dts

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 /dts-v1/;
  44
  45 #include "rk3399.dtsi"
  46 #include "rk3399-android.dtsi"
  47 #include <dt-bindings/sensor-dev.h>
  48 #include <dt-bindings/pwm/pwm.h>
  49
  50 / {
  51         compatible = "rockchip,rk3399-mid", "rockchip,rk3399";
  52
  53         vcc_sys: vcc-sys {
  54                 compatible = "regulator-fixed";
  55                 regulator-name = "vcc_sys";
  56                 regulator-always-on;
  57                 regulator-boot-on;
  58                 regulator-min-microvolt = <3900000>;
  59                 regulator-max-microvolt = <3900000>;
  60         };
  61
  62         vcc3v3_sys: vcc3v3-sys {
  63                 compatible = "regulator-fixed";
  64                 regulator-name = "vcc3v3_sys";
  65                 regulator-always-on;
  66                 regulator-boot-on;
  67                 regulator-min-microvolt = <3300000>;
  68                 regulator-max-microvolt = <3300000>;
  69         };
  70
  71         vcc5v0_host: vcc5v0-host-regulator {
  72                 compatible = "regulator-fixed";
  73                 enable-active-high;
  74                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
  75                 pinctrl-names = "default";
  76                 pinctrl-0 = <&host_vbus_drv>;
  77                 regulator-name = "vcc5v0_host";
  78         };
  79
  80         vdd_log: vdd-log {
  81                 compatible = "pwm-regulator";
  82                 pwms = <&pwm2 0 25000 0>;
  83                 rockchip,pwm_id= <2>;
  84                 rockchip,pwm_voltage = <900000>;
  85                 regulator-name = "vdd_log";
  86                 regulator-min-microvolt = <750000>;
  87                 regulator-max-microvolt = <1350000>;
  88                 regulator-always-on;
  89                 regulator-boot-on;
  90         };
  91
  92         backlight: backlight {
  93                 compatible = "pwm-backlight";
  94                 pwms = <&vop0_pwm 0 25000 PWM_POLARITY_INVERTED>;
  95                 brightness-levels = <
  96                         0  255  51  51  52  53  53  54
  97                         54  55  56  56  57  57  58  59
  98                         59  60  60  61  62  62  63  63
  99                         64  65  65  66  66  67  68  68
 100                         69  69  70  71  71  72  72  73
 101                         74  74  75  75  76  77  77  78
 102                         78  79  80  80  81  81  82  83
 103                         83  84  85  85  86  86  87  88
 104                         88  89  89  90  91  91  92  92
 105                         93  94  94  95  95  96  97  97
 106                         98  98  99  100 100 101 101 102
 107                         103 103 104 104 105 106 106 107
 108                         107 108 109 109 110 110 111 112
 109                         112 113 113 114 114 115 116 116
 110                         117 118 118 119 119 120 120 121
 111                         122 122 123 123 124 125 125 126
 112                         126 127 128 128 129 129 130 131
 113                         131 132 132 133 133 134 135 135
 114                         136 137 138 138 139 140 140 141
 115                         141 142 143 143 144 144 145 146
 116                         146 147 148 148 149 149 149 150
 117                         150 151 151 151 152 152 152 153
 118                         153 153 154 154 155 156 156 157
 119                         157 158 159 159 160 160 161 161
 120                         162 163 163 164 165 165 166 166
 121                         167 168 168 169 169 170 171 171
 122                         172 172 173 174 174 175 175 176
 123                         176 177 178 178 179 179 180 181
 124                         181 182 183 183 184 185 185 186
 125                         186 187 188 188 189 189 190 190
 126                         191 191 192 193 193 194 194 195
 127                         196 197 197 198 199 199 200 200>;
 128                 default-brightness-level = <200>;
 129                 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
 130         };
 131
 132         vcc_phy: vcc-phy-regulator {
 133                 compatible = "regulator-fixed";
 134                 regulator-name = "vcc_phy";
 135                 regulator-always-on;
 136                 regulator-boot-on;
 137         };
 138
 139         io-domains {
 140                 compatible = "rockchip,rk3399-io-voltage-domain";
 141                 rockchip,grf = <&grf>;
 142
 143                 bt656-supply = <&vcc1v8_dvp>;
 144                 audio-supply = <&vcca1v8_codec>;
 145                 sdmmc-supply = <&vcc_sd>;
 146                 gpio1830-supply = <&vcc_3v0>;
 147         };
 148
 149         pmu-io-domains {
 150                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
 151                 rockchip,grf = <&pmugrf>;
 152
 153                 pmu1830-supply = <&vcc_1v8>;
 154         };
 155
 156         es8316-sound {
 157                 compatible = "simple-audio-card";
 158                 simple-audio-card,format = "i2s";
 159                 simple-audio-card,name = "rockchip,es8316-codec";
 160                 simple-audio-card,mclk-fs = <256>;
 161                 simple-audio-card,widgets =
 162                         "Microphone", "Mic Jack",
 163                         "Headphone", "Headphone Jack";
 164                 simple-audio-card,routing =
 165                         "Mic Jack", "MICBIAS1",
 166                         "IN1P", "Mic Jack",
 167                         "Headphone Jack", "HPOL",
 168                         "Headphone Jack", "HPOR";
 169                 simple-audio-card,cpu {
 170                         sound-dai = <&i2s0>;
 171                 };
 172                 simple-audio-card,codec {
 173                         sound-dai = <&es8316>;
 174                 };
 175         };
 176
 177         spdif-sound {
 178                 compatible = "simple-audio-card";
 179                 simple-audio-card,name = "rockchip,spdif";
 180                 simple-audio-card,cpu {
 181                         sound-dai = <&spdif>;
 182                 };
 183                 simple-audio-card,codec {
 184                         sound-dai = <&spdif_out>;
 185                 };
 186         };
 187
 188         spdif_out: spdif-out {
 189                 compatible = "linux,spdif-dit";
 190                 #sound-dai-cells = <0>;
 191         };
 192
 193         sdio_pwrseq: sdio-pwrseq {
 194                 compatible = "mmc-pwrseq-simple";
 195                 clocks = <&rk818 1>;
 196                 clock-names = "ext_clock";
 197                 pinctrl-names = "default";
 198                 pinctrl-0 = <&wifi_enable_h>;
 199
 200                 /*
 201                  * On the module itself this is one of these (depending
 202                  * on the actual card populated):
 203                  * - SDIO_RESET_L_WL_REG_ON
 204                  * - PDN (power down when low)
 205                  */
 206                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
 207         };
 208
 209         wireless-wlan {
 210                 compatible = "wlan-platdata";
 211                 rockchip,grf = <&grf>;
 212                 wifi_chip_type = "ap6354";
 213                 sdio_vref = <1800>;
 214                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
 215                 status = "okay";
 216         };
 217
 218         wireless-bluetooth {
 219                 compatible = "bluetooth-platdata";
 220                 clocks = <&rk818 1>;
 221                 clock-names = "ext_clock";
 222                 //wifi-bt-power-toggle;
 223                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
 224                 pinctrl-names = "default", "rts_gpio";
 225                 pinctrl-0 = <&uart0_rts>;
 226                 pinctrl-1 = <&uart0_gpios>;
 227                 //BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
 228                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
 229                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
 230                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
 231                 status = "okay";
 232         };
 233
 234         uboot-charge {
 235                 compatible = "rockchip,uboot-charge";
 236                 rockchip,uboot-charge-on = <0>;
 237                 rockchip,android-charge-on = <1>;
 238         };
 239 };
 240
 241 &cluster0_opp {
 242         opp@408000000 {
 243                 opp-hz = /bits/ 64 <408000000>;
 244                 opp-microvolt = <800000>;
 245                 clock-latency-ns = <40000>;
 246         };
 247         opp@600000000 {
 248                 opp-hz = /bits/ 64 <600000000>;
 249                 opp-microvolt = <800000>;
 250         };
 251         opp@816000000 {
 252                 opp-hz = /bits/ 64 <816000000>;
 253                 opp-microvolt = <800000>;
 254         };
 255         opp@1008000000 {
 256                 opp-hz = /bits/ 64 <1008000000>;
 257                 opp-microvolt = <875000>;
 258         };
 259         opp@1200000000 {
 260                 opp-hz = /bits/ 64 <1200000000>;
 261                 opp-microvolt = <925000>;
 262         };
 263         opp@1416000000 {
 264                 opp-hz = /bits/ 64 <1416000000>;
 265                 opp-microvolt = <1050000>;
 266         };
 267         opp@1512000000 {
 268                 opp-hz = /bits/ 64 <1512000000>;
 269                 opp-microvolt = <1075000>;
 270         };
 271 };
 272
 273 &cluster1_opp {
 274         opp@408000000 {
 275                 opp-hz = /bits/ 64 <408000000>;
 276                 opp-microvolt = <800000>;
 277                 clock-latency-ns = <40000>;
 278         };
 279         opp@600000000 {
 280                 opp-hz = /bits/ 64 <600000000>;
 281                 opp-microvolt = <800000>;
 282         };
 283         opp@816000000 {
 284                 opp-hz = /bits/ 64 <816000000>;
 285                 opp-microvolt = <825000>;
 286         };
 287         opp@1008000000 {
 288                 opp-hz = /bits/ 64 <1008000000>;
 289                 opp-microvolt = <875000>;
 290         };
 291         opp@1200000000 {
 292                 opp-hz = /bits/ 64 <1200000000>;
 293                 opp-microvolt = <950000>;
 294         };
 295         opp@1416000000 {
 296                 opp-hz = /bits/ 64 <1416000000>;
 297                 opp-microvolt = <1025000>;
 298         };
 299         opp@1608000000 {
 300                 opp-hz = /bits/ 64 <1608000000>;
 301                 opp-microvolt = <1100000>;
 302         };
 303         opp@1800000000 {
 304                 opp-hz = /bits/ 64 <1800000000>;
 305                 opp-microvolt = <1175000>;
 306         };
 307         opp@1992000000 {
 308                 opp-hz = /bits/ 64 <1992000000>;
 309                 opp-microvolt = <1250000>;
 310         };
 311 };
 312
 313 &gpu_opp_table {
 314         compatible = "operating-points-v2";
 315         opp-shared;
 316         opp@200000000 {
 317                 opp-hz = /bits/ 64 <200000000>;
 318                 opp-microvolt = <850000>;
 319         };
 320         opp@300000000 {
 321                 opp-hz = /bits/ 64 <300000000>;
 322                 opp-microvolt = <900000>;
 323         };
 324         opp@400000000 {
 325                 opp-hz = /bits/ 64 <400000000>;
 326                 opp-microvolt = <900000>;
 327         };
 328         opp@500000000 {
 329                 opp-hz = /bits/ 64 <500000000>;
 330                 opp-microvolt = <950000>;
 331         };
 332         opp@600000000 {
 333                 opp-hz = /bits/ 64 <600000000>;
 334                 opp-microvolt = <1000000>;
 335         };
 336         opp@800000000 {
 337                 opp-hz = /bits/ 64 <800000000>;
 338                 opp-microvolt = <1050000>;
 339         };
 340 };
 341
 342 &rk_key {
 343         compatible = "rockchip,key";
 344         status = "okay";
 345
 346         io-channels = <&saradc 1>;
 347
 348         vol-up-key {
 349                 linux,code = <114>;
 350                 label = "volume up";
 351                 rockchip,adc_value = <1>;
 352         };
 353
 354         vol-down-key {
 355                 linux,code = <115>;
 356                 label = "volume down";
 357                 rockchip,adc_value = <170>;
 358         };
 359
 360         power-key {
 361                 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
 362                 linux,code = <116>;
 363                 label = "power";
 364                 gpio-key,wakeup;
 365         };
 366
 367         menu-key {
 368                 linux,code = <59>;
 369                 label = "menu";
 370                 rockchip,adc_value = <746>;
 371         };
 372
 373         home-key {
 374                 linux,code = <102>;
 375                 label = "home";
 376                 rockchip,adc_value = <355>;
 377         };
 378
 379         back-key {
 380                 linux,code = <158>;
 381                 label = "back";
 382                 rockchip,adc_value = <560>;
 383         };
 384
 385         camera-key {
 386                 linux,code = <212>;
 387                 label = "camera";
 388                 rockchip,adc_value = <450>;
 389         };
 390 };
 391
 392 &sdmmc {
 393         clock-frequency = <50000000>;
 394         clock-freq-min-max = <400000 150000000>;
 395         supports-sd;
 396         bus-width = <4>;
 397         cap-mmc-highspeed;
 398         cap-sd-highspeed;
 399         disable-wp;
 400         num-slots = <1>;
 401         sd-uhs-sdr104;
 402         vqmmc-supply = <&vcc_sd>;
 403         pinctrl-names = "default";
 404         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
 405         status = "okay";
 406 };
 407
 408 &sdio0 {
 409         clock-frequency = <150000000>;
 410         clock-freq-min-max = <200000 150000000>;
 411         supports-sdio;
 412         bus-width = <4>;
 413         disable-wp;
 414         cap-sd-highspeed;
 415         cap-sdio-irq;
 416         keep-power-in-suspend;
 417         mmc-pwrseq = <&sdio_pwrseq>;
 418         non-removable;
 419         num-slots = <1>;
 420         pinctrl-names = "default";
 421         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
 422         sd-uhs-sdr104;
 423         status = "okay";
 424 };
 425
 426 &emmc_phy {
 427         freq-sel = <200000000>;
 428         dr-sel = <50>;
 429         opdelay = <4>;
 430         status = "okay";
 431 };
 432
 433 &sdhci {
 434         bus-width = <8>;
 435         mmc-hs400-1_8v;
 436         supports-emmc;
 437         non-removable;
 438         mmc-hs400-enhanced-strobe;
 439         status = "okay";
 440 };
 441
 442 &i2s0 {
 443         status = "okay";
 444         rockchip,i2s-broken-burst-len;
 445         rockchip,playback-channels = <8>;
 446         rockchip,capture-channels = <8>;
 447         #sound-dai-cells = <0>;
 448 };
 449
 450 &i2s2 {
 451         #sound-dai-cells = <0>;
 452 };
 453
 454 &spdif {
 455         status = "okay";
 456         #sound-dai-cells = <0>;
 457 };
 458
 459 &i2c0 {
 460         status = "okay";
 461         i2c-scl-rising-time-ns = <180>;
 462         i2c-scl-falling-time-ns = <30>;
 463         clock-frequency = <400000>;
 464
 465         vdd_cpu_b: syr837@40 {
 466                 compatible = "silergy,syr827";
 467                 reg = <0x40>;
 468                 vin-supply = <&vcc_sys>;
 469                 regulator-compatible = "fan53555-reg";
 470                 pinctrl-0 = <&vsel1_gpio>;
 471                 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
 472                 regulator-name = "vdd_cpu_b";
 473                 regulator-min-microvolt = <712500>;
 474                 regulator-max-microvolt = <1500000>;
 475                 regulator-ramp-delay = <1000>;
 476                 fcs,suspend-voltage-selector = <1>;
 477                 regulator-always-on;
 478                 regulator-initial-state = <3>;
 479                 regulator-state-mem {
 480                         regulator-off-in-suspend;
 481                 };
 482         };
 483
 484         vdd_gpu: syr828@41 {
 485                 compatible = "silergy,syr828";
 486                 status = "okay";
 487                 reg = <0x41>;
 488                 vin-supply = <&vcc_sys>;
 489                 regulator-compatible = "fan53555-reg";
 490                 pinctrl-0 = <&vsel2_gpio>;
 491                 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
 492                 regulator-name = "vdd_gpu";
 493                 regulator-min-microvolt = <735000>;
 494                 regulator-max-microvolt = <1400000>;
 495                 regulator-ramp-delay = <1000>;
 496                 fcs,suspend-voltage-selector = <1>;
 497                 regulator-always-on;
 498                 regulator-boot-on;
 499                 regulator-state-mem {
 500                         regulator-off-in-suspend;
 501                 };
 502         };
 503
 504         rk818: pmic@1c {
 505                 compatible = "rockchip,rk818";
 506                 status = "okay";
 507                 reg = <0x1c>;
 508                 clock-output-names = "xin32k", "wifibt_32kin";
 509                 interrupt-parent = <&gpio1>;
 510                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 511                 pinctrl-names = "default";
 512                 pinctrl-0 = <&pmic_int_l>;
 513                 rockchip,system-power-controller;
 514                 rk818,support_dc_chg = <1>;/*1: dc chg; 0:usb chg*/
 515                 wakeup-source;
 516                 extcon = <&fusb0>;
 517                 #clock-cells = <1>;
 518
 519                 vcc1-supply = <&vcc_sys>;
 520                 vcc2-supply = <&vcc_sys>;
 521                 vcc3-supply = <&vcc_sys>;
 522                 vcc4-supply = <&vcc_sys>;
 523                 vcc6-supply = <&vcc_sys>;
 524                 vcc7-supply = <&vcc3v3_sys>;
 525                 vcc8-supply = <&vcc_sys>;
 526                 vcc9-supply = <&vcc3v3_sys>;
 527
 528                 regulators {
 529                         vdd_cpu_l: DCDC_REG1 {
 530                                 regulator-name = "vdd_cpu_l";
 531                                 regulator-always-on;
 532                                 regulator-boot-on;
 533                                 regulator-min-microvolt = <750000>;
 534                                 regulator-max-microvolt = <1350000>;
 535                                 regulator-ramp-delay = <6001>;
 536                                 regulator-state-mem {
 537                                         regulator-off-in-suspend;
 538                                 };
 539                         };
 540
 541                         vdd_center: DCDC_REG2 {
 542                                 regulator-name = "vdd_center";
 543                                 regulator-always-on;
 544                                 regulator-boot-on;
 545                                 regulator-min-microvolt = <800000>;
 546                                 regulator-max-microvolt = <1350000>;
 547                                 regulator-ramp-delay = <6001>;
 548                                 regulator-state-mem {
 549                                         regulator-off-in-suspend;
 550                                 };
 551                         };
 552
 553                         vcc_ddr: DCDC_REG3 {
 554                                 regulator-name = "vcc_ddr";
 555                                 regulator-always-on;
 556                                 regulator-boot-on;
 557                                 regulator-state-mem {
 558                                         regulator-on-in-suspend;
 559                                 };
 560                         };
 561
 562                         vcc_1v8: DCDC_REG4 {
 563                                 regulator-name = "vcc_1v8";
 564                                 regulator-always-on;
 565                                 regulator-boot-on;
 566                                 regulator-min-microvolt = <1800000>;
 567                                 regulator-max-microvolt = <1800000>;
 568                                 regulator-state-mem {
 569                                         regulator-on-in-suspend;
 570                                         regulator-suspend-microvolt = <1800000>;
 571                                 };
 572                         };
 573
 574                         vcca3v0_codec: LDO_REG1 {
 575                                 regulator-always-on;
 576                                 regulator-boot-on;
 577                                 regulator-min-microvolt = <3000000>;
 578                                 regulator-max-microvolt = <3000000>;
 579                                 regulator-name = "vcca3v0_codec";
 580                                 regulator-state-mem {
 581                                         regulator-off-in-suspend;
 582                                 };
 583                         };
 584
 585                         vcc3v0_tp: LDO_REG2 {
 586                                 regulator-always-on;
 587                                 regulator-boot-on;
 588                                 regulator-min-microvolt = <3000000>;
 589                                 regulator-max-microvolt = <3000000>;
 590                                 regulator-name = "vcc3v0_tp";
 591                                 regulator-state-mem {
 592                                         regulator-off-in-suspend;
 593                                 };
 594                         };
 595
 596                         vcca1v8_codec: LDO_REG3 {
 597                                 regulator-always-on;
 598                                 regulator-boot-on;
 599                                 regulator-min-microvolt = <1800000>;
 600                                 regulator-max-microvolt = <1800000>;
 601                                 regulator-name = "vcca1v8_codec";
 602                                 regulator-state-mem {
 603                                         regulator-off-in-suspend;
 604                                 };
 605                         };
 606
 607                         vcc_power_on: LDO_REG4 {
 608                                 regulator-always-on;
 609                                 regulator-boot-on;
 610                                 regulator-min-microvolt = <3300000>;
 611                                 regulator-max-microvolt = <3300000>;
 612                                 regulator-name = "vcc_power_on";
 613                                 regulator-state-mem {
 614                                         regulator-on-in-suspend;
 615                                         regulator-suspend-microvolt = <3300000>;
 616                                 };
 617                         };
 618
 619                         vcc_3v0: LDO_REG5 {
 620                                 regulator-always-on;
 621                                 regulator-boot-on;
 622                                 regulator-min-microvolt = <3000000>;
 623                                 regulator-max-microvolt = <3000000>;
 624                                 regulator-name = "vcc_3v0";
 625                                 regulator-state-mem {
 626                                         regulator-off-in-suspend;
 627                                 };
 628                         };
 629
 630                         vcc_1v5: LDO_REG6 {
 631                                 regulator-always-on;
 632                                 regulator-boot-on;
 633                                 regulator-min-microvolt = <1500000>;
 634                                 regulator-max-microvolt = <1500000>;
 635                                 regulator-name = "vcc_1v5";
 636                                 regulator-state-mem {
 637                                         regulator-off-in-suspend;
 638                                 };
 639                         };
 640
 641                         vcc1v8_dvp: LDO_REG7 {
 642                                 regulator-always-on;
 643                                 regulator-boot-on;
 644                                 regulator-min-microvolt = <1800000>;
 645                                 regulator-max-microvolt = <1800000>;
 646                                 regulator-name = "vcc1v8_dvp";
 647                                 regulator-state-mem {
 648                                         regulator-off-in-suspend;
 649                                 };
 650                         };
 651
 652                         vcc3v3_s3: LDO_REG8 {
 653                                 regulator-always-on;
 654                                 regulator-boot-on;
 655                                 regulator-min-microvolt = <3300000>;
 656                                 regulator-max-microvolt = <3300000>;
 657                                 regulator-name = "vcc3v3_s3";
 658                                 regulator-state-mem {
 659                                         regulator-off-in-suspend;
 660                                 };
 661                         };
 662
 663                         vcc_sd: LDO_REG9 {
 664                                 regulator-always-on;
 665                                 regulator-boot-on;
 666                                 regulator-min-microvolt = <1800000>;
 667                                 regulator-max-microvolt = <3300000>;
 668                                 regulator-name = "vcc_sd";
 669                                 regulator-state-mem {
 670                                         regulator-on-in-suspend;
 671                                         regulator-suspend-microvolt = <3300000>;
 672                                 };
 673                         };
 674
 675                         vcc3v3_s0: SWITCH_REG {
 676                                 regulator-always-on;
 677                                 regulator-boot-on;
 678                                 regulator-name = "vcc3v3_s0";
 679                                 regulator-state-mem {
 680                                         regulator-on-in-suspend;
 681                                 };
 682                         };
 683                 };
 684
 685                 battery {
 686                         compatible = "rk818-battery";
 687                         ocv_table = <3400 3675 3689 3716 3740 3756 3768 3780
 688                                 3793 3807 3827 3853 3896 3937 3974 4007 4066
 689                                 4110 4161 4217 4308>;
 690                         design_capacity = <7916>;
 691                         design_qmax = <8708>;
 692                         bat_res = <65>;
 693                         max_input_current = <3000>;
 694                         max_chrg_current = <3000>;
 695                         max_chrg_voltage = <4350>;
 696                         sleep_enter_current = <300>;
 697                         sleep_exit_current = <300>;
 698                         power_off_thresd = <3400>;
 699                         zero_algorithm_vol = <3950>;
 700                         fb_temperature = <105>;
 701                         sample_res = <20>;
 702                         max_soc_offset = <60>;
 703                         energy_mode = <0>;
 704                         monitor_sec = <5>;
 705                         virtual_power = <0>;
 706                         power_dc2otg = <0>;
 707                 };
 708         };
 709 };
 710
 711 &i2c1 {
 712         status = "okay";
 713         i2c-scl-rising-time-ns = <140>;
 714         i2c-scl-falling-time-ns = <30>;
 715
 716         es8316: es8316@10 {
 717                 #sound-dai-cells = <0>;
 718                 compatible = "everest,es8316";
 719                 reg = <0x11>;
 720                 pinctrl-names = "default";
 721                 pinctrl-0 = <&hp_det>;
 722                 clocks = <&cru SCLK_I2S_8CH_OUT>;
 723                 clock-names = "mclk";
 724                 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
 725                 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
 726         };
 727 };
 728
 729 &i2c4 {
 730         status = "okay";
 731         i2c-scl-rising-time-ns = <345>;
 732         i2c-scl-falling-time-ns = <11>;
 733         clock-frequency = <400000>;
 734
 735         lsm330_accel@1e {
 736                 status = "okay";
 737                 compatible = "lsm330_acc";
 738                 pinctrl-names = "default";
 739                 pinctrl-0 = <&lsm330a_irq_gpio>;
 740                 reg = <0x1e>;
 741                 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
 742                 type = <SENSOR_TYPE_ACCEL>;
 743                 irq_enable = <1>;
 744                 poll_delay_ms = <30>;
 745                 layout = <4>;
 746         };
 747
 748         lsm330_gyro@6a {
 749                 status = "okay";
 750                 compatible = "lsm330_gyro";
 751                 pinctrl-names = "default";
 752                 pinctrl-0 = <&lsm330g_irq_gpio>;
 753                 reg = <0x6a>;
 754                 irq-gpio = <&gpio1 20 IRQ_TYPE_EDGE_RISING>;
 755                 type = <SENSOR_TYPE_GYROSCOPE>;
 756                 irq_enable = <0>;
 757                 poll_delay_ms = <30>;
 758         };
 759
 760         mpu6500@68 {
 761                 status = "disabled";
 762                 compatible = "invensense,mpu6500";
 763                 pinctrl-names = "default";
 764                 pinctrl-0 = <&mpu6500_irq_gpio>;
 765                 reg = <0x68>;
 766                 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
 767                 mpu-int_config = <0x10>;
 768                 mpu-level_shifter = <0>;
 769                 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
 770                 orientation-x= <1>;
 771                 orientation-y= <1>;
 772                 orientation-z= <0>;
 773                 mpu-debug = <1>;
 774         };
 775
 776         sensor@0d {
 777                 status = "okay";
 778                 compatible = "ak8963";
 779                 pinctrl-names = "default";
 780                 pinctrl-0 = <&ak8963_irq_gpio>;
 781                 reg = <0x0d>;
 782                 type = <SENSOR_TYPE_COMPASS>;
 783                 irq-gpio = <&gpio2 28 IRQ_TYPE_EDGE_RISING>;
 784                 irq_enable = <0>;
 785                 poll_delay_ms = <30>;
 786                 layout = <3>;
 787         };
 788
 789         sensor@10 {
 790                 status = "okay";
 791                 compatible = "capella,light_cm3218";
 792                 pinctrl-names = "default";
 793                 pinctrl-0 = <&cm3218_irq_gpio>;
 794                 reg = <0x10>;
 795                 type = <SENSOR_TYPE_LIGHT>;
 796                 irq-gpio = <&gpio4 24 IRQ_TYPE_EDGE_FALLING>;
 797                 irq_enable = <1>;
 798                 poll_delay_ms = <30>;
 799         };
 800
 801         fusb0: fusb30x@22 {
 802                 compatible = "fairchild,fusb302";
 803                 reg = <0x22>;
 804                 pinctrl-names = "default";
 805                 pinctrl-0 = <&fusb0_int>;
 806                 int-n-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
 807                 status = "okay";
 808         };
 809 };
 810
 811 &i2c5 {
 812         status = "okay";
 813         i2c-scl-rising-time-ns = <150>;
 814         i2c-scl-falling-time-ns = <30>;
 815         clock-frequency = <400000>;
 816
 817         gt9xx: gt9xx@14 {
 818                 compatible = "goodix,gt9xx";
 819                 reg = <0x14>;
 820                 touch-gpio = <&gpio3 12 IRQ_TYPE_LEVEL_LOW>;
 821                 reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
 822                 max-x = <1536>;
 823                 max-y = <2048>;
 824                 tp-size = <970>;
 825                 tp-supply = <&vcc3v0_tp>;
 826         };
 827 };
 828
 829 &isp0 {
 830         status = "okay";
 831 };
 832
 833 &isp1 {
 834         status = "okay";
 835 };
 836
 837 &cpu_l0 {
 838         cpu-supply = <&vdd_cpu_l>;
 839 };
 840
 841 &cpu_l1 {
 842         cpu-supply = <&vdd_cpu_l>;
 843 };
 844
 845 &cpu_l2 {
 846         cpu-supply = <&vdd_cpu_l>;
 847 };
 848
 849 &cpu_l3 {
 850         cpu-supply = <&vdd_cpu_l>;
 851 };
 852
 853 &cpu_b0 {
 854         cpu-supply = <&vdd_cpu_b>;
 855 };
 856
 857 &cpu_b1 {
 858         cpu-supply = <&vdd_cpu_b>;
 859 };
 860
 861 &gpu {
 862         status = "okay";
 863         mali-supply = <&vdd_gpu>;
 864 };
 865
 866 &rga {
 867         status = "okay";
 868 };
 869
 870 &spi1 {
 871         status = "disabled";
 872         max-freq = <50000000>;
 873         mpu6500@0 {
 874                 status = "disabled";
 875                 compatible = "inv-spi,mpu6500";
 876                 pinctrl-names = "default";
 877                 pinctrl-0 = <&mpu6500_irq_gpio>;
 878                 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
 879                 reg = <0>;
 880                 spi-max-frequency = <1000000>;
 881                 spi-cpha;
 882                 spi-cpol;
 883                 mpu-int_config = <0x00>;
 884                 mpu-level_shifter = <0>;
 885                 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
 886                 orientation-x= <1>;
 887                 orientation-y= <0>;
 888                 orientation-z= <1>;
 889                 mpu-debug = <1>;
 890         };
 891 };
 892
 893 &tcphy0 {
 894         extcon = <&fusb0>;
 895         status = "okay";
 896 };
 897
 898 &tsadc {
 899         rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
 900         rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
 901         status = "okay";
 902 };
 903
 904 &u2phy0 {
 905         status = "okay";
 906         extcon = <&fusb0>;
 907
 908         u2phy0_otg: otg-port {
 909                 status = "okay";
 910         };
 911
 912         u2phy0_host: host-port {
 913                 phy-supply = <&vcc5v0_host>;
 914                 status = "okay";
 915         };
 916 };
 917
 918 &uart0 {
 919         pinctrl-names = "default";
 920         pinctrl-0 = <&uart0_xfer &uart0_cts>;
 921         status = "okay";
 922 };
 923
 924 &uart2 {
 925         status = "okay";
 926 };
 927
 928 &usb_host0_ehci {
 929         status = "okay";
 930 };
 931
 932 &usb_host0_ohci {
 933         status = "okay";
 934 };
 935
 936 &usbdrd3_0 {
 937         extcon = <&fusb0>;
 938         status = "okay";
 939 };
 940
 941 &usbdrd_dwc3_0 {
 942         status = "okay";
 943 };
 944
 945 &vop0_pwm {
 946         assigned-clocks = <&cru SCLK_VOP0_PWM>;
 947         assigned-clock-rates = <50000000>;
 948         status = "okay";
 949 };
 950
 951 &pwm2 {
 952         status = "okay";
 953 };
 954
 955 &saradc {
 956         status = "okay";
 957 };
 958
 959 &pinctrl {
 960         sdio-pwrseq {
 961                 wifi_enable_h: wifi-enable-h {
 962                         rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
 963                 };
 964         };
 965
 966         wireless-bluetooth {
 967                 uart0_gpios: uart0-gpios {
 968                         rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
 969                 };
 970         };
 971
 972         pmic {
 973                 pmic_int_l: pmic-int-l {
 974                         rockchip,pins =
 975                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
 976                 };
 977
 978                 pmic_dvs2: pmic-dvs2 {
 979                         rockchip,pins =
 980                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
 981                 };
 982                 vsel1_gpio: vsel1-gpio {
 983                         rockchip,pins =
 984                                 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
 985                 };
 986                 vsel2_gpio: vsel2-gpio {
 987                         rockchip,pins =
 988                                 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
 989                 };
 990         };
 991
 992         headphone {
 993                 hp_det: hp-det {
 994                         rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;
 995                 };
 996         };
 997
 998         lcdpwr-enable {
 999                 lcdpwr_enable_h: lcdpwr-enable-h {
1000                         rockchip,pins = <3 8 RK_FUNC_GPIO &pcfg_pull_up>;
1001                 };
1002         };
1003
1004         lsm330_a {
1005                 lsm330a_irq_gpio: lsm330a-irq-gpio {
1006                         rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1007                 };
1008         };
1009
1010         lsm330_g {
1011                 lsm330g_irq_gpio: lsm330g-irq-gpio {
1012                         rockchip,pins = <1 20 RK_FUNC_GPIO &pcfg_pull_none>;
1013                 };
1014         };
1015
1016         mpu6500 {
1017                 mpu6500_irq_gpio: mpu6500-irq-gpio {
1018                         rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1019                 };
1020         };
1021
1022         ak8963 {
1023                 ak8963_irq_gpio: ak8963-irq-gpio {
1024                         rockchip,pins = <2 28 RK_FUNC_GPIO &pcfg_pull_none>;
1025                 };
1026         };
1027
1028         cm3218 {
1029                 cm3218_irq_gpio: cm3218-irq-gpio {
1030                         rockchip,pins = <4 24 RK_FUNC_GPIO &pcfg_pull_up>;
1031                 };
1032         };
1033
1034         usb2 {
1035                 host_vbus_drv: host-vbus-drv {
1036                         rockchip,pins =
1037                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
1038                 };
1039         };
1040
1041         fusb30x {
1042                 fusb0_int: fusb0-int {
1043                         rockchip,pins =
1044                                 <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
1045                 };
1046         };
1047 };
1048
1049 &rk_screen {
1050         #include <dt-bindings/display/screen-timing/lcd-LP097Qx2.dtsi>
1051 };
1052
1053 &vopb_rk_fb {
1054         status = "okay";
1055         rockchip,cabc_mode = <1>;
1056         power_ctr: power_ctr {
1057                 rockchip,debug = <0>;
1058
1059                 lcd_en: lcd-en {
1060                         rockchip,power_type = <GPIO>;
1061                         pinctrl-names = "default";
1062                         pinctrl-0 = <&lcdpwr_enable_h>;
1063                         gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
1064                         rockchip,delay = <10>;
1065                 };
1066         };
1067 };
1068
1069 &vopl_rk_fb {
1070         status = "okay";
1071 };
1072
1073 &edp_rk_fb {
1074         status = "okay";
1075 };