arch/arm64/boot/dts/rockchip/rk3399-mid-818-android.dts

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 /dts-v1/;
  44
  45 #include "rk3399.dtsi"
  46 #include "rk3399-android.dtsi"
  47 #include <dt-bindings/sensor-dev.h>
  48 #include <dt-bindings/pwm/pwm.h>
  49
  50 / {
  51         compatible = "rockchip,rk3399-mid", "rockchip,rk3399";
  52
  53         hall_sensor: hall-mh248 {
  54                 compatible = "hall-mh248";
  55                 pinctrl-names = "default";
  56                 pinctrl-0 = <&mh248_irq_gpio>;
  57                 irq-gpio = <&gpio1 2 IRQ_TYPE_EDGE_BOTH>;
  58                 hall-active = <1>;
  59                 status = "okay";
  60         };
  61
  62         vcc_sys: vcc-sys {
  63                 compatible = "regulator-fixed";
  64                 regulator-name = "vcc_sys";
  65                 regulator-always-on;
  66                 regulator-boot-on;
  67                 regulator-min-microvolt = <3900000>;
  68                 regulator-max-microvolt = <3900000>;
  69         };
  70
  71         vcc3v3_sys: vcc3v3-sys {
  72                 compatible = "regulator-fixed";
  73                 regulator-name = "vcc3v3_sys";
  74                 regulator-always-on;
  75                 regulator-boot-on;
  76                 regulator-min-microvolt = <3300000>;
  77                 regulator-max-microvolt = <3300000>;
  78         };
  79
  80         vcc5v0_host: vcc5v0-host-regulator {
  81                 compatible = "regulator-fixed";
  82                 enable-active-high;
  83                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
  84                 pinctrl-names = "default";
  85                 pinctrl-0 = <&host_vbus_drv>;
  86                 regulator-name = "vcc5v0_host";
  87         };
  88
  89         vdd_log: vdd-log {
  90                 compatible = "pwm-regulator";
  91                 pwms = <&pwm2 0 25000 0>;
  92                 rockchip,pwm_id= <2>;
  93                 rockchip,pwm_voltage = <900000>;
  94                 regulator-name = "vdd_log";
  95                 regulator-min-microvolt = <750000>;
  96                 regulator-max-microvolt = <1350000>;
  97                 regulator-always-on;
  98                 regulator-boot-on;
  99         };
 100
 101         backlight: backlight {
 102                 compatible = "pwm-backlight";
 103                 pwms = <&vop0_pwm 0 25000 PWM_POLARITY_INVERTED>;
 104                 brightness-levels = <
 105                         0  255  51  51  52  53  53  54
 106                         54  55  56  56  57  57  58  59
 107                         59  60  60  61  62  62  63  63
 108                         64  65  65  66  66  67  68  68
 109                         69  69  70  71  71  72  72  73
 110                         74  74  75  75  76  77  77  78
 111                         78  79  80  80  81  81  82  83
 112                         83  84  85  85  86  86  87  88
 113                         88  89  89  90  91  91  92  92
 114                         93  94  94  95  95  96  97  97
 115                         98  98  99  100 100 101 101 102
 116                         103 103 104 104 105 106 106 107
 117                         107 108 109 109 110 110 111 112
 118                         112 113 113 114 114 115 116 116
 119                         117 118 118 119 119 120 120 121
 120                         122 122 123 123 124 125 125 126
 121                         126 127 128 128 129 129 130 131
 122                         131 132 132 133 133 134 135 135
 123                         136 137 138 138 139 140 140 141
 124                         141 142 143 143 144 144 145 146
 125                         146 147 148 148 149 149 149 150
 126                         150 151 151 151 152 152 152 153
 127                         153 153 154 154 155 156 156 157
 128                         157 158 159 159 160 160 161 161
 129                         162 163 163 164 165 165 166 166
 130                         167 168 168 169 169 170 171 171
 131                         172 172 173 174 174 175 175 176
 132                         176 177 178 178 179 179 180 181
 133                         181 182 183 183 184 185 185 186
 134                         186 187 188 188 189 189 190 190
 135                         191 191 192 193 193 194 194 195
 136                         196 197 197 198 199 199 200 200>;
 137                 default-brightness-level = <200>;
 138                 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
 139         };
 140
 141         vcc_phy: vcc-phy-regulator {
 142                 compatible = "regulator-fixed";
 143                 regulator-name = "vcc_phy";
 144                 regulator-always-on;
 145                 regulator-boot-on;
 146         };
 147
 148         io-domains {
 149                 compatible = "rockchip,rk3399-io-voltage-domain";
 150                 rockchip,grf = <&grf>;
 151
 152                 bt656-supply = <&vcc1v8_dvp>;
 153                 audio-supply = <&vcca1v8_codec>;
 154                 sdmmc-supply = <&vcc_sd>;
 155                 gpio1830-supply = <&vcc_3v0>;
 156         };
 157
 158         pmu-io-domains {
 159                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
 160                 rockchip,grf = <&pmugrf>;
 161
 162                 pmu1830-supply = <&vcc_1v8>;
 163         };
 164
 165         es8316-sound {
 166                 compatible = "simple-audio-card";
 167                 simple-audio-card,format = "i2s";
 168                 simple-audio-card,name = "rockchip,es8316-codec";
 169                 simple-audio-card,mclk-fs = <256>;
 170                 simple-audio-card,widgets =
 171                         "Microphone", "Mic Jack",
 172                         "Headphone", "Headphone Jack";
 173                 simple-audio-card,routing =
 174                         "Mic Jack", "MICBIAS1",
 175                         "IN1P", "Mic Jack",
 176                         "Headphone Jack", "HPOL",
 177                         "Headphone Jack", "HPOR";
 178                 simple-audio-card,cpu {
 179                         sound-dai = <&i2s0>;
 180                 };
 181                 simple-audio-card,codec {
 182                         sound-dai = <&es8316>;
 183                 };
 184         };
 185
 186         spdif-sound {
 187                 compatible = "simple-audio-card";
 188                 simple-audio-card,name = "rockchip,spdif";
 189                 simple-audio-card,cpu {
 190                         sound-dai = <&spdif>;
 191                 };
 192                 simple-audio-card,codec {
 193                         sound-dai = <&spdif_out>;
 194                 };
 195         };
 196
 197         spdif_out: spdif-out {
 198                 compatible = "linux,spdif-dit";
 199                 #sound-dai-cells = <0>;
 200         };
 201
 202         sdio_pwrseq: sdio-pwrseq {
 203                 compatible = "mmc-pwrseq-simple";
 204                 clocks = <&rk818 1>;
 205                 clock-names = "ext_clock";
 206                 pinctrl-names = "default";
 207                 pinctrl-0 = <&wifi_enable_h>;
 208
 209                 /*
 210                  * On the module itself this is one of these (depending
 211                  * on the actual card populated):
 212                  * - SDIO_RESET_L_WL_REG_ON
 213                  * - PDN (power down when low)
 214                  */
 215                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
 216         };
 217
 218         wireless-wlan {
 219                 compatible = "wlan-platdata";
 220                 rockchip,grf = <&grf>;
 221                 wifi_chip_type = "ap6354";
 222                 sdio_vref = <1800>;
 223                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
 224                 status = "okay";
 225         };
 226
 227         wireless-bluetooth {
 228                 compatible = "bluetooth-platdata";
 229                 clocks = <&rk818 1>;
 230                 clock-names = "ext_clock";
 231                 //wifi-bt-power-toggle;
 232                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
 233                 pinctrl-names = "default", "rts_gpio";
 234                 pinctrl-0 = <&uart0_rts>;
 235                 pinctrl-1 = <&uart0_gpios>;
 236                 //BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
 237                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
 238                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
 239                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
 240                 status = "okay";
 241         };
 242
 243         uboot-charge {
 244                 compatible = "rockchip,uboot-charge";
 245                 rockchip,uboot-charge-on = <0>;
 246                 rockchip,android-charge-on = <1>;
 247         };
 248
 249         vibrator {
 250                 compatible = "rk-vibrator-gpio";
 251                 vibrator-gpio = <&gpio4 30 GPIO_ACTIVE_LOW>;
 252                 status = "okay";
 253         };
 254 };
 255
 256 &dfi {
 257         status = "okay";
 258 };
 259
 260 &dmc {
 261         status = "okay";
 262         center-supply = <&vdd_center>;
 263         upthreshold = <38>;
 264         downdifferential = <20>;
 265 };
 266
 267 &dmc_opp_table {
 268         opp@300000000 {
 269                 opp-hz = /bits/ 64 <300000000>;
 270                 opp-microvolt = <900000>;
 271         };
 272         opp@400000000 {
 273                 opp-hz = /bits/ 64 <400000000>;
 274                 opp-microvolt = <900000>;
 275         };
 276         opp@528000000 {
 277                 opp-hz = /bits/ 64 <528000000>;
 278                 opp-microvolt = <900000>;
 279         };
 280         opp@600000000 {
 281                 opp-hz = /bits/ 64 <600000000>;
 282                 opp-microvolt = <900000>;
 283         };
 284         opp@666000000 {
 285                 opp-hz = /bits/ 64 <666000000>;
 286                 opp-microvolt = <900000>;
 287                 opp-suspend;
 288         };
 289 };
 290
 291 &cluster0_opp {
 292         opp@408000000 {
 293                 opp-hz = /bits/ 64 <408000000>;
 294                 opp-microvolt = <800000>;
 295                 clock-latency-ns = <40000>;
 296         };
 297         opp@600000000 {
 298                 opp-hz = /bits/ 64 <600000000>;
 299                 opp-microvolt = <800000>;
 300         };
 301         opp@816000000 {
 302                 opp-hz = /bits/ 64 <816000000>;
 303                 opp-microvolt = <800000>;
 304         };
 305         opp@1008000000 {
 306                 opp-hz = /bits/ 64 <1008000000>;
 307                 opp-microvolt = <875000>;
 308         };
 309         opp@1200000000 {
 310                 opp-hz = /bits/ 64 <1200000000>;
 311                 opp-microvolt = <925000>;
 312         };
 313         opp@1416000000 {
 314                 opp-hz = /bits/ 64 <1416000000>;
 315                 opp-microvolt = <1050000>;
 316         };
 317         opp@1512000000 {
 318                 opp-hz = /bits/ 64 <1512000000>;
 319                 opp-microvolt = <1100000>;
 320                 status="disabled";
 321         };
 322 };
 323
 324 &cluster1_opp {
 325         opp@408000000 {
 326                 opp-hz = /bits/ 64 <408000000>;
 327                 opp-microvolt = <800000>;
 328                 clock-latency-ns = <40000>;
 329         };
 330         opp@600000000 {
 331                 opp-hz = /bits/ 64 <600000000>;
 332                 opp-microvolt = <800000>;
 333         };
 334         opp@816000000 {
 335                 opp-hz = /bits/ 64 <816000000>;
 336                 opp-microvolt = <825000>;
 337         };
 338         opp@1008000000 {
 339                 opp-hz = /bits/ 64 <1008000000>;
 340                 opp-microvolt = <875000>;
 341         };
 342         opp@1200000000 {
 343                 opp-hz = /bits/ 64 <1200000000>;
 344                 opp-microvolt = <950000>;
 345         };
 346         opp@1416000000 {
 347                 opp-hz = /bits/ 64 <1416000000>;
 348                 opp-microvolt = <1025000>;
 349         };
 350         opp@1608000000 {
 351                 opp-hz = /bits/ 64 <1608000000>;
 352                 opp-microvolt = <1100000>;
 353         };
 354         opp@1800000000 {
 355                 opp-hz = /bits/ 64 <1800000000>;
 356                 opp-microvolt = <1175000>;
 357         };
 358         opp@1992000000 {
 359                 opp-hz = /bits/ 64 <1992000000>;
 360                 opp-microvolt = <1250000>;
 361         };
 362 };
 363
 364 &CPU_COST_A72 {
 365         busy-cost-data = <
 366                 210   129       /*  408MHz */
 367                 308   184       /*  600MHz */
 368                 419   246       /*  816MHz */
 369                 518   335       /* 1008MHz */
 370                 617   428       /* 1200MHz */
 371                 728   573       /* 1416MHz */
 372                 827   724       /* 1608MHz */
 373                 925   900       /* 1800MHz */
 374                 1024  1108      /* 1992MHz */
 375         >;
 376         idle-cost-data = <
 377               15
 378               15
 379                0
 380         >;
 381 };
 382
 383 &CPU_COST_A53 {
 384         busy-cost-data = <
 385                 108    46       /*  408M */
 386                 159    67       /*  600M */
 387                 216    90       /*  816M */
 388                 267    120      /* 1008M */
 389                 318    153      /* 1200M */
 390                 375    198      /* 1416M */
 391                 401    222      /* 1512M */
 392         >;
 393         idle-cost-data = <
 394               6
 395               6
 396               0
 397         >;
 398 };
 399
 400 &CLUSTER_COST_A72 {
 401         busy-cost-data = <
 402                 210   129       /*  408MHz */
 403                 308   184       /*  600MHz */
 404                 419   246       /*  816MHz */
 405                 518   335       /* 1008MHz */
 406                 617   428       /* 1200MHz */
 407                 728   573       /* 1416MHz */
 408                 827   724       /* 1608MHz */
 409                 925   900       /* 1800MHz */
 410                 1024  1108      /* 1992MHz */
 411         >;
 412         idle-cost-data = <
 413                  65
 414                  65
 415                  65
 416         >;
 417 };
 418
 419 &CLUSTER_COST_A53 {
 420         busy-cost-data = <
 421                 108    46       /*  408M */
 422                 159    67       /*  600M */
 423                 216    90       /*  816M */
 424                 267    120      /* 1008M */
 425                 318    153      /* 1200M */
 426                 375    198      /* 1416M */
 427                 401    222      /* 1512M */
 428         >;
 429         idle-cost-data = <
 430                 56
 431                 56
 432                 56
 433         >;
 434 };
 435
 436 &gpu_opp_table {
 437         compatible = "operating-points-v2";
 438         opp-shared;
 439         opp@200000000 {
 440                 opp-hz = /bits/ 64 <200000000>;
 441                 opp-microvolt = <825000>;
 442         };
 443         opp@300000000 {
 444                 opp-hz = /bits/ 64 <300000000>;
 445                 opp-microvolt = <850000>;
 446         };
 447         opp@400000000 {
 448                 opp-hz = /bits/ 64 <400000000>;
 449                 opp-microvolt = <875000>;
 450         };
 451         opp@500000000 {
 452                 opp-hz = /bits/ 64 <500000000>;
 453                 opp-microvolt = <950000>;
 454         };
 455         opp@600000000 {
 456                 opp-hz = /bits/ 64 <600000000>;
 457                 opp-microvolt = <1025000>;
 458         };
 459         opp@800000000 {
 460                 opp-hz = /bits/ 64 <800000000>;
 461                 opp-microvolt = <1125000>;
 462         };
 463 };
 464
 465 &rk_key {
 466         compatible = "rockchip,key";
 467         status = "okay";
 468
 469         io-channels = <&saradc 1>;
 470
 471         vol-up-key {
 472                 linux,code = <114>;
 473                 label = "volume up";
 474                 rockchip,adc_value = <1>;
 475         };
 476
 477         vol-down-key {
 478                 linux,code = <115>;
 479                 label = "volume down";
 480                 rockchip,adc_value = <170>;
 481         };
 482
 483         power-key {
 484                 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
 485                 linux,code = <116>;
 486                 label = "power";
 487                 gpio-key,wakeup;
 488         };
 489
 490         menu-key {
 491                 linux,code = <59>;
 492                 label = "menu";
 493                 rockchip,adc_value = <746>;
 494         };
 495
 496         home-key {
 497                 linux,code = <102>;
 498                 label = "home";
 499                 rockchip,adc_value = <355>;
 500         };
 501
 502         back-key {
 503                 linux,code = <158>;
 504                 label = "back";
 505                 rockchip,adc_value = <560>;
 506         };
 507
 508         camera-key {
 509                 linux,code = <212>;
 510                 label = "camera";
 511                 rockchip,adc_value = <450>;
 512         };
 513 };
 514
 515 &sdmmc {
 516         clock-frequency = <50000000>;
 517         clock-freq-min-max = <400000 150000000>;
 518         supports-sd;
 519         bus-width = <4>;
 520         cap-mmc-highspeed;
 521         cap-sd-highspeed;
 522         disable-wp;
 523         num-slots = <1>;
 524         sd-uhs-sdr104;
 525         vqmmc-supply = <&vcc_sd>;
 526         pinctrl-names = "default";
 527         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
 528         status = "okay";
 529 };
 530
 531 &sdio0 {
 532         clock-frequency = <150000000>;
 533         clock-freq-min-max = <200000 150000000>;
 534         supports-sdio;
 535         bus-width = <4>;
 536         disable-wp;
 537         cap-sd-highspeed;
 538         cap-sdio-irq;
 539         keep-power-in-suspend;
 540         mmc-pwrseq = <&sdio_pwrseq>;
 541         non-removable;
 542         num-slots = <1>;
 543         pinctrl-names = "default";
 544         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
 545         sd-uhs-sdr104;
 546         status = "okay";
 547 };
 548
 549 &emmc_phy {
 550         status = "okay";
 551 };
 552
 553 &sdhci {
 554         bus-width = <8>;
 555         mmc-hs400-1_8v;
 556         supports-emmc;
 557         non-removable;
 558         keep-power-in-suspend;
 559         mmc-hs400-enhanced-strobe;
 560         status = "okay";
 561 };
 562
 563 &i2s0 {
 564         status = "okay";
 565         rockchip,i2s-broken-burst-len;
 566         rockchip,playback-channels = <8>;
 567         rockchip,capture-channels = <8>;
 568         #sound-dai-cells = <0>;
 569 };
 570
 571 &i2s2 {
 572         #sound-dai-cells = <0>;
 573 };
 574
 575 &spdif {
 576         status = "okay";
 577         #sound-dai-cells = <0>;
 578 };
 579
 580 &i2c0 {
 581         status = "okay";
 582         i2c-scl-rising-time-ns = <180>;
 583         i2c-scl-falling-time-ns = <30>;
 584         clock-frequency = <400000>;
 585
 586         vdd_cpu_b: syr837@40 {
 587                 compatible = "silergy,syr827";
 588                 reg = <0x40>;
 589                 vin-supply = <&vcc_sys>;
 590                 regulator-compatible = "fan53555-reg";
 591                 pinctrl-0 = <&vsel1_gpio>;
 592                 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
 593                 regulator-name = "vdd_cpu_b";
 594                 regulator-min-microvolt = <712500>;
 595                 regulator-max-microvolt = <1500000>;
 596                 regulator-ramp-delay = <1000>;
 597                 fcs,suspend-voltage-selector = <1>;
 598                 regulator-always-on;
 599                 regulator-initial-state = <3>;
 600                 regulator-state-mem {
 601                         regulator-off-in-suspend;
 602                 };
 603         };
 604
 605         vdd_gpu: syr828@41 {
 606                 compatible = "silergy,syr828";
 607                 status = "okay";
 608                 reg = <0x41>;
 609                 vin-supply = <&vcc_sys>;
 610                 regulator-compatible = "fan53555-reg";
 611                 pinctrl-0 = <&vsel2_gpio>;
 612                 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
 613                 regulator-name = "vdd_gpu";
 614                 regulator-min-microvolt = <735000>;
 615                 regulator-max-microvolt = <1400000>;
 616                 regulator-ramp-delay = <1000>;
 617                 fcs,suspend-voltage-selector = <1>;
 618                 regulator-boot-on;
 619                 regulator-state-mem {
 620                         regulator-off-in-suspend;
 621                 };
 622         };
 623
 624         rk818: pmic@1c {
 625                 compatible = "rockchip,rk818";
 626                 status = "okay";
 627                 reg = <0x1c>;
 628                 clock-output-names = "xin32k", "wifibt_32kin";
 629                 interrupt-parent = <&gpio1>;
 630                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 631                 pinctrl-names = "default";
 632                 pinctrl-0 = <&pmic_int_l>;
 633                 rockchip,system-power-controller;
 634                 rk818,support_dc_chg = <1>;/*1: dc chg; 0:usb chg*/
 635                 wakeup-source;
 636                 extcon = <&fusb0>;
 637                 #clock-cells = <1>;
 638
 639                 vcc1-supply = <&vcc_sys>;
 640                 vcc2-supply = <&vcc_sys>;
 641                 vcc3-supply = <&vcc_sys>;
 642                 vcc4-supply = <&vcc_sys>;
 643                 vcc6-supply = <&vcc_sys>;
 644                 vcc7-supply = <&vcc3v3_sys>;
 645                 vcc8-supply = <&vcc_sys>;
 646                 vcc9-supply = <&vcc3v3_sys>;
 647
 648                 regulators {
 649                         vdd_cpu_l: DCDC_REG1 {
 650                                 regulator-name = "vdd_cpu_l";
 651                                 regulator-always-on;
 652                                 regulator-boot-on;
 653                                 regulator-min-microvolt = <750000>;
 654                                 regulator-max-microvolt = <1350000>;
 655                                 regulator-ramp-delay = <6001>;
 656                                 regulator-state-mem {
 657                                         regulator-off-in-suspend;
 658                                 };
 659                         };
 660
 661                         vdd_center: DCDC_REG2 {
 662                                 regulator-name = "vdd_center";
 663                                 regulator-always-on;
 664                                 regulator-boot-on;
 665                                 regulator-min-microvolt = <800000>;
 666                                 regulator-max-microvolt = <1350000>;
 667                                 regulator-ramp-delay = <6001>;
 668                                 regulator-state-mem {
 669                                         regulator-off-in-suspend;
 670                                 };
 671                         };
 672
 673                         vcc_ddr: DCDC_REG3 {
 674                                 regulator-name = "vcc_ddr";
 675                                 regulator-always-on;
 676                                 regulator-boot-on;
 677                                 regulator-state-mem {
 678                                         regulator-on-in-suspend;
 679                                 };
 680                         };
 681
 682                         vcc_1v8: DCDC_REG4 {
 683                                 regulator-name = "vcc_1v8";
 684                                 regulator-always-on;
 685                                 regulator-boot-on;
 686                                 regulator-min-microvolt = <1800000>;
 687                                 regulator-max-microvolt = <1800000>;
 688                                 regulator-state-mem {
 689                                         regulator-on-in-suspend;
 690                                         regulator-suspend-microvolt = <1800000>;
 691                                 };
 692                         };
 693
 694                         vcca3v0_codec: LDO_REG1 {
 695                                 regulator-always-on;
 696                                 regulator-boot-on;
 697                                 regulator-min-microvolt = <3000000>;
 698                                 regulator-max-microvolt = <3000000>;
 699                                 regulator-name = "vcca3v0_codec";
 700                                 regulator-state-mem {
 701                                         regulator-off-in-suspend;
 702                                 };
 703                         };
 704
 705                         vcc3v0_tp: LDO_REG2 {
 706                                 regulator-always-on;
 707                                 regulator-boot-on;
 708                                 regulator-min-microvolt = <3000000>;
 709                                 regulator-max-microvolt = <3000000>;
 710                                 regulator-name = "vcc3v0_tp";
 711                                 regulator-state-mem {
 712                                         regulator-off-in-suspend;
 713                                 };
 714                         };
 715
 716                         vcca1v8_codec: LDO_REG3 {
 717                                 regulator-always-on;
 718                                 regulator-boot-on;
 719                                 regulator-min-microvolt = <1800000>;
 720                                 regulator-max-microvolt = <1800000>;
 721                                 regulator-name = "vcca1v8_codec";
 722                                 regulator-state-mem {
 723                                         regulator-off-in-suspend;
 724                                 };
 725                         };
 726
 727                         vcc_power_on: LDO_REG4 {
 728                                 regulator-always-on;
 729                                 regulator-boot-on;
 730                                 regulator-min-microvolt = <3300000>;
 731                                 regulator-max-microvolt = <3300000>;
 732                                 regulator-name = "vcc_power_on";
 733                                 regulator-state-mem {
 734                                         regulator-on-in-suspend;
 735                                         regulator-suspend-microvolt = <3300000>;
 736                                 };
 737                         };
 738
 739                         vcc_3v0: LDO_REG5 {
 740                                 regulator-always-on;
 741                                 regulator-boot-on;
 742                                 regulator-min-microvolt = <3000000>;
 743                                 regulator-max-microvolt = <3000000>;
 744                                 regulator-name = "vcc_3v0";
 745                                 regulator-state-mem {
 746                                         regulator-off-in-suspend;
 747                                 };
 748                         };
 749
 750                         vcc_1v5: LDO_REG6 {
 751                                 regulator-always-on;
 752                                 regulator-boot-on;
 753                                 regulator-min-microvolt = <1500000>;
 754                                 regulator-max-microvolt = <1500000>;
 755                                 regulator-name = "vcc_1v5";
 756                                 regulator-state-mem {
 757                                         regulator-off-in-suspend;
 758                                 };
 759                         };
 760
 761                         vcc1v8_dvp: LDO_REG7 {
 762                                 regulator-always-on;
 763                                 regulator-boot-on;
 764                                 regulator-min-microvolt = <1800000>;
 765                                 regulator-max-microvolt = <1800000>;
 766                                 regulator-name = "vcc1v8_dvp";
 767                                 regulator-state-mem {
 768                                         regulator-off-in-suspend;
 769                                 };
 770                         };
 771
 772                         vcc3v3_s3: LDO_REG8 {
 773                                 regulator-always-on;
 774                                 regulator-boot-on;
 775                                 regulator-min-microvolt = <3300000>;
 776                                 regulator-max-microvolt = <3300000>;
 777                                 regulator-name = "vcc3v3_s3";
 778                                 regulator-state-mem {
 779                                         regulator-off-in-suspend;
 780                                 };
 781                         };
 782
 783                         vcc_sd: LDO_REG9 {
 784                                 regulator-always-on;
 785                                 regulator-boot-on;
 786                                 regulator-min-microvolt = <1800000>;
 787                                 regulator-max-microvolt = <3300000>;
 788                                 regulator-name = "vcc_sd";
 789                                 regulator-state-mem {
 790                                         regulator-on-in-suspend;
 791                                         regulator-suspend-microvolt = <3300000>;
 792                                 };
 793                         };
 794
 795                         vcc3v3_s0: SWITCH_REG {
 796                                 regulator-always-on;
 797                                 regulator-boot-on;
 798                                 regulator-name = "vcc3v3_s0";
 799                                 regulator-state-mem {
 800                                         regulator-on-in-suspend;
 801                                 };
 802                         };
 803                 };
 804
 805                 battery {
 806                         compatible = "rk818-battery";
 807                         ocv_table = <3400 3675 3689 3716 3740 3756 3768 3780
 808                                 3793 3807 3827 3853 3896 3937 3974 4007 4066
 809                                 4110 4161 4217 4308>;
 810                         design_capacity = <7916>;
 811                         design_qmax = <8708>;
 812                         bat_res = <65>;
 813                         max_input_current = <3000>;
 814                         max_chrg_current = <3000>;
 815                         max_chrg_voltage = <4350>;
 816                         sleep_enter_current = <300>;
 817                         sleep_exit_current = <300>;
 818                         power_off_thresd = <3400>;
 819                         zero_algorithm_vol = <3950>;
 820                         fb_temperature = <105>;
 821                         sample_res = <20>;
 822                         max_soc_offset = <60>;
 823                         energy_mode = <0>;
 824                         monitor_sec = <5>;
 825                         virtual_power = <0>;
 826                         power_dc2otg = <0>;
 827                 };
 828         };
 829 };
 830
 831 &i2c1 {
 832         status = "okay";
 833         i2c-scl-rising-time-ns = <140>;
 834         i2c-scl-falling-time-ns = <30>;
 835
 836         es8316: es8316@10 {
 837                 #sound-dai-cells = <0>;
 838                 compatible = "everest,es8316";
 839                 reg = <0x11>;
 840                 pinctrl-names = "default";
 841                 pinctrl-0 = <&hp_det>;
 842                 clocks = <&cru SCLK_I2S_8CH_OUT>;
 843                 clock-names = "mclk";
 844                 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
 845                 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
 846         };
 847 };
 848
 849 &i2c4 {
 850         status = "okay";
 851         i2c-scl-rising-time-ns = <345>;
 852         i2c-scl-falling-time-ns = <11>;
 853         clock-frequency = <400000>;
 854
 855         lsm330_accel@1e {
 856                 status = "okay";
 857                 compatible = "lsm330_acc";
 858                 pinctrl-names = "default";
 859                 pinctrl-0 = <&lsm330a_irq_gpio>;
 860                 reg = <0x1e>;
 861                 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
 862                 type = <SENSOR_TYPE_ACCEL>;
 863                 irq_enable = <1>;
 864                 poll_delay_ms = <30>;
 865                 layout = <4>;
 866         };
 867
 868         lsm330_gyro@6a {
 869                 status = "okay";
 870                 compatible = "lsm330_gyro";
 871                 pinctrl-names = "default";
 872                 pinctrl-0 = <&lsm330g_irq_gpio>;
 873                 reg = <0x6a>;
 874                 irq-gpio = <&gpio1 20 IRQ_TYPE_EDGE_RISING>;
 875                 type = <SENSOR_TYPE_GYROSCOPE>;
 876                 irq_enable = <0>;
 877                 poll_delay_ms = <30>;
 878         };
 879
 880         mpu6500@68 {
 881                 status = "disabled";
 882                 compatible = "invensense,mpu6500";
 883                 pinctrl-names = "default";
 884                 pinctrl-0 = <&mpu6500_irq_gpio>;
 885                 reg = <0x68>;
 886                 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
 887                 mpu-int_config = <0x10>;
 888                 mpu-level_shifter = <0>;
 889                 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
 890                 orientation-x= <1>;
 891                 orientation-y= <1>;
 892                 orientation-z= <0>;
 893                 support-hw-poweroff = <1>;
 894                 mpu-debug = <1>;
 895         };
 896
 897         sensor@0d {
 898                 status = "okay";
 899                 compatible = "ak8963";
 900                 pinctrl-names = "default";
 901                 pinctrl-0 = <&ak8963_irq_gpio>;
 902                 reg = <0x0d>;
 903                 type = <SENSOR_TYPE_COMPASS>;
 904                 irq-gpio = <&gpio2 28 IRQ_TYPE_EDGE_RISING>;
 905                 irq_enable = <0>;
 906                 poll_delay_ms = <30>;
 907                 layout = <3>;
 908         };
 909
 910         sensor@10 {
 911                 status = "okay";
 912                 compatible = "capella,light_cm3218";
 913                 pinctrl-names = "default";
 914                 pinctrl-0 = <&cm3218_irq_gpio>;
 915                 reg = <0x10>;
 916                 type = <SENSOR_TYPE_LIGHT>;
 917                 irq-gpio = <&gpio4 24 IRQ_TYPE_EDGE_FALLING>;
 918                 irq_enable = <1>;
 919                 poll_delay_ms = <30>;
 920         };
 921
 922         fusb0: fusb30x@22 {
 923                 compatible = "fairchild,fusb302";
 924                 reg = <0x22>;
 925                 pinctrl-names = "default";
 926                 pinctrl-0 = <&fusb0_int>;
 927                 int-n-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
 928                 status = "okay";
 929         };
 930 };
 931
 932 &i2c5 {
 933         status = "okay";
 934         i2c-scl-rising-time-ns = <150>;
 935         i2c-scl-falling-time-ns = <30>;
 936         clock-frequency = <400000>;
 937
 938         gt9xx: gt9xx@14 {
 939                 compatible = "goodix,gt9xx";
 940                 reg = <0x14>;
 941                 touch-gpio = <&gpio3 12 IRQ_TYPE_LEVEL_LOW>;
 942                 reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
 943                 max-x = <1536>;
 944                 max-y = <2048>;
 945                 tp-size = <970>;
 946                 tp-supply = <&vcc3v0_tp>;
 947         };
 948 };
 949
 950 &isp0 {
 951         status = "okay";
 952 };
 953
 954 &isp1 {
 955         status = "okay";
 956 };
 957
 958 &cpu_l0 {
 959         cpu-supply = <&vdd_cpu_l>;
 960 };
 961
 962 &cpu_l1 {
 963         cpu-supply = <&vdd_cpu_l>;
 964 };
 965
 966 &cpu_l2 {
 967         cpu-supply = <&vdd_cpu_l>;
 968 };
 969
 970 &cpu_l3 {
 971         cpu-supply = <&vdd_cpu_l>;
 972 };
 973
 974 &cpu_b0 {
 975         cpu-supply = <&vdd_cpu_b>;
 976 };
 977
 978 &cpu_b1 {
 979         cpu-supply = <&vdd_cpu_b>;
 980 };
 981
 982 &gpu {
 983         status = "okay";
 984         mali-supply = <&vdd_gpu>;
 985 };
 986
 987 &rga {
 988         status = "okay";
 989 };
 990
 991 &spi1 {
 992         status = "disabled";
 993         max-freq = <50000000>;
 994         mpu6500@0 {
 995                 status = "disabled";
 996                 compatible = "inv-spi,mpu6500";
 997                 pinctrl-names = "default";
 998                 pinctrl-0 = <&mpu6500_irq_gpio>;
 999                 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
1000                 reg = <0>;
1001                 spi-max-frequency = <1000000>;
1002                 spi-cpha;
1003                 spi-cpol;
1004                 mpu-int_config = <0x00>;
1005                 mpu-level_shifter = <0>;
1006                 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
1007                 orientation-x= <1>;
1008                 orientation-y= <0>;
1009                 orientation-z= <1>;
1010                 support-hw-poweroff = <1>;
1011                 mpu-debug = <1>;
1012         };
1013 };
1014
1015 &tcphy0 {
1016         extcon = <&fusb0>;
1017         status = "okay";
1018 };
1019
1020 &tsadc {
1021         rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
1022         rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
1023         status = "okay";
1024 };
1025
1026 &u2phy0 {
1027         status = "okay";
1028         extcon = <&fusb0>;
1029
1030         u2phy0_otg: otg-port {
1031                 status = "okay";
1032         };
1033
1034         u2phy0_host: host-port {
1035                 phy-supply = <&vcc5v0_host>;
1036                 status = "okay";
1037         };
1038 };
1039
1040 &uart0 {
1041         pinctrl-names = "default";
1042         pinctrl-0 = <&uart0_xfer &uart0_cts>;
1043         status = "okay";
1044 };
1045
1046 &uart2 {
1047         status = "okay";
1048 };
1049
1050 &usb_host0_ehci {
1051         status = "okay";
1052 };
1053
1054 &usb_host0_ohci {
1055         status = "okay";
1056 };
1057
1058 &usbdrd3_0 {
1059         extcon = <&fusb0>;
1060         status = "okay";
1061 };
1062
1063 &usbdrd_dwc3_0 {
1064         status = "okay";
1065 };
1066
1067 &vop0_pwm {
1068         assigned-clocks = <&cru SCLK_VOP0_PWM>;
1069         assigned-clock-rates = <50000000>;
1070         status = "okay";
1071 };
1072
1073 &pwm2 {
1074         status = "okay";
1075 };
1076
1077 &saradc {
1078         status = "okay";
1079 };
1080
1081 &pinctrl {
1082         sdio-pwrseq {
1083                 wifi_enable_h: wifi-enable-h {
1084                         rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
1085                 };
1086         };
1087
1088         wireless-bluetooth {
1089                 uart0_gpios: uart0-gpios {
1090                         rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
1091                 };
1092         };
1093
1094         pmic {
1095                 pmic_int_l: pmic-int-l {
1096                         rockchip,pins =
1097                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
1098                 };
1099
1100                 pmic_dvs2: pmic-dvs2 {
1101                         rockchip,pins =
1102                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
1103                 };
1104                 vsel1_gpio: vsel1-gpio {
1105                         rockchip,pins =
1106                                 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
1107                 };
1108                 vsel2_gpio: vsel2-gpio {
1109                         rockchip,pins =
1110                                 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
1111                 };
1112         };
1113
1114         hallsensor {
1115                 mh248_irq_gpio: mh248-irq-gpio {
1116                         rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_none>;
1117                 };
1118         };
1119
1120         headphone {
1121                 hp_det: hp-det {
1122                         rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;
1123                 };
1124         };
1125
1126         lcdpwr-enable {
1127                 lcdpwr_enable_h: lcdpwr-enable-h {
1128                         rockchip,pins = <3 8 RK_FUNC_GPIO &pcfg_pull_up>;
1129                 };
1130         };
1131
1132         lsm330_a {
1133                 lsm330a_irq_gpio: lsm330a-irq-gpio {
1134                         rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1135                 };
1136         };
1137
1138         lsm330_g {
1139                 lsm330g_irq_gpio: lsm330g-irq-gpio {
1140                         rockchip,pins = <1 20 RK_FUNC_GPIO &pcfg_pull_none>;
1141                 };
1142         };
1143
1144         mpu6500 {
1145                 mpu6500_irq_gpio: mpu6500-irq-gpio {
1146                         rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1147                 };
1148         };
1149
1150         ak8963 {
1151                 ak8963_irq_gpio: ak8963-irq-gpio {
1152                         rockchip,pins = <2 28 RK_FUNC_GPIO &pcfg_pull_none>;
1153                 };
1154         };
1155
1156         cm3218 {
1157                 cm3218_irq_gpio: cm3218-irq-gpio {
1158                         rockchip,pins = <4 24 RK_FUNC_GPIO &pcfg_pull_up>;
1159                 };
1160         };
1161
1162         usb2 {
1163                 host_vbus_drv: host-vbus-drv {
1164                         rockchip,pins =
1165                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
1166                 };
1167         };
1168
1169         fusb30x {
1170                 fusb0_int: fusb0-int {
1171                         rockchip,pins =
1172                                 <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
1173                 };
1174         };
1175 };
1176
1177 &rk_screen {
1178         #include <dt-bindings/display/screen-timing/lcd-LP097Qx2.dtsi>
1179 };
1180
1181 &vopb_rk_fb {
1182         status = "okay";
1183         rockchip,cabc_mode = <1>;
1184         power_ctr: power_ctr {
1185                 rockchip,debug = <0>;
1186
1187                 lcd_en: lcd-en {
1188                         rockchip,power_type = <GPIO>;
1189                         pinctrl-names = "default";
1190                         pinctrl-0 = <&lcdpwr_enable_h>;
1191                         gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
1192                         rockchip,delay = <10>;
1193                 };
1194         };
1195 };
1196
1197 &vopl_rk_fb {
1198         status = "okay";
1199 };
1200
1201 &edp_rk_fb {
1202         status = "okay";
1203 };