2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
45 #include "rk3399.dtsi"
46 #include "rk3399-android.dtsi"
47 #include <dt-bindings/sensor-dev.h>
50 compatible = "rockchip,rk3399-mid", "rockchip,rk3399";
53 compatible = "regulator-fixed";
54 regulator-name = "vcc_sys";
57 regulator-min-microvolt = <3900000>;
58 regulator-max-microvolt = <3900000>;
61 vcc3v3_sys: vcc3v3-sys {
62 compatible = "regulator-fixed";
63 regulator-name = "vcc3v3_sys";
66 regulator-min-microvolt = <3300000>;
67 regulator-max-microvolt = <3300000>;
70 vcc5v0_host: vcc5v0-host-regulator {
71 compatible = "regulator-fixed";
73 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
74 pinctrl-names = "default";
75 pinctrl-0 = <&host_vbus_drv>;
76 regulator-name = "vcc5v0_host";
80 compatible = "pwm-regulator";
81 pwms = <&pwm2 0 25000 0>;
83 rockchip,pwm_voltage = <900000>;
84 regulator-name = "vdd_log";
85 regulator-min-microvolt = <750000>;
86 regulator-max-microvolt = <1350000>;
91 backlight: backlight {
92 compatible = "pwm-backlight";
93 pwms = <&pwm0 0 25000 0>;
95 255 254 253 252 251 250 249 248 247 246 245 244
96 243 242 241 240 239 238 237 236 235 234 233 232
97 231 230 229 228 227 226 225 224 223 222 221 220
98 219 218 217 216 215 214 213 212 211 210 209 208
99 207 206 205 204 203 202 201 200 199 198 197 196
100 195 194 193 192 191 190 189 188 187 186 185 184
101 183 182 181 180 179 178 177 176 175 174 173 172
102 171 170 169 168 167 166 165 164 163 162 161 160
103 159 158 157 156 155 154 153 152 151 150 149 148
104 147 146 145 144 143 142 141 140 139 138 137 136
105 135 134 133 132 131 130 129 128 127 126 125 124
106 123 122 121 120 119 118 117 116 115 114 113 112
107 111 110 109 108 107 106 105 104 103 102 101 100
108 99 98 97 96 95 94 93 92 91 90 89 88
109 87 86 85 84 83 82 81 80 79 78 77 76
110 75 74 73 72 71 70 69 68 67 66 65 64
111 63 62 61 60 59 58 57 56 55 54 53 52
112 51 50 49 48 47 46 45 44 43 42 41 40
113 39 38 37 36 35 34 33 32 31 30 29 28
114 27 26 25 24 23 22 21 20 19 18 17 16
115 15 14 13 12 11 10 9 8 7 6 5 4
117 default-brightness-level = <200>;
118 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
121 vcc_phy: vcc-phy-regulator {
122 compatible = "regulator-fixed";
123 regulator-name = "vcc_phy";
129 compatible = "rockchip,rk3399-io-voltage-domain";
130 rockchip,grf = <&grf>;
132 bt656-supply = <&vcc1v8_dvp>;
133 audio-supply = <&vcca1v8_codec>;
134 sdmmc-supply = <&vcc_sd>;
135 gpio1830-supply = <&vcc_3v0>;
139 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
140 rockchip,grf = <&pmugrf>;
142 pmu1830-supply = <&vcc_1v8>;
146 compatible = "simple-audio-card";
147 simple-audio-card,format = "i2s";
148 simple-audio-card,name = "rockchip,es8316-codec";
149 simple-audio-card,mclk-fs = <256>;
150 simple-audio-card,widgets =
151 "Microphone", "Mic Jack",
152 "Headphone", "Headphone Jack";
153 simple-audio-card,routing =
154 "Mic Jack", "MICBIAS1",
156 "Headphone Jack", "HPOL",
157 "Headphone Jack", "HPOR";
158 simple-audio-card,cpu {
161 simple-audio-card,codec {
162 sound-dai = <&es8316>;
167 compatible = "simple-audio-card";
168 simple-audio-card,name = "rockchip,spdif";
169 simple-audio-card,cpu {
170 sound-dai = <&spdif>;
172 simple-audio-card,codec {
173 sound-dai = <&spdif_out>;
177 spdif_out: spdif-out {
178 compatible = "linux,spdif-dit";
179 #sound-dai-cells = <0>;
182 sdio_pwrseq: sdio-pwrseq {
183 compatible = "mmc-pwrseq-simple";
185 clock-names = "ext_clock";
186 pinctrl-names = "default";
187 pinctrl-0 = <&wifi_enable_h>;
190 * On the module itself this is one of these (depending
191 * on the actual card populated):
192 * - SDIO_RESET_L_WL_REG_ON
193 * - PDN (power down when low)
195 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
199 compatible = "wlan-platdata";
200 rockchip,grf = <&grf>;
201 wifi_chip_type = "ap6354";
203 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
208 compatible = "bluetooth-platdata";
209 //wifi-bt-power-toggle;
210 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
211 pinctrl-names = "default", "rts_gpio";
212 pinctrl-0 = <&uart0_rts>;
213 pinctrl-1 = <&uart0_gpios>;
214 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
215 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
216 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
217 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
223 clock-frequency = <50000000>;
224 clock-freq-min-max = <400000 150000000>;
232 vqmmc-supply = <&vcc_sd>;
233 pinctrl-names = "default";
234 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
239 clock-frequency = <150000000>;
240 clock-freq-min-max = <200000 150000000>;
246 keep-power-in-suspend;
247 mmc-pwrseq = <&sdio_pwrseq>;
250 pinctrl-names = "default";
251 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
257 freq-sel = <200000000>;
268 mmc-hs400-enhanced-strobe;
274 rockchip,i2s-broken-burst-len;
275 rockchip,playback-channels = <8>;
276 rockchip,capture-channels = <8>;
277 #sound-dai-cells = <0>;
281 #sound-dai-cells = <0>;
286 #sound-dai-cells = <0>;
291 i2c-scl-rising-time-ns = <180>;
292 i2c-scl-falling-time-ns = <30>;
293 clock-frequency = <400000>;
296 compatible = "xz3216";
300 #address-cells = <1>;
302 vdd_cpu_b: regulator@0 {
304 vin-supply = <&vcc_sys>;
305 regulator-compatible = "xz_dcdc1";
306 regulator-name = "vdd_cpu_b";
307 regulator-min-microvolt = <712500>;
308 regulator-max-microvolt = <1500000>;
309 regulator-ramp-delay = <1000>;
310 fcs,suspend-voltage-selector = <1>;
313 regulator-state-mem {
314 regulator-off-in-suspend;
321 compatible = "silergy,syr828";
324 vin-supply = <&vcc_sys>;
325 regulator-compatible = "fan53555-reg";
326 regulator-name = "vdd_gpu";
327 regulator-min-microvolt = <735000>;
328 regulator-max-microvolt = <1400000>;
329 regulator-ramp-delay = <1000>;
330 fcs,suspend-voltage-selector = <1>;
333 regulator-state-mem {
334 regulator-off-in-suspend;
339 compatible = "rockchip,rk818";
342 clock-output-names = "xin32k", "wifibt_32kin";
343 interrupt-parent = <&gpio1>;
344 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
345 pinctrl-names = "default";
346 pinctrl-0 = <&pmic_int_l>;
347 rockchip,system-power-controller;
348 rk818,support_dc_chg = <1>;/*1: dc chg; 0:usb chg*/
352 vcc1-supply = <&vcc_sys>;
353 vcc2-supply = <&vcc_sys>;
354 vcc3-supply = <&vcc_sys>;
355 vcc4-supply = <&vcc_sys>;
356 vcc6-supply = <&vcc_sys>;
357 vcc7-supply = <&vcc3v3_sys>;
358 vcc8-supply = <&vcc_sys>;
359 vcc9-supply = <&vcc3v3_sys>;
362 vdd_cpu_l: DCDC_REG1 {
363 regulator-name = "vdd_cpu_l";
366 regulator-min-microvolt = <750000>;
367 regulator-max-microvolt = <1350000>;
368 regulator-ramp-delay = <6001>;
369 regulator-state-mem {
370 regulator-off-in-suspend;
374 vdd_center: DCDC_REG2 {
375 regulator-name = "vdd_center";
378 regulator-min-microvolt = <800000>;
379 regulator-max-microvolt = <1350000>;
380 regulator-ramp-delay = <6001>;
381 regulator-state-mem {
382 regulator-on-in-suspend;
383 regulator-suspend-microvolt = <1000000>;
388 regulator-name = "vcc_ddr";
391 regulator-state-mem {
392 regulator-on-in-suspend;
397 regulator-name = "vcc_1v8";
400 regulator-min-microvolt = <1800000>;
401 regulator-max-microvolt = <1800000>;
402 regulator-state-mem {
403 regulator-on-in-suspend;
404 regulator-suspend-microvolt = <1800000>;
408 vcca3v0_codec: LDO_REG1 {
411 regulator-min-microvolt = <3000000>;
412 regulator-max-microvolt = <3000000>;
413 regulator-name = "vcca3v0_codec";
414 regulator-state-mem {
415 regulator-off-in-suspend;
419 vcc3v0_tp: LDO_REG2 {
422 regulator-min-microvolt = <3000000>;
423 regulator-max-microvolt = <3000000>;
424 regulator-name = "vcc3v0_tp";
425 regulator-state-mem {
426 regulator-off-in-suspend;
430 vcca1v8_codec: LDO_REG3 {
433 regulator-min-microvolt = <1800000>;
434 regulator-max-microvolt = <1800000>;
435 regulator-name = "vcca1v8_codec";
436 regulator-state-mem {
437 regulator-off-in-suspend;
441 vcc_power_on: LDO_REG4 {
444 regulator-min-microvolt = <3300000>;
445 regulator-max-microvolt = <3300000>;
446 regulator-name = "vcc_power_on";
447 regulator-state-mem {
448 regulator-on-in-suspend;
449 regulator-suspend-microvolt = <3300000>;
456 regulator-min-microvolt = <3000000>;
457 regulator-max-microvolt = <3000000>;
458 regulator-name = "vcc_3v0";
459 regulator-state-mem {
460 regulator-off-in-suspend;
467 regulator-min-microvolt = <1500000>;
468 regulator-max-microvolt = <1500000>;
469 regulator-name = "vcc_1v5";
470 regulator-state-mem {
471 regulator-off-in-suspend;
475 vcc1v8_dvp: LDO_REG7 {
478 regulator-min-microvolt = <1800000>;
479 regulator-max-microvolt = <1800000>;
480 regulator-name = "vcc1v8_dvp";
481 regulator-state-mem {
482 regulator-off-in-suspend;
486 vcc3v3_s3: LDO_REG8 {
489 regulator-min-microvolt = <3300000>;
490 regulator-max-microvolt = <3300000>;
491 regulator-name = "vcc3v3_s3";
492 regulator-state-mem {
493 regulator-on-in-suspend;
494 regulator-suspend-microvolt = <3300000>;
501 regulator-min-microvolt = <3000000>;
502 regulator-max-microvolt = <3000000>;
503 regulator-name = "vcc_sd";
504 regulator-state-mem {
505 regulator-on-in-suspend;
506 regulator-suspend-microvolt = <3000000>;
510 vcc3v3_s0: SWITCH_REG {
513 regulator-name = "vcc3v3_s0";
514 regulator-state-mem {
515 regulator-on-in-suspend;
521 ocv_table = <3400 3675 3689 3716 3740 3756 3768 3780
522 3793 3807 3827 3853 3896 3937 3974 4007 4066
523 4110 4161 4217 4308>;
524 design_capacity = <7916>;
525 design_qmax = <8708>;
527 max_input_current = <3000>;
528 max_chrg_current = <4500>;
529 max_chrg_voltage = <4350>;
530 sleep_enter_current = <300>;
531 sleep_exit_current = <300>;
532 power_off_thresd = <3400>;
533 zero_algorithm_vol = <3950>;
534 fb_temperature = <115>;
535 max_soc_offset = <60>;
547 i2c-scl-rising-time-ns = <140>;
548 i2c-scl-falling-time-ns = <30>;
551 #sound-dai-cells = <0>;
552 compatible = "everest,es8316";
554 pinctrl-names = "default";
555 pinctrl-0 = <&hp_det>;
556 clocks = <&cru SCLK_I2S_8CH_OUT>;
557 clock-names = "mclk";
558 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
559 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
565 i2c-scl-rising-time-ns = <345>;
566 i2c-scl-falling-time-ns = <11>;
567 clock-frequency = <400000>;
571 compatible = "invensense,mpu6500";
572 pinctrl-names = "default";
573 pinctrl-0 = <&mpu6500_irq_gpio>;
575 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
576 mpu-int_config = <0x10>;
577 mpu-level_shifter = <0>;
578 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
587 compatible = "ak8963";
588 pinctrl-names = "default";
589 pinctrl-0 = <&ak8963_irq_gpio>;
591 type = <SENSOR_TYPE_COMPASS>;
592 irq-gpio = <&gpio2 28 IRQ_TYPE_EDGE_RISING>;
594 poll_delay_ms = <30>;
600 compatible = "capella,light_cm3218";
601 pinctrl-names = "default";
602 pinctrl-0 = <&cm3218_irq_gpio>;
604 type = <SENSOR_TYPE_LIGHT>;
605 irq-gpio = <&gpio4 24 IRQ_TYPE_EDGE_RISING>;
607 poll_delay_ms = <30>;
613 i2c-scl-rising-time-ns = <150>;
614 i2c-scl-falling-time-ns = <30>;
615 clock-frequency = <400000>;
618 compatible = "goodix,gt9xx";
620 touch-gpio = <&gpio3 12 IRQ_TYPE_LEVEL_LOW>;
621 reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
625 tp-supply = <&vcc3v0_tp>;
638 cpu-supply = <&vdd_cpu_l>;
642 cpu-supply = <&vdd_cpu_l>;
646 cpu-supply = <&vdd_cpu_l>;
650 cpu-supply = <&vdd_cpu_l>;
654 cpu-supply = <&vdd_cpu_b>;
658 cpu-supply = <&vdd_cpu_b>;
663 mali-supply = <&vdd_gpu>;
672 max-freq = <50000000>;
675 compatible = "inv-spi,mpu6500";
676 pinctrl-names = "default";
677 pinctrl-0 = <&mpu6500_irq_gpio>;
678 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
680 spi-max-frequency = <1000000>;
683 mpu-int_config = <0x00>;
684 mpu-level_shifter = <0>;
685 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
694 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
695 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
702 u2phy1_host: host-port {
703 phy-supply = <&vcc5v0_host>;
709 pinctrl-names = "default";
710 pinctrl-0 = <&uart0_xfer &uart0_cts>;
764 wifi_enable_h: wifi-enable-h {
765 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
770 uart0_gpios: uart0-gpios {
771 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
776 pmic_int_l: pmic-int-l {
778 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
781 pmic_dvs2: pmic-dvs2 {
783 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
789 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;
794 lcdpwr_enable_h: lcdpwr-enable-h {
795 rockchip,pins = <3 8 RK_FUNC_GPIO &pcfg_pull_up>;
800 mpu6500_irq_gpio: mpu6500-irq-gpio {
801 rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
806 ak8963_irq_gpio: ak8963-irq-gpio {
807 rockchip,pins = <2 28 RK_FUNC_GPIO &pcfg_pull_none>;
812 cm3218_irq_gpio: cm3218-irq-gpio {
813 rockchip,pins = <4 24 RK_FUNC_GPIO &pcfg_pull_none>;
818 host_vbus_drv: host-vbus-drv {
820 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
826 #include <dt-bindings/display/screen-timing/lcd-LP097Qx2.dtsi>
831 power_ctr: power_ctr {
832 rockchip,debug = <0>;
835 rockchip,power_type = <GPIO>;
836 pinctrl-names = "default";
837 pinctrl-0 = <&lcdpwr_enable_h>;
838 gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
839 rockchip,delay = <10>;