arch/arm64/boot/dts/rockchip/rk3399-firefly-linux.dts

   1 /*
   2  * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 /dts-v1/;
  44
  45 #include "dt-bindings/pwm/pwm.h"
  46 #include "rk3399.dtsi"
  47 #include "rk3399-opp.dtsi"
  48 #include "rk3399-linux.dtsi"
  49 #include <dt-bindings/input/input.h>
  50
  51 / {
  52         model = "Rockchip RK3399 Firefly Board (Linux Opensource)";
  53         compatible = "rockchip,rk3399-firefly-linux", "rockchip,rk3399";
  54
  55         backlight: backlight {
  56                 status = "disabled";
  57                 compatible = "pwm-backlight";
  58                 pwms = <&pwm0 0 25000 0>;
  59                 brightness-levels = <
  60                           0   1   2   3   4   5   6   7
  61                           8   9  10  11  12  13  14  15
  62                          16  17  18  19  20  21  22  23
  63                          24  25  26  27  28  29  30  31
  64                          32  33  34  35  36  37  38  39
  65                          40  41  42  43  44  45  46  47
  66                          48  49  50  51  52  53  54  55
  67                          56  57  58  59  60  61  62  63
  68                          64  65  66  67  68  69  70  71
  69                          72  73  74  75  76  77  78  79
  70                          80  81  82  83  84  85  86  87
  71                          88  89  90  91  92  93  94  95
  72                          96  97  98  99 100 101 102 103
  73                         104 105 106 107 108 109 110 111
  74                         112 113 114 115 116 117 118 119
  75                         120 121 122 123 124 125 126 127
  76                         128 129 130 131 132 133 134 135
  77                         136 137 138 139 140 141 142 143
  78                         144 145 146 147 148 149 150 151
  79                         152 153 154 155 156 157 158 159
  80                         160 161 162 163 164 165 166 167
  81                         168 169 170 171 172 173 174 175
  82                         176 177 178 179 180 181 182 183
  83                         184 185 186 187 188 189 190 191
  84                         192 193 194 195 196 197 198 199
  85                         200 201 202 203 204 205 206 207
  86                         208 209 210 211 212 213 214 215
  87                         216 217 218 219 220 221 222 223
  88                         224 225 226 227 228 229 230 231
  89                         232 233 234 235 236 237 238 239
  90                         240 241 242 243 244 245 246 247
  91                         248 249 250 251 252 253 254 255>;
  92                 default-brightness-level = <200>;
  93         };
  94
  95         clkin_gmac: external-gmac-clock {
  96                 compatible = "fixed-clock";
  97                 clock-frequency = <125000000>;
  98                 clock-output-names = "clkin_gmac";
  99                 #clock-cells = <0>;
 100         };
 101
 102         dw_hdmi_audio: dw-hdmi-audio {
 103                 status = "disabled";
 104                 compatible = "rockchip,dw-hdmi-audio";
 105                 #sound-dai-cells = <0>;
 106         };
 107
 108         edp_panel: edp-panel {
 109                 status = "disabled";
 110                 compatible = "sharp,lcd-f402", "panel-simple";
 111                 backlight = <&backlight>;
 112                 power-supply = <&vcc_lcd>;
 113                 enable-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
 114                 pinctrl-names = "default";
 115                 pinctrl-0 = <&lcd_panel_reset>;
 116
 117                 ports {
 118                         panel_in_edp: endpoint {
 119                                 remote-endpoint = <&edp_out_panel>;
 120                         };
 121                 };
 122         };
 123
 124         fiq_debugger: fiq-debugger {
 125                 compatible = "rockchip,fiq-debugger";
 126                 rockchip,serial-id = <2>;
 127                 rockchip,signal-irq = <182>;
 128                 rockchip,wake-irq = <0>;
 129                 rockchip,irq-mode-enable = <1>;  /* If enable uart uses irq instead of fiq */
 130                 rockchip,baudrate = <1500000>;  /* Only 115200 and 1500000 */
 131                 pinctrl-names = "default";
 132                 pinctrl-0 = <&uart2c_xfer>;
 133         };
 134
 135         gpio-keys {
 136                 compatible = "gpio-keys";
 137                 #address-cells = <1>;
 138                 #size-cells = <0>;
 139                 autorepeat;
 140
 141                 pinctrl-names = "default";
 142                 pinctrl-0 = <&pwrbtn>;
 143
 144                 button@0 {
 145                         gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
 146                         linux,code = <KEY_POWER>;
 147                         label = "GPIO Key Power";
 148                         linux,input-type = <1>;
 149                         gpio-key,wakeup = <1>;
 150                         debounce-interval = <100>;
 151                 };
 152         };
 153
 154         rt5640-sound {
 155                 compatible = "simple-audio-card";
 156                 simple-audio-card,format = "i2s";
 157                 simple-audio-card,name = "rockchip,rt5640-codec";
 158                 simple-audio-card,mclk-fs = <256>;
 159                 simple-audio-card,widgets =
 160                         "Microphone", "Mic Jack",
 161                         "Headphone", "Headphone Jack";
 162                 simple-audio-card,routing =
 163                         "Mic Jack", "MICBIAS1",
 164                         "IN1P", "Mic Jack",
 165                         "Headphone Jack", "HPOL",
 166                         "Headphone Jack", "HPOR";
 167                 simple-audio-card,cpu {
 168                         sound-dai = <&i2s1>;
 169                 };
 170                 simple-audio-card,codec {
 171                         sound-dai = <&rt5640>;
 172                 };
 173         };
 174
 175         hdmi_sound: hdmi-sound {
 176                 status = "disabled";
 177                 compatible = "simple-audio-card";
 178                 simple-audio-card,format = "i2s";
 179                 simple-audio-card,mclk-fs = <256>;
 180                 simple-audio-card,name = "rockchip,hdmi";
 181
 182                 simple-audio-card,cpu {
 183                         sound-dai = <&i2s2>;
 184                 };
 185                 simple-audio-card,codec {
 186                         sound-dai = <&dw_hdmi_audio>;
 187                 };
 188         };
 189
 190         hdmi_codec: hdmi-codec {
 191                 compatible = "simple-audio-card";
 192                 simple-audio-card,format = "i2s";
 193                 simple-audio-card,mclk-fs = <256>;
 194                 simple-audio-card,name = "HDMI-CODEC";
 195
 196                 simple-audio-card,cpu {
 197                         sound-dai = <&i2s2>;
 198                 };
 199
 200                 simple-audio-card,codec {
 201                         sound-dai = <&hdmi>;
 202                 };
 203         };
 204
 205         spdif-sound {
 206                 status = "okay";
 207                 compatible = "simple-audio-card";
 208                 simple-audio-card,name = "ROCKCHIP,SPDIF";
 209                 simple-audio-card,cpu {
 210                         sound-dai = <&spdif>;
 211                 };
 212                 simple-audio-card,codec {
 213                         sound-dai = <&spdif_out>;
 214                 };
 215         };
 216
 217         spdif_out: spdif-out {
 218                 status = "okay";
 219                 compatible = "linux,spdif-dit";
 220                 #sound-dai-cells = <0>;
 221         };
 222
 223         sdio_pwrseq: sdio-pwrseq {
 224                 compatible = "mmc-pwrseq-simple";
 225                 clocks = <&rk808 1>;
 226                 clock-names = "ext_clock";
 227                 pinctrl-names = "default";
 228                 pinctrl-0 = <&wifi_enable_h>;
 229
 230                 /*
 231                  * On the module itself this is one of these (depending
 232                  * on the actual card populated):
 233                  * - SDIO_RESET_L_WL_REG_ON
 234                  * - PDN (power down when low)
 235                  */
 236                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
 237         };
 238
 239         vcc3v3_pcie: vcc3v3-pcie-regulator {
 240                 compatible = "regulator-fixed";
 241                 enable-active-high;
 242                 regulator-always-on;
 243                 regulator-boot-on;
 244                 gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
 245                 pinctrl-names = "default";
 246                 pinctrl-0 = <&pcie_drv>;
 247                 regulator-name = "vcc3v3_pcie";
 248         };
 249
 250         vcc3v3_3g: vcc3v3-3g-regulator {
 251                 compatible = "regulator-fixed";
 252                 enable-active-high;
 253                 regulator-always-on;
 254                 regulator-boot-on;
 255                 gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>;
 256                 pinctrl-names = "default";
 257                 pinctrl-0 = <&pcie_3g_drv>;
 258                 regulator-name = "vcc3v3_3g";
 259     };
 260
 261         vcc3v3_sys: vcc3v3-sys {
 262                 compatible = "regulator-fixed";
 263                 regulator-name = "vcc3v3_sys";
 264                 regulator-always-on;
 265                 regulator-boot-on;
 266                 regulator-min-microvolt = <3300000>;
 267                 regulator-max-microvolt = <3300000>;
 268         };
 269
 270         vcc5v0_host: vcc5v0-host-regulator {
 271                 compatible = "regulator-fixed";
 272                 enable-active-high;
 273                 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
 274                 pinctrl-names = "default";
 275                 pinctrl-0 = <&host_vbus_drv>;
 276                 regulator-name = "vcc5v0_host";
 277                 regulator-always-on;
 278         };
 279
 280         vcc5v0_sys: vcc5v0-sys {
 281                 compatible = "regulator-fixed";
 282                 regulator-name = "vcc5v0_sys";
 283                 regulator-always-on;
 284                 regulator-boot-on;
 285                 regulator-min-microvolt = <5000000>;
 286                 regulator-max-microvolt = <5000000>;
 287         };
 288
 289         vcc_phy: vcc-phy-regulator {
 290                 compatible = "regulator-fixed";
 291                 regulator-name = "vcc_phy";
 292                 regulator-always-on;
 293                 regulator-boot-on;
 294         };
 295
 296         vdd_log: vdd-log {
 297                 compatible = "pwm-regulator";
 298                 pwms = <&pwm2 0 25000 1>;
 299                 regulator-name = "vdd_log";
 300                 regulator-min-microvolt = <800000>;
 301                 regulator-max-microvolt = <1100000>;
 302                 regulator-always-on;
 303                 regulator-boot-on;
 304
 305                 /* for rockchip boot on */
 306                 rockchip,pwm_id= <2>;
 307                 rockchip,pwm_voltage = <1000000>;
 308         };
 309
 310         vccadc_ref: vccadc-ref {
 311                 compatible = "regulator-fixed";
 312                 regulator-name = "vcc1v8_sys";
 313                 regulator-always-on;
 314                 regulator-boot-on;
 315                 regulator-min-microvolt = <1800000>;
 316                 regulator-max-microvolt = <1800000>;
 317         };
 318
 319         vcc_lcd: vcc-lcd-regulator {
 320                 compatible = "regulator-fixed";
 321                 regulator-always-on;
 322                 regulator-boot-on;
 323                 enable-active-high;
 324                 gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
 325                 pinctrl-names = "default";
 326                 pinctrl-0 = <&lcd_en>;
 327                 regulator-name = "vcc_lcd";
 328         };
 329
 330         wireless-wlan {
 331                 compatible = "wlan-platdata";
 332                 rockchip,grf = <&grf>;
 333                 wifi_chip_type = "ap6354";
 334                 sdio_vref = <1800>;
 335                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
 336                 status = "okay";
 337         };
 338
 339         wireless-bluetooth {
 340                 compatible = "bluetooth-platdata";
 341                 //wifi-bt-power-toggle;
 342                 clocks = <&rk808 1>;
 343                 clock-names = "ext_clock";
 344                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
 345                 pinctrl-names = "default", "rts_gpio";
 346                 pinctrl-0 = <&uart0_rts>;
 347                 pinctrl-1 = <&uart0_gpios>;
 348                 //BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
 349                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
 350                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
 351                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
 352                 status = "okay";
 353         };
 354
 355     leds {
 356        compatible = "gpio-leds";
 357        power {
 358            label = "firefly:blue:power";
 359            linux,default-trigger = "ir-power-click";
 360            default-state = "on";
 361            gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>;
 362            pinctrl-names = "default";
 363            pinctrl-0 = <&led_power>;
 364        };
 365        user {
 366            label = "firefly:yellow:user";
 367            linux,default-trigger = "ir-user-click";
 368            default-state = "off";
 369            gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
 370            pinctrl-names = "default";
 371            pinctrl-0 = <&led_user>;
 372        };
 373    };
 374 };
 375
 376 &cpu_l0 {
 377         cpu-supply = <&vdd_cpu_l>;
 378 };
 379
 380 &cpu_l1 {
 381         cpu-supply = <&vdd_cpu_l>;
 382 };
 383
 384 &cpu_l2 {
 385         cpu-supply = <&vdd_cpu_l>;
 386 };
 387
 388 &cpu_l3 {
 389         cpu-supply = <&vdd_cpu_l>;
 390 };
 391
 392 &cpu_b0 {
 393         cpu-supply = <&vdd_cpu_b>;
 394 };
 395
 396 &cpu_b1 {
 397         cpu-supply = <&vdd_cpu_b>;
 398 };
 399
 400 &display_subsystem {
 401         status = "okay";
 402 };
 403
 404 &edp {
 405         status = "disabled";
 406
 407         ports {
 408                 edp_out: port@1 {
 409                         reg = <1>;
 410                         #address-cells = <1>;
 411                         #size-cells = <0>;
 412
 413                         edp_out_panel: endpoint@0 {
 414                                 reg = <0>;
 415                                 remote-endpoint = <&panel_in_edp>;
 416                         };
 417                 };
 418         };
 419 };
 420
 421 &emmc_phy {
 422         status = "okay";
 423 };
 424
 425 &gmac {
 426         phy-supply = <&vcc_phy>;
 427         phy-mode = "rgmii";
 428         clock_in_out = "input";
 429         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
 430         snps,reset-active-low;
 431         snps,reset-delays-us = <0 10000 50000>;
 432         assigned-clocks = <&cru SCLK_RMII_SRC>;
 433         assigned-clock-parents = <&clkin_gmac>;
 434         pinctrl-names = "default";
 435         pinctrl-0 = <&rgmii_pins>;
 436         tx_delay = <0x28>;
 437         rx_delay = <0x1B>;
 438         status = "okay";
 439 };
 440
 441 &gpu {
 442         status = "okay";
 443         mali-supply = <&vdd_gpu>;
 444 };
 445
 446 &hdmi {
 447         #address-cells = <1>;
 448         #size-cells = <0>;
 449         #sound-dai-cells = <0>;
 450         status = "okay";
 451 };
 452
 453 &i2c0 {
 454         status = "okay";
 455         i2c-scl-rising-time-ns = <168>;
 456         i2c-scl-falling-time-ns = <4>;
 457         clock-frequency = <400000>;
 458
 459         vdd_cpu_b: syr827@40 {
 460                 compatible = "silergy,syr827";
 461                 reg = <0x40>;
 462                 vin-supply = <&vcc5v0_sys>;
 463                 regulator-compatible = "fan53555-reg";
 464                 regulator-name = "vdd_cpu_b";
 465                 regulator-min-microvolt = <712500>;
 466                 regulator-max-microvolt = <1500000>;
 467                 regulator-ramp-delay = <1000>;
 468                 vsel-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
 469                 fcs,suspend-voltage-selector = <1>;
 470                 regulator-always-on;
 471                 regulator-boot-on;
 472                 regulator-initial-state = <3>;
 473                         regulator-state-mem {
 474                         regulator-off-in-suspend;
 475                 };
 476         };
 477
 478         vdd_gpu: syr828@41 {
 479                 compatible = "silergy,syr828";
 480                 reg = <0x41>;
 481                 vin-supply = <&vcc5v0_sys>;
 482                 regulator-compatible = "fan53555-reg";
 483                 regulator-name = "vdd_gpu";
 484                 regulator-min-microvolt = <712500>;
 485                 regulator-max-microvolt = <1500000>;
 486                 regulator-ramp-delay = <1000>;
 487                 fcs,suspend-voltage-selector = <1>;
 488                 regulator-always-on;
 489                 regulator-boot-on;
 490                 regulator-initial-state = <3>;
 491                         regulator-state-mem {
 492                         regulator-off-in-suspend;
 493                 };
 494         };
 495
 496         rk808: pmic@1b {
 497                 compatible = "rockchip,rk808";
 498                 reg = <0x1b>;
 499                 interrupt-parent = <&gpio1>;
 500                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 501                 pmic,stby-gpio = <&gpio1 24 GPIO_ACTIVE_LOW>;
 502                 pmic,hold-gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
 503                 pinctrl-names = "default";
 504                 pinctrl-0 = <&pmic_int_l &pmic_dvs2 &pmic_stby &pmic_hold>;
 505                 rockchip,system-power-controller;
 506                 wakeup-source;
 507                 #clock-cells = <1>;
 508                 clock-output-names = "xin32k", "rk808-clkout2";
 509
 510                 vcc1-supply = <&vcc3v3_sys>;
 511                 vcc2-supply = <&vcc3v3_sys>;
 512                 vcc3-supply = <&vcc3v3_sys>;
 513                 vcc4-supply = <&vcc3v3_sys>;
 514                 vcc6-supply = <&vcc3v3_sys>;
 515                 vcc7-supply = <&vcc3v3_sys>;
 516                 vcc8-supply = <&vcc3v3_sys>;
 517                 vcc9-supply = <&vcc3v3_sys>;
 518                 vcc10-supply = <&vcc3v3_sys>;
 519                 vcc11-supply = <&vcc3v3_sys>;
 520                 vcc12-supply = <&vcc3v3_sys>;
 521                 vddio-supply = <&vcc1v8_pmu>;
 522
 523                 regulators {
 524                         vdd_center: DCDC_REG1 {
 525                                 regulator-always-on;
 526                                 regulator-boot-on;
 527                                 regulator-min-microvolt = <750000>;
 528                                 regulator-max-microvolt = <1350000>;
 529                                 regulator-ramp-delay = <6001>;
 530                                 regulator-name = "vdd_center";
 531                                 regulator-state-mem {
 532                                         regulator-off-in-suspend;
 533                                 };
 534                         };
 535
 536                         vdd_cpu_l: DCDC_REG2 {
 537                                 regulator-always-on;
 538                                 regulator-boot-on;
 539                                 regulator-min-microvolt = <750000>;
 540                                 regulator-max-microvolt = <1350000>;
 541                                 regulator-ramp-delay = <6001>;
 542                                 regulator-name = "vdd_cpu_l";
 543                                 regulator-state-mem {
 544                                         regulator-off-in-suspend;
 545                                 };
 546                         };
 547
 548                         vcc_ddr: DCDC_REG3 {
 549                                 regulator-always-on;
 550                                 regulator-boot-on;
 551                                 regulator-name = "vcc_ddr";
 552                                 regulator-state-mem {
 553                                         regulator-on-in-suspend;
 554                                 };
 555                         };
 556
 557                         vcc_1v8: DCDC_REG4 {
 558                                 regulator-always-on;
 559                                 regulator-boot-on;
 560                                 regulator-min-microvolt = <1800000>;
 561                                 regulator-max-microvolt = <1800000>;
 562                                 regulator-name = "vcc_1v8";
 563                                 regulator-state-mem {
 564                                         regulator-on-in-suspend;
 565                                         regulator-suspend-microvolt = <1800000>;
 566                                 };
 567                         };
 568
 569                         vcc1v8_dvp: LDO_REG1 {
 570                                 regulator-always-on;
 571                                 regulator-boot-on;
 572                                 regulator-min-microvolt = <1800000>;
 573                                 regulator-max-microvolt = <1800000>;
 574                                 regulator-name = "vcc1v8_dvp";
 575                                 regulator-state-mem {
 576                                         regulator-off-in-suspend;
 577                                 };
 578                         };
 579
 580                         vcc3v0_tp: LDO_REG2 {
 581                                 regulator-always-on;
 582                                 regulator-boot-on;
 583                                 regulator-min-microvolt = <3000000>;
 584                                 regulator-max-microvolt = <3000000>;
 585                                 regulator-name = "vcc3v0_tp";
 586                                 regulator-state-mem {
 587                                         regulator-off-in-suspend;
 588                                 };
 589                         };
 590
 591                         vcc1v8_pmu: LDO_REG3 {
 592                                 regulator-always-on;
 593                                 regulator-boot-on;
 594                                 regulator-min-microvolt = <1800000>;
 595                                 regulator-max-microvolt = <1800000>;
 596                                 regulator-name = "vcc1v8_pmu";
 597                                 regulator-state-mem {
 598                                         regulator-on-in-suspend;
 599                                         regulator-suspend-microvolt = <1800000>;
 600                                 };
 601                         };
 602
 603                         vcc_sd: LDO_REG4 {
 604                                 regulator-always-on;
 605                                 regulator-boot-on;
 606                                 regulator-min-microvolt = <1800000>;
 607                                 regulator-max-microvolt = <3300000>;
 608                                 regulator-name = "vcc_sd";
 609                                 regulator-state-mem {
 610                                         regulator-on-in-suspend;
 611                                         regulator-suspend-microvolt = <3300000>;
 612                                 };
 613                         };
 614
 615                         vcca3v0_codec: LDO_REG5 {
 616                                 regulator-always-on;
 617                                 regulator-boot-on;
 618                                 regulator-min-microvolt = <3000000>;
 619                                 regulator-max-microvolt = <3000000>;
 620                                 regulator-name = "vcca3v0_codec";
 621                                 regulator-state-mem {
 622                                         regulator-off-in-suspend;
 623                                 };
 624                         };
 625
 626                         vcc_1v5: LDO_REG6 {
 627                                 regulator-always-on;
 628                                 regulator-boot-on;
 629                                 regulator-min-microvolt = <1500000>;
 630                                 regulator-max-microvolt = <1500000>;
 631                                 regulator-name = "vcc_1v5";
 632                                 regulator-state-mem {
 633                                         regulator-on-in-suspend;
 634                                         regulator-suspend-microvolt = <1500000>;
 635                                 };
 636                         };
 637
 638                         vcca1v8_codec: LDO_REG7 {
 639                                 regulator-always-on;
 640                                 regulator-boot-on;
 641                                 regulator-min-microvolt = <1800000>;
 642                                 regulator-max-microvolt = <1800000>;
 643                                 regulator-name = "vcca1v8_codec";
 644                                 regulator-state-mem {
 645                                         regulator-off-in-suspend;
 646                                 };
 647                         };
 648
 649                         vcc_3v0: LDO_REG8 {
 650                                 regulator-always-on;
 651                                 regulator-boot-on;
 652                                 regulator-min-microvolt = <3000000>;
 653                                 regulator-max-microvolt = <3000000>;
 654                                 regulator-name = "vcc_3v0";
 655                                 regulator-state-mem {
 656                                         regulator-on-in-suspend;
 657                                         regulator-suspend-microvolt = <3000000>;
 658                                 };
 659                         };
 660
 661                         vcc3v3_s3: SWITCH_REG1 {
 662                                 regulator-always-on;
 663                                 regulator-boot-on;
 664                                 regulator-name = "vcc3v3_s3";
 665                                 regulator-state-mem {
 666                                         regulator-off-in-suspend;
 667                                 };
 668                         };
 669
 670                         vcc3v3_s0: SWITCH_REG2 {
 671                                 regulator-always-on;
 672                                 regulator-boot-on;
 673                                 regulator-name = "vcc3v3_s0";
 674                                 regulator-state-mem {
 675                                         regulator-off-in-suspend;
 676                                 };
 677                         };
 678                 };
 679         };
 680 };
 681
 682 &i2c1 {
 683         status = "okay";
 684         i2c-scl-rising-time-ns = <300>;
 685         i2c-scl-falling-time-ns = <15>;
 686
 687         rt5640: rt5640@1c {
 688                 #sound-dai-cells = <0>;
 689                 compatible = "realtek,rt5640";
 690                 reg = <0x1c>;
 691                 clocks = <&cru SCLK_I2S_8CH_OUT>;
 692                 clock-names = "mclk";
 693                 realtek,in1-differential;
 694                 pinctrl-names = "default";
 695                 pinctrl-0 = <&rt5640_hpcon>;
 696                 hp-con-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
 697                 //hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
 698                 io-channels = <&saradc 4>;
 699                 hp-det-adc-value = <500>;
 700         };
 701 };
 702
 703 &i2c3 {
 704         status = "okay";
 705         i2c-scl-rising-time-ns = <450>;
 706         i2c-scl-falling-time-ns = <15>;
 707 };
 708
 709 &i2c4 {
 710         status = "okay";
 711         i2c-scl-rising-time-ns = <475>;
 712         i2c-scl-falling-time-ns = <26>;
 713
 714         fusb0: fusb30x@22 {
 715                 compatible = "fairchild,fusb302";
 716                 reg = <0x22>;
 717                 pinctrl-names = "default";
 718                 pinctrl-0 = <&fusb0_int>;
 719                 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
 720                 vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
 721                 status = "okay";
 722         };
 723
 724     gsl3680: gsl3680@41 {
 725                         status = "disabled";
 726                         compatible = "gslX680-pad";
 727                         reg = <0x41>;
 728                         screen_max_x = <1536>;
 729                         screen_max_y = <2048>;
 730                         touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
 731                         reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
 732       };
 733
 734         mpu6050:mpu@68{
 735                         status = "disabled";
 736             compatible = "invensense,mpu6050";
 737             reg = <0x68>;
 738             mpu-int_config = <0x10>;
 739             mpu-level_shifter = <0>;
 740             mpu-orientation = <0 1 0 1 0 0 0 0 1>;
 741             orientation-x= <1>;
 742             orientation-y= <1>;
 743             orientation-z= <1>;
 744             irq-gpio = <&gpio1 4 IRQ_TYPE_LEVEL_LOW>;
 745             mpu-debug = <1>;
 746         };
 747 };
 748
 749 &i2s0 {
 750         status = "okay";
 751         rockchip,i2s-broken-burst-len;
 752         rockchip,playback-channels = <8>;
 753         rockchip,capture-channels = <8>;
 754         assigned-clocks = <&cru SCLK_I2S0_DIV>, <&cru SCLK_I2S_8CH>;
 755         assigned-clock-parents = <&cru PLL_GPLL>, <&cru SCLK_I2S0_8CH>;
 756         #sound-dai-cells = <0>;
 757 };
 758
 759 &i2s1 {
 760         status = "okay";
 761         rockchip,i2s-broken-burst-len;
 762         rockchip,playback-channels = <2>;
 763         rockchip,capture-channels = <2>;
 764         assigned-clocks = <&cru SCLK_I2S1_DIV>, <&cru SCLK_I2S_8CH>;
 765         assigned-clock-parents = <&cru PLL_GPLL>, <&cru SCLK_I2S1_8CH>;
 766         #sound-dai-cells = <0>;
 767 };
 768
 769 &i2s2 {
 770         #sound-dai-cells = <0>;
 771         status = "okay";
 772 };
 773
 774 &io_domains {
 775         status = "okay";
 776
 777         bt656-supply = <&vcc1v8_dvp>;           /* bt656_gpio2ab_ms */
 778         audio-supply = <&vcca1v8_codec>;        /* audio_gpio3d4a_ms */
 779         sdmmc-supply = <&vcc_sd>;               /* sdmmc_gpio4b_ms */
 780         gpio1830-supply = <&vcc_3v0>;           /* gpio1833_gpio4cd_ms */
 781 };
 782
 783 &pcie_phy {
 784         status = "okay";
 785 };
 786
 787 &pcie0 {
 788         ep-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
 789         num-lanes = <4>;
 790         pinctrl-names = "default";
 791         pinctrl-0 = <&pcie_clkreqn_cpm>;
 792         status = "okay";
 793 };
 794
 795 &pmu_io_domains {
 796         status = "okay";
 797         pmu1830-supply = <&vcc_3v0>;
 798 };
 799
 800 &pinctrl {
 801         buttons {
 802                 pwrbtn: pwrbtn {
 803                         rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
 804                 };
 805         };
 806
 807         lcd-panel {
 808                 lcd_panel_reset: lcd-panel-reset {
 809                         rockchip,pins = <4 29 RK_FUNC_GPIO &pcfg_pull_up>;
 810                 };
 811
 812                 lcd_en: lcd-en {
 813                         rockchip,pins = <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
 814                 };
 815         };
 816
 817         pcie {
 818                 pcie_drv: pcie-drv {
 819                         rockchip,pins =
 820                                 <1 17 RK_FUNC_GPIO &pcfg_pull_none>;
 821                 };
 822                 pcie_3g_drv: pcie-3g-drv {
 823                 rockchip,pins =
 824                                 <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
 825                 };
 826
 827         };
 828
 829         pmic {
 830                 vsel1_gpio: vsel1-gpio {
 831                         rockchip,pins =
 832                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
 833                 };
 834
 835                 vsel2_gpio: vsel2-gpio {
 836                         rockchip,pins =
 837                         <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
 838                 };
 839                 pmic_stby: pmic-stby {
 840                         rockchip,pins =
 841                                 <1 24 RK_FUNC_GPIO &pcfg_pull_up>;
 842                 };
 843
 844                 pmic_hold: pmic-hold{
 845                         rockchip,pins =
 846                                 <1 13 RK_FUNC_GPIO &pcfg_pull_up>;
 847                 };
 848
 849         };
 850
 851         sdio-pwrseq {
 852                 wifi_enable_h: wifi-enable-h {
 853                         rockchip,pins =
 854                                 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
 855                 };
 856         };
 857
 858         wireless-bluetooth {
 859                 uart0_gpios: uart0-gpios {
 860                         rockchip,pins =
 861                                 <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
 862                 };
 863         };
 864
 865         leds {
 866                 led_power: led-power {
 867                         rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
 868                 };
 869
 870                 led_user: led-user {
 871                         rockchip,pins = <0 13 RK_FUNC_GPIO &pcfg_pull_none>;
 872                 };
 873         };
 874
 875         rt5640 {
 876                 rt5640_hpcon: rt5640-hpcon {
 877                         rockchip,pins = <4 21 RK_FUNC_GPIO &pcfg_pull_none>;
 878                 };
 879         };
 880
 881         pmic {
 882                 pmic_int_l: pmic-int-l {
 883                         rockchip,pins =
 884                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
 885                 };
 886
 887                 pmic_dvs2: pmic-dvs2 {
 888                         rockchip,pins =
 889                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
 890                 };
 891         };
 892
 893         usb2 {
 894                 host_vbus_drv: host-vbus-drv {
 895                         rockchip,pins =
 896                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
 897                 };
 898         };
 899
 900         fusb30x {
 901                 fusb0_int: fusb0-int {
 902                         rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
 903                 };
 904         };
 905 };
 906
 907 &pwm0 {
 908         status = "okay";
 909 };
 910
 911 &pwm2 {
 912         status = "okay";
 913 };
 914
 915 &rkvdec {
 916         status = "okay";
 917 };
 918
 919 &rockchip_suspend {
 920         rockchip,power-ctrl =
 921                 <&gpio1 18 GPIO_ACTIVE_LOW>,
 922                 <&gpio1 14 GPIO_ACTIVE_HIGH>;
 923 };
 924
 925 &route_edp {
 926         status = "disabled";
 927 };
 928
 929 &route_hdmi {
 930         status = "okay";
 931         logo,mode = "center";
 932 };
 933
 934 &cdn_dp {
 935         status = "disabled";
 936         extcon = <&fusb0>;
 937         phys = <&tcphy0_dp>;
 938 };
 939
 940 &dp_in_vopb {
 941         status = "disabled";
 942 };
 943
 944 &saradc {
 945         status = "okay";
 946         vref-supply = <&vccadc_ref>;
 947 };
 948
 949 &sdhci {
 950         bus-width = <8>;
 951         keep-power-in-suspend;
 952         mmc-hs400-1_8v;
 953         mmc-hs400-enhanced-strobe;
 954         non-removable;
 955         status = "okay";
 956         supports-emmc;
 957 };
 958
 959 &sdmmc {
 960         max-frequency = <150000000>;
 961         supports-sd;
 962         bus-width = <4>;
 963         cap-mmc-highspeed;
 964         cap-sd-highspeed;
 965         disable-wp;
 966         num-slots = <1>;
 967         vqmmc-supply = <&vcc_sd>;
 968         pinctrl-names = "default";
 969         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
 970         status = "okay";
 971 };
 972
 973 &sdio0 {
 974         max-frequency = <50000000>;
 975         supports-sdio;
 976         bus-width = <4>;
 977         disable-wp;
 978         cap-sd-highspeed;
 979         keep-power-in-suspend;
 980         mmc-pwrseq = <&sdio_pwrseq>;
 981         non-removable;
 982         num-slots = <1>;
 983         pinctrl-names = "default";
 984         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
 985         sd-uhs-sdr104;
 986         status = "okay";
 987 };
 988
 989 &spdif {
 990         status = "okay";
 991         pinctrl-0 = <&spdif_bus_1>;
 992         i2c-scl-rising-time-ns = <450>;
 993         i2c-scl-falling-time-ns = <15>;
 994         #sound-dai-cells = <0>;
 995 };
 996
 997 &tcphy0 {
 998         extcon = <&fusb0>;
 999         status = "okay";
1000 };
1001
1002 &tcphy1 {
1003         status = "okay";
1004 };
1005
1006 &tsadc {
1007         /* tshut mode 0:CRU 1:GPIO */
1008         rockchip,hw-tshut-mode = <1>;
1009         /* tshut polarity 0:LOW 1:HIGH */
1010         rockchip,hw-tshut-polarity = <1>;
1011         status = "okay";
1012 };
1013
1014 &u2phy0 {
1015         status = "okay";
1016         extcon = <&fusb0>;
1017
1018         u2phy0_otg: otg-port {
1019                 status = "okay";
1020         };
1021
1022         u2phy0_host: host-port {
1023                 phy-supply = <&vcc5v0_host>;
1024                 status = "okay";
1025         };
1026 };
1027
1028 &u2phy1 {
1029         status = "okay";
1030
1031         u2phy1_otg: otg-port {
1032                 status = "okay";
1033         };
1034
1035         u2phy1_host: host-port {
1036                 phy-supply = <&vcc5v0_host>;
1037                 status = "okay";
1038         };
1039 };
1040
1041 &pwm3 {
1042         status = "okay";
1043         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
1044         compatible = "rockchip,remotectl-pwm";
1045         remote_pwm_id = <3>;
1046         handle_cpu_id = <0>;
1047
1048     ir_key1{
1049         rockchip,usercode = <0xff00>;
1050         rockchip,key_table =
1051             <0xeb   KEY_POWER>,
1052             <0xec   KEY_COMPOSE>,
1053             <0xfe   KEY_BACK>,
1054             <0xb7   KEY_HOME>,
1055             <0xa3   KEY_WWW>,
1056             <0xf4   KEY_VOLUMEUP>,
1057             <0xa7   KEY_VOLUMEDOWN>,
1058             <0xf8   KEY_ENTER>,
1059             <0xfc   KEY_UP>,
1060             <0xfd   KEY_DOWN>,
1061             <0xf1   KEY_LEFT>,
1062             <0xe5   KEY_RIGHT>;
1063     };
1064 };
1065
1066 &uart0 {
1067         pinctrl-names = "default";
1068         pinctrl-0 = <&uart0_xfer &uart0_cts>;
1069         status = "okay";
1070 };
1071
1072 &uart2 {
1073         status = "okay";
1074 };
1075
1076 &uart4 {
1077         current-speed = <9600>;
1078         no-loopback-test;
1079         status = "okay";
1080 };
1081
1082 &usbdrd3_0 {
1083         status = "okay";
1084         extcon = <&fusb0>;
1085 };
1086
1087 &usbdrd3_1 {
1088         status = "okay";
1089 };
1090
1091 &usbdrd_dwc3_0 {
1092         status = "okay";
1093 };
1094
1095 &usbdrd_dwc3_1 {
1096         status = "okay";
1097         dr_mode = "host";
1098 };
1099
1100 &usb_host0_ehci {
1101         status = "okay";
1102 };
1103
1104 &usb_host0_ohci {
1105         status = "okay";
1106 };
1107
1108 &usb_host1_ehci {
1109         status = "okay";
1110 };
1111
1112 &usb_host1_ohci {
1113         status = "okay";
1114 };
1115
1116 &vopb {
1117         status = "okay";
1118 };
1119
1120 &vopb_mmu {
1121         status = "okay";
1122 };
1123
1124 &vopl {
1125         status = "okay";
1126 };
1127
1128 &vopl_mmu {
1129         status = "okay";
1130 };
1131
1132 &vpu {
1133         status = "okay";
1134         /* 0 means ion, 1 means drm */
1135         //allocator = <0>;
1136 };