ARM64: dts: rk3399: lcd_en control in vop
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399-evb.dtsi
1 /*
2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42
43 #include <dt-bindings/pwm/pwm.h>
44 #include "rk3399.dtsi"
45
46 / {
47         compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
48
49         vdd_center: vdd-center {
50                 compatible = "pwm-regulator";
51                 pwms = <&pwm3 0 25000 0>;
52                 regulator-name = "vdd_center";
53                 regulator-min-microvolt = <800000>;
54                 regulator-max-microvolt = <1400000>;
55                 regulator-always-on;
56                 regulator-boot-on;
57         };
58
59         vcc3v3_sys: vcc3v3-sys {
60                 compatible = "regulator-fixed";
61                 regulator-name = "vcc3v3_sys";
62                 regulator-always-on;
63                 regulator-boot-on;
64                 regulator-min-microvolt = <3300000>;
65                 regulator-max-microvolt = <3300000>;
66         };
67
68         backlight: backlight {
69                 compatible = "pwm-backlight";
70                 pwms = <&pwm0 0 25000 0>;
71                 brightness-levels = <
72                           0   1   2   3   4   5   6   7
73                           8   9  10  11  12  13  14  15
74                          16  17  18  19  20  21  22  23
75                          24  25  26  27  28  29  30  31
76                          32  33  34  35  36  37  38  39
77                          40  41  42  43  44  45  46  47
78                          48  49  50  51  52  53  54  55
79                          56  57  58  59  60  61  62  63
80                          64  65  66  67  68  69  70  71
81                          72  73  74  75  76  77  78  79
82                          80  81  82  83  84  85  86  87
83                          88  89  90  91  92  93  94  95
84                          96  97  98  99 100 101 102 103
85                         104 105 106 107 108 109 110 111
86                         112 113 114 115 116 117 118 119
87                         120 121 122 123 124 125 126 127
88                         128 129 130 131 132 133 134 135
89                         136 137 138 139 140 141 142 143
90                         144 145 146 147 148 149 150 151
91                         152 153 154 155 156 157 158 159
92                         160 161 162 163 164 165 166 167
93                         168 169 170 171 172 173 174 175
94                         176 177 178 179 180 181 182 183
95                         184 185 186 187 188 189 190 191
96                         192 193 194 195 196 197 198 199
97                         200 201 202 203 204 205 206 207
98                         208 209 210 211 212 213 214 215
99                         216 217 218 219 220 221 222 223
100                         224 225 226 227 228 229 230 231
101                         232 233 234 235 236 237 238 239
102                         240 241 242 243 244 245 246 247
103                         248 249 250 251 252 253 254 255>;
104                 default-brightness-level = <200>;
105         };
106
107         clkin_gmac: external-gmac-clock {
108                 compatible = "fixed-clock";
109                 clock-frequency = <125000000>;
110                 clock-output-names = "clkin_gmac";
111                 #clock-cells = <0>;
112         };
113
114         vcc_phy: vcc-phy-regulator {
115                 compatible = "regulator-fixed";
116                 regulator-name = "vcc_phy";
117                 regulator-always-on;
118                 regulator-boot-on;
119         };
120
121         io-domains {
122                 compatible = "rockchip,rk3399-io-voltage-domain";
123                 rockchip,grf = <&grf>;
124
125                 bt656-supply = <&vcc1v8_dvp>;
126                 audio-supply = <&vcca1v8_codec>;
127                 sdmmc-supply = <&vcc_sd>;
128                 gpio1830-supply = <&vcc_3v0>;
129         };
130
131         pmu-io-domains {
132                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
133                 rockchip,grf = <&pmugrf>;
134
135                 pmu1830-supply = <&vcc1v8_pmu>;
136         };
137
138         es8316-sound {
139                 compatible = "simple-audio-card";
140                 simple-audio-card,format = "i2s";
141                 simple-audio-card,name = "rockchip,es8316-codec";
142                 simple-audio-card,mclk-fs = <256>;
143                 simple-audio-card,widgets =
144                         "Microphone", "Mic Jack",
145                         "Headphone", "Headphone Jack";
146                 simple-audio-card,routing =
147                         "Mic Jack", "MICBIAS1",
148                         "IN1P", "Mic Jack",
149                         "Headphone Jack", "HPOL",
150                         "Headphone Jack", "HPOR";
151                 simple-audio-card,cpu {
152                         sound-dai = <&i2s0>;
153                 };
154                 simple-audio-card,codec {
155                         sound-dai = <&es8316>;
156                 };
157         };
158
159         hdmi_sound: hdmi-sound {
160                 status = "disabled";
161                 compatible = "simple-audio-card";
162                 simple-audio-card,format = "i2s";
163                 simple-audio-card,mclk-fs = <256>;
164                 simple-audio-card,name = "rockchip,hdmi";
165                 simple-audio-card,cpu {
166                         sound-dai = <&i2s2>;
167                 };
168                 simple-audio-card,codec {
169                         sound-dai = <&dw_hdmi_audio>;
170                 };
171         };
172
173         dw_hdmi_audio: dw-hdmi-audio {
174                 status = "disabled";
175                 compatible = "rockchip,dw-hdmi-audio";
176                 #sound-dai-cells = <0>;
177         };
178
179         spdif_sound: spdif-sound {
180                 status = "disabled";
181                 compatible = "simple-audio-card";
182                 simple-audio-card,name = "ROCKCHIP,SPDIF";
183                 simple-audio-card,cpu {
184                         sound-dai = <&spdif>;
185                 };
186                 simple-audio-card,codec {
187                         sound-dai = <&spdif_out>;
188                 };
189         };
190
191         spdif_out: spdif-out {
192                 status = "disabled";
193                 compatible = "linux,spdif-dit";
194                 #sound-dai-cells = <0>;
195         };
196
197         sdio_pwrseq: sdio-pwrseq {
198                 compatible = "mmc-pwrseq-simple";
199                 clocks = <&rk808 1>;
200                 clock-names = "ext_clock";
201                 pinctrl-names = "default";
202                 pinctrl-0 = <&wifi_enable_h>;
203
204                 /*
205                  * On the module itself this is one of these (depending
206                  * on the actual card populated):
207                  * - SDIO_RESET_L_WL_REG_ON
208                  * - PDN (power down when low)
209                  */
210                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
211         };
212
213         wireless-wlan {
214                 compatible = "wlan-platdata";
215                 rockchip,grf = <&grf>;
216                 wifi_chip_type = "ap6354";
217                 sdio_vref = <1800>;
218                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
219                 status = "okay";
220         };
221
222         wireless-bluetooth {
223                 compatible = "bluetooth-platdata";
224                 //wifi-bt-power-toggle;
225                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
226                 pinctrl-names = "default", "rts_gpio";
227                 pinctrl-0 = <&uart0_rts>;
228                 pinctrl-1 = <&uart0_gpios>;
229                 //BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
230                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
231                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
232                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
233                 status = "okay";
234         };
235 };
236
237 &cpu_l0 {
238         cpu-supply = <&vdd_cpu_l>;
239 };
240
241 &cpu_l1 {
242         cpu-supply = <&vdd_cpu_l>;
243 };
244
245 &cpu_l2 {
246         cpu-supply = <&vdd_cpu_l>;
247 };
248
249 &cpu_l3 {
250         cpu-supply = <&vdd_cpu_l>;
251 };
252
253 &cpu_b0 {
254         cpu-supply = <&vdd_cpu_b>;
255 };
256
257 &cpu_b1 {
258         cpu-supply = <&vdd_cpu_b>;
259 };
260
261 &gpu {
262         status = "okay";
263         mali-supply = <&vdd_gpu>;
264 };
265
266 &sdmmc {
267         clock-frequency = <150000000>;
268         clock-freq-min-max = <400000 150000000>;
269         supports-sd;
270         bus-width = <4>;
271         cap-mmc-highspeed;
272         cap-sd-highspeed;
273         disable-wp;
274         num-slots = <1>;
275         sd-uhs-sdr104;
276         vqmmc-supply = <&vcc_sd>;
277         pinctrl-names = "default";
278         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
279         status = "okay";
280 };
281
282 &sdio0 {
283         clock-frequency = <50000000>;
284         clock-freq-min-max = <200000 50000000>;
285         supports-sdio;
286         bus-width = <4>;
287         disable-wp;
288         cap-sd-highspeed;
289         cap-sdio-irq;
290         keep-power-in-suspend;
291         mmc-pwrseq = <&sdio_pwrseq>;
292         non-removable;
293         num-slots = <1>;
294         pinctrl-names = "default";
295         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
296         sd-uhs-sdr104;
297         status = "okay";
298 };
299
300 &emmc_phy {
301         freq-sel = <200000000>;
302         dr-sel = <50>;
303         opdelay = <4>;
304         status = "okay";
305 };
306
307 &sdhci {
308         bus-width = <8>;
309         mmc-hs400-1_8v;
310         supports-emmc;
311         non-removable;
312         keep-power-in-suspend;
313         mmc-hs400-enhanced-strobe;
314         status = "okay";
315 };
316
317 &i2s0 {
318         status = "okay";
319         rockchip,i2s-broken-burst-len;
320         rockchip,playback-channels = <8>;
321         rockchip,capture-channels = <8>;
322         #sound-dai-cells = <0>;
323 };
324
325 &i2s2 {
326         #sound-dai-cells = <0>;
327 };
328
329 &spdif {
330         #sound-dai-cells = <0>;
331 };
332
333 &i2c0 {
334         status = "okay";
335         i2c-scl-rising-time-ns = <450>;
336         i2c-scl-falling-time-ns = <15>;
337 };
338
339 &i2c1 {
340         status = "okay";
341         i2c-scl-rising-time-ns = <300>;
342         i2c-scl-falling-time-ns = <15>;
343
344         es8316: es8316@10 {
345                 #sound-dai-cells = <0>;
346                 compatible = "everest,es8316";
347                 reg = <0x10>;
348                 clocks = <&cru SCLK_I2S_8CH_OUT>;
349                 clock-names = "mclk";
350                 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
351                 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
352         };
353 };
354
355 &i2c4 {
356         status = "okay";
357         i2c-scl-rising-time-ns = <600>;
358         i2c-scl-falling-time-ns = <20>;
359
360         gt9xx: gt9xx@14 {
361                 compatible = "goodix,gt9xx";
362                 reg = <0x14>;
363                 touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
364                 reset-gpio = <&gpio4 22 GPIO_ACTIVE_HIGH>;
365                 max-x = <1200>;
366                 max-y = <1900>;
367                 tp-size = <911>;
368                 tp-supply = <&vcc3v0_tp>;
369         };
370 };
371
372 &pcie0 {
373         assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
374         assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
375         assigned-clock-rates = <100000000>;
376         ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
377         num-lanes = <4>;
378         pinctrl-names = "default";
379         pinctrl-0 = <&pcie_clkreqn>;
380         status = "okay";
381 };
382
383 &tsadc {
384         rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
385         rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
386         status = "okay";
387 };
388
389 &uart0 {
390         pinctrl-names = "default";
391         pinctrl-0 = <&uart0_xfer &uart0_cts>;
392         status = "okay";
393 };
394
395 &uart2 {
396         status = "okay";
397 };
398
399 &usb2phy {
400         vbus_drv-gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
401 };
402
403 &usb_host0_ehci {
404         status = "okay";
405 };
406
407 &usb_host0_ohci {
408         status = "okay";
409 };
410
411 &usb_host1_ehci {
412         status = "okay";
413 };
414
415 &usb_host1_ohci {
416         status = "okay";
417 };
418
419 &usbdrd3_0 {
420         status = "okay";
421 };
422
423 &usbdrd_dwc3_0 {
424         status = "okay";
425 };
426
427 &usbdrd3_1 {
428         status = "okay";
429 };
430
431 &usbdrd_dwc3_1 {
432         status = "okay";
433 };
434
435 &pwm0 {
436         status = "okay";
437 };
438
439 &pwm3 {
440         status = "okay";
441 };
442
443 &gmac {
444         phy-supply = <&vcc_phy>;
445         phy-mode = "rgmii";
446         clock_in_out = "input";
447         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
448         snps,reset-active-low;
449         snps,reset-delays-us = <0 10000 50000>;
450         assigned-clocks = <&cru SCLK_RMII_SRC>;
451         assigned-clock-parents = <&clkin_gmac>;
452         pinctrl-names = "default";
453         pinctrl-0 = <&rgmii_pins>;
454         tx_delay = <0x28>;
455         rx_delay = <0x11>;
456         status = "okay";
457 };
458
459 &saradc {
460         status = "okay";
461 };
462
463 &pinctrl {
464         sdio-pwrseq {
465                 wifi_enable_h: wifi-enable-h {
466                         rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
467                 };
468         };
469
470         wireless-bluetooth {
471                 uart0_gpios: uart0-gpios {
472                         rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
473                 };
474         };
475
476         pmic {
477                 pmic_int_l: pmic-int-l {
478                         rockchip,pins =
479                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
480                 };
481
482                 pmic_dvs2: pmic-dvs2 {
483                         rockchip,pins =
484                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
485                 };
486         };
487 };