ARM64: dts: rk3399: move opp tables to rk3399-opp.dtsi
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399-evb.dtsi
1 /*
2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42
43 #include <dt-bindings/pwm/pwm.h>
44 #include "rk3399.dtsi"
45 #include "rk3399-opp.dtsi"
46
47 / {
48         compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
49
50         vcc3v3_sys: vcc3v3-sys {
51                 compatible = "regulator-fixed";
52                 regulator-name = "vcc3v3_sys";
53                 regulator-always-on;
54                 regulator-boot-on;
55                 regulator-min-microvolt = <3300000>;
56                 regulator-max-microvolt = <3300000>;
57         };
58
59         vcc5v0_host: vcc5v0-host-regulator {
60                 compatible = "regulator-fixed";
61                 enable-active-high;
62                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
63                 pinctrl-names = "default";
64                 pinctrl-0 = <&host_vbus_drv>;
65                 regulator-name = "vcc5v0_host";
66         };
67
68         backlight: backlight {
69                 compatible = "pwm-backlight";
70                 pwms = <&pwm0 0 25000 0>;
71                 brightness-levels = <
72                           0   1   2   3   4   5   6   7
73                           8   9  10  11  12  13  14  15
74                          16  17  18  19  20  21  22  23
75                          24  25  26  27  28  29  30  31
76                          32  33  34  35  36  37  38  39
77                          40  41  42  43  44  45  46  47
78                          48  49  50  51  52  53  54  55
79                          56  57  58  59  60  61  62  63
80                          64  65  66  67  68  69  70  71
81                          72  73  74  75  76  77  78  79
82                          80  81  82  83  84  85  86  87
83                          88  89  90  91  92  93  94  95
84                          96  97  98  99 100 101 102 103
85                         104 105 106 107 108 109 110 111
86                         112 113 114 115 116 117 118 119
87                         120 121 122 123 124 125 126 127
88                         128 129 130 131 132 133 134 135
89                         136 137 138 139 140 141 142 143
90                         144 145 146 147 148 149 150 151
91                         152 153 154 155 156 157 158 159
92                         160 161 162 163 164 165 166 167
93                         168 169 170 171 172 173 174 175
94                         176 177 178 179 180 181 182 183
95                         184 185 186 187 188 189 190 191
96                         192 193 194 195 196 197 198 199
97                         200 201 202 203 204 205 206 207
98                         208 209 210 211 212 213 214 215
99                         216 217 218 219 220 221 222 223
100                         224 225 226 227 228 229 230 231
101                         232 233 234 235 236 237 238 239
102                         240 241 242 243 244 245 246 247
103                         248 249 250 251 252 253 254 255>;
104                 default-brightness-level = <200>;
105         };
106
107         clkin_gmac: external-gmac-clock {
108                 compatible = "fixed-clock";
109                 clock-frequency = <125000000>;
110                 clock-output-names = "clkin_gmac";
111                 #clock-cells = <0>;
112         };
113
114         vcc_phy: vcc-phy-regulator {
115                 compatible = "regulator-fixed";
116                 regulator-name = "vcc_phy";
117                 regulator-always-on;
118                 regulator-boot-on;
119         };
120
121         io-domains {
122                 compatible = "rockchip,rk3399-io-voltage-domain";
123                 rockchip,grf = <&grf>;
124
125                 bt656-supply = <&vcc1v8_dvp>;
126                 audio-supply = <&vcca1v8_codec>;
127                 sdmmc-supply = <&vcc_sd>;
128                 gpio1830-supply = <&vcc_3v0>;
129         };
130
131         pmu-io-domains {
132                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
133                 rockchip,grf = <&pmugrf>;
134
135                 pmu1830-supply = <&vcc1v8_pmu>;
136         };
137
138         es8316-sound {
139                 compatible = "simple-audio-card";
140                 simple-audio-card,format = "i2s";
141                 simple-audio-card,name = "rockchip,es8316-codec";
142                 simple-audio-card,mclk-fs = <256>;
143                 simple-audio-card,widgets =
144                         "Microphone", "Mic Jack",
145                         "Headphone", "Headphone Jack";
146                 simple-audio-card,routing =
147                         "Mic Jack", "MICBIAS1",
148                         "IN1P", "Mic Jack",
149                         "Headphone Jack", "HPOL",
150                         "Headphone Jack", "HPOR";
151                 simple-audio-card,cpu {
152                         sound-dai = <&i2s0>;
153                 };
154                 simple-audio-card,codec {
155                         sound-dai = <&es8316>;
156                 };
157         };
158
159         hdmi_sound: hdmi-sound {
160                 status = "disabled";
161                 compatible = "simple-audio-card";
162                 simple-audio-card,format = "i2s";
163                 simple-audio-card,mclk-fs = <256>;
164                 simple-audio-card,name = "rockchip,hdmi";
165                 simple-audio-card,cpu {
166                         sound-dai = <&i2s2>;
167                 };
168                 simple-audio-card,codec {
169                         sound-dai = <&dw_hdmi_audio>;
170                 };
171         };
172
173         dw_hdmi_audio: dw-hdmi-audio {
174                 status = "disabled";
175                 compatible = "rockchip,dw-hdmi-audio";
176                 #sound-dai-cells = <0>;
177         };
178
179         spdif_sound: spdif-sound {
180                 status = "disabled";
181                 compatible = "simple-audio-card";
182                 simple-audio-card,name = "ROCKCHIP,SPDIF";
183                 simple-audio-card,cpu {
184                         sound-dai = <&spdif>;
185                 };
186                 simple-audio-card,codec {
187                         sound-dai = <&spdif_out>;
188                 };
189         };
190
191         spdif_out: spdif-out {
192                 status = "disabled";
193                 compatible = "linux,spdif-dit";
194                 #sound-dai-cells = <0>;
195         };
196
197         sdio_pwrseq: sdio-pwrseq {
198                 compatible = "mmc-pwrseq-simple";
199                 clocks = <&rk808 1>;
200                 clock-names = "ext_clock";
201                 pinctrl-names = "default";
202                 pinctrl-0 = <&wifi_enable_h>;
203
204                 /*
205                  * On the module itself this is one of these (depending
206                  * on the actual card populated):
207                  * - SDIO_RESET_L_WL_REG_ON
208                  * - PDN (power down when low)
209                  */
210                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
211         };
212
213         wireless-wlan {
214                 compatible = "wlan-platdata";
215                 rockchip,grf = <&grf>;
216                 wifi_chip_type = "ap6354";
217                 sdio_vref = <1800>;
218                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
219                 status = "okay";
220         };
221
222         wireless-bluetooth {
223                 compatible = "bluetooth-platdata";
224                 clocks = <&rk808 1>;
225                 clock-names = "ext_clock";
226                 //wifi-bt-power-toggle;
227                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
228                 pinctrl-names = "default", "rts_gpio";
229                 pinctrl-0 = <&uart0_rts>;
230                 pinctrl-1 = <&uart0_gpios>;
231                 //BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
232                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
233                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
234                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
235                 status = "okay";
236         };
237
238         test-power {
239                 status = "okay";
240         };
241 };
242
243 &cpu_l0 {
244         cpu-supply = <&vdd_cpu_l>;
245 };
246
247 &cpu_l1 {
248         cpu-supply = <&vdd_cpu_l>;
249 };
250
251 &cpu_l2 {
252         cpu-supply = <&vdd_cpu_l>;
253 };
254
255 &cpu_l3 {
256         cpu-supply = <&vdd_cpu_l>;
257 };
258
259 &cpu_b0 {
260         cpu-supply = <&vdd_cpu_b>;
261 };
262
263 &cpu_b1 {
264         cpu-supply = <&vdd_cpu_b>;
265 };
266
267 &gpu {
268         status = "okay";
269         mali-supply = <&vdd_gpu>;
270 };
271
272 &sdmmc {
273         clock-frequency = <150000000>;
274         clock-freq-min-max = <400000 150000000>;
275         supports-sd;
276         bus-width = <4>;
277         cap-mmc-highspeed;
278         cap-sd-highspeed;
279         disable-wp;
280         num-slots = <1>;
281         //sd-uhs-sdr104;
282         vqmmc-supply = <&vcc_sd>;
283         pinctrl-names = "default";
284         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
285         status = "okay";
286 };
287
288 &sdio0 {
289         clock-frequency = <150000000>;
290         clock-freq-min-max = <200000 150000000>;
291         supports-sdio;
292         bus-width = <4>;
293         disable-wp;
294         cap-sd-highspeed;
295         cap-sdio-irq;
296         keep-power-in-suspend;
297         mmc-pwrseq = <&sdio_pwrseq>;
298         non-removable;
299         num-slots = <1>;
300         pinctrl-names = "default";
301         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
302         sd-uhs-sdr104;
303         status = "okay";
304 };
305
306 &emmc_phy {
307         freq-sel = <200000000>;
308         dr-sel = <50>;
309         opdelay = <4>;
310         status = "okay";
311 };
312
313 &dfi {
314 //      status = "okay";
315 };
316
317 &dmc {
318 //      status = "okay";
319         center-supply = <&vdd_center>;
320         upthreshold = <60>;
321         downdifferential = <40>;
322 };
323
324 &sdhci {
325         bus-width = <8>;
326         mmc-hs400-1_8v;
327         supports-emmc;
328         non-removable;
329         keep-power-in-suspend;
330         mmc-hs400-enhanced-strobe;
331         status = "okay";
332 };
333
334 &i2s0 {
335         status = "okay";
336         rockchip,i2s-broken-burst-len;
337         rockchip,playback-channels = <8>;
338         rockchip,capture-channels = <8>;
339         #sound-dai-cells = <0>;
340 };
341
342 &i2s2 {
343         #sound-dai-cells = <0>;
344 };
345
346 &spdif {
347         #sound-dai-cells = <0>;
348 };
349
350 &i2c0 {
351         status = "okay";
352         i2c-scl-rising-time-ns = <450>;
353         i2c-scl-falling-time-ns = <15>;
354 };
355
356 &i2c1 {
357         status = "okay";
358         i2c-scl-rising-time-ns = <300>;
359         i2c-scl-falling-time-ns = <15>;
360
361         es8316: es8316@10 {
362                 #sound-dai-cells = <0>;
363                 compatible = "everest,es8316";
364                 reg = <0x10>;
365                 clocks = <&cru SCLK_I2S_8CH_OUT>;
366                 clock-names = "mclk";
367                 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
368                 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
369         };
370 };
371
372 &i2c4 {
373         status = "okay";
374         i2c-scl-rising-time-ns = <600>;
375         i2c-scl-falling-time-ns = <20>;
376
377         gt9xx: gt9xx@14 {
378                 compatible = "goodix,gt9xx";
379                 reg = <0x14>;
380                 touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
381                 reset-gpio = <&gpio4 22 GPIO_ACTIVE_HIGH>;
382                 max-x = <1200>;
383                 max-y = <1900>;
384                 tp-size = <911>;
385                 tp-supply = <&vcc3v0_tp>;
386         };
387
388         gsl3673: gsl3673@40 {
389                 compatible = "GSL,GSL3673";
390                 reg = <0x40>;
391                 screen_max_x = <1536>;
392                 screen_max_y = <2048>;
393                 irq_gpio_number = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
394                 rst_gpio_number = <&gpio4 22 GPIO_ACTIVE_HIGH>;
395         };
396 };
397
398 &pcie_phy {
399         status = "disabled";
400 };
401
402 &pcie0 {
403         ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
404         num-lanes = <4>;
405         pinctrl-names = "default";
406         pinctrl-0 = <&pcie_clkreqn>;
407         status = "disabled";
408 };
409
410 &tcphy0 {
411         extcon = <&fusb0>;
412         status = "okay";
413 };
414
415 &tcphy1 {
416         extcon = <&fusb1>;
417         status = "okay";
418 };
419
420 &tsadc {
421         rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
422         rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
423         status = "okay";
424 };
425
426 &u2phy0 {
427         status = "okay";
428         extcon = <&fusb0>;
429
430         u2phy0_otg: otg-port {
431                 status = "okay";
432         };
433
434         u2phy0_host: host-port {
435                 phy-supply = <&vcc5v0_host>;
436                 status = "okay";
437         };
438 };
439
440 &u2phy1 {
441         status = "okay";
442         extcon = <&fusb1>;
443
444         u2phy1_otg: otg-port {
445                 status = "okay";
446         };
447
448         u2phy1_host: host-port {
449                 phy-supply = <&vcc5v0_host>;
450                 status = "okay";
451         };
452 };
453
454 &uart0 {
455         pinctrl-names = "default";
456         pinctrl-0 = <&uart0_xfer &uart0_cts>;
457         status = "okay";
458 };
459
460 &uart2 {
461         status = "okay";
462 };
463
464 &usb_host0_ehci {
465         status = "okay";
466 };
467
468 &usb_host0_ohci {
469         status = "okay";
470 };
471
472 &usb_host1_ehci {
473         status = "okay";
474 };
475
476 &usb_host1_ohci {
477         status = "okay";
478 };
479
480 &usbdrd3_0 {
481         extcon = <&fusb0>;
482         status = "okay";
483 };
484
485 &usbdrd_dwc3_0 {
486         status = "okay";
487 };
488
489 &usbdrd3_1 {
490         extcon = <&fusb1>;
491         status = "okay";
492 };
493
494 &usbdrd_dwc3_1 {
495         status = "okay";
496 };
497
498 &pwm0 {
499         status = "okay";
500 };
501
502 &gmac {
503         phy-supply = <&vcc_phy>;
504         phy-mode = "rgmii";
505         clock_in_out = "input";
506         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
507         snps,reset-active-low;
508         snps,reset-delays-us = <0 10000 50000>;
509         assigned-clocks = <&cru SCLK_RMII_SRC>;
510         assigned-clock-parents = <&clkin_gmac>;
511         pinctrl-names = "default";
512         pinctrl-0 = <&rgmii_pins>;
513         tx_delay = <0x28>;
514         rx_delay = <0x11>;
515         status = "okay";
516 };
517
518 &saradc {
519         status = "okay";
520 };
521
522 &pinctrl {
523         sdio-pwrseq {
524                 wifi_enable_h: wifi-enable-h {
525                         rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
526                 };
527         };
528
529         wireless-bluetooth {
530                 uart0_gpios: uart0-gpios {
531                         rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
532                 };
533         };
534
535         pmic {
536                 pmic_int_l: pmic-int-l {
537                         rockchip,pins =
538                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
539                 };
540
541                 pmic_dvs2: pmic-dvs2 {
542                         rockchip,pins =
543                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
544                 };
545                 vsel1_gpio: vsel1-gpio {
546                         rockchip,pins =
547                                 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
548                 };
549                 vsel2_gpio: vsel2-gpio {
550                         rockchip,pins =
551                                 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
552                 };
553         };
554
555         usb2 {
556                 host_vbus_drv: host-vbus-drv {
557                         rockchip,pins =
558                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
559                 };
560         };
561
562         fusb30x {
563                 fusb0_int: fusb0-int {
564                         rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
565                 };
566
567                 fusb1_int: fusb1-int {
568                         rockchip,pins = <1 24 RK_FUNC_GPIO &pcfg_pull_up>;
569                 };
570         };
571 };
572
573 &pvtm {
574         status = "okay";
575 };
576
577 &pmu_pvtm {
578         status = "okay";
579 };