arch/arm64/boot/dts/rockchip/rk3399-evb-rev3.dtsi

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 #include "rk3399-evb.dtsi"
  44
  45 / {
  46         compatible = "rockchip,rk3399-evb-rev3", "rockchip,rk3399";
  47
  48         vcc5v0_sys: vcc5v0-sys {
  49                 compatible = "regulator-fixed";
  50                 regulator-name = "vcc5v0_sys";
  51                 regulator-always-on;
  52                 regulator-boot-on;
  53                 regulator-min-microvolt = <5000000>;
  54                 regulator-max-microvolt = <5000000>;
  55         };
  56
  57         vdd_center: vdd-center {
  58                 compatible = "pwm-regulator";
  59                 rockchip,pwm_id = <2>;
  60                 rockchip,pwm_voltage = <900000>;
  61                 pwms = <&pwm2 0 25000 0>;
  62                 regulator-name = "vdd_center";
  63                 regulator-min-microvolt = <800000>;
  64                 regulator-max-microvolt = <1400000>;
  65                 regulator-always-on;
  66                 regulator-boot-on;
  67         };
  68 };
  69
  70 &cluster0_opp {
  71         opp@408000000 {
  72                 opp-hz = /bits/ 64 <408000000>;
  73                 opp-microvolt = <800000>;
  74                 clock-latency-ns = <40000>;
  75         };
  76         opp@600000000 {
  77                 opp-hz = /bits/ 64 <600000000>;
  78                 opp-microvolt = <800000>;
  79                 clock-latency-ns = <40000>;
  80         };
  81         opp@816000000 {
  82                 opp-hz = /bits/ 64 <816000000>;
  83                 opp-microvolt = <800000>;
  84                 clock-latency-ns = <40000>;
  85         };
  86         opp@1008000000 {
  87                 opp-hz = /bits/ 64 <1008000000>;
  88                 opp-microvolt = <850000>;
  89                 clock-latency-ns = <40000>;
  90         };
  91         opp@1200000000 {
  92                 opp-hz = /bits/ 64 <1200000000>;
  93                 opp-microvolt = <925000>;
  94                 clock-latency-ns = <40000>;
  95         };
  96         opp@1416000000 {
  97                 opp-hz = /bits/ 64 <1416000000>;
  98                 opp-microvolt = <1050000>;
  99                 clock-latency-ns = <40000>;
 100         };
 101         opp@1512000000 {
 102                 opp-hz = /bits/ 64 <1512000000>;
 103                 opp-microvolt = <1100000>;
 104                 clock-latency-ns = <40000>;
 105         };
 106 };
 107
 108 &cluster1_opp {
 109         opp@408000000 {
 110                 opp-hz = /bits/ 64 <408000000>;
 111                 opp-microvolt = <800000>;
 112                 clock-latency-ns = <40000>;
 113         };
 114         opp@600000000 {
 115                 opp-hz = /bits/ 64 <600000000>;
 116                 opp-microvolt = <800000>;
 117                 clock-latency-ns = <40000>;
 118         };
 119         opp@816000000 {
 120                 opp-hz = /bits/ 64 <816000000>;
 121                 opp-microvolt = <825000>;
 122                 clock-latency-ns = <40000>;
 123         };
 124         opp@1008000000 {
 125                 opp-hz = /bits/ 64 <1008000000>;
 126                 opp-microvolt = <850000>;
 127                 clock-latency-ns = <40000>;
 128         };
 129         opp@1200000000 {
 130                 opp-hz = /bits/ 64 <1200000000>;
 131                 opp-microvolt = <900000>;
 132                 clock-latency-ns = <40000>;
 133         };
 134         opp@1416000000 {
 135                 opp-hz = /bits/ 64 <1416000000>;
 136                 opp-microvolt = <1000000>;
 137                 clock-latency-ns = <40000>;
 138         };
 139         opp@1608000000 {
 140                 opp-hz = /bits/ 64 <1608000000>;
 141                 opp-microvolt = <1050000>;
 142                 clock-latency-ns = <40000>;
 143         };
 144         opp@1800000000 {
 145                 opp-hz = /bits/ 64 <1800000000>;
 146                 opp-microvolt = <1150000>;
 147                 clock-latency-ns = <40000>;
 148         };
 149         opp@1992000000 {
 150                 opp-hz = /bits/ 64 <1992000000>;
 151                 opp-microvolt = <1225000>;
 152                 clock-latency-ns = <40000>;
 153         };
 154 };
 155
 156 &CPU_COST_A72 {
 157         busy-cost-data = <
 158                 210   129       /*  408MHz */
 159                 308   184       /*  600MHz */
 160                 419   246       /*  816MHz */
 161                 518   335       /* 1008MHz */
 162                 617   428       /* 1200MHz */
 163                 728   573       /* 1416MHz */
 164                 827   724       /* 1608MHz */
 165                 925   900       /* 1800MHz */
 166                 1024  1108      /* 1992MHz */
 167         >;
 168         idle-cost-data = <
 169               15
 170               15
 171                0
 172         >;
 173 };
 174
 175 &CPU_COST_A53 {
 176         busy-cost-data = <
 177                 108    46       /*  408M */
 178                 159    67       /*  600M */
 179                 216    90       /*  816M */
 180                 267    120      /* 1008M */
 181                 318    153      /* 1200M */
 182                 375    198      /* 1416M */
 183                 401    222      /* 1512M */
 184         >;
 185         idle-cost-data = <
 186               6
 187               6
 188               0
 189         >;
 190 };
 191
 192 &CLUSTER_COST_A72 {
 193         busy-cost-data = <
 194                 210   129       /*  408MHz */
 195                 308   184       /*  600MHz */
 196                 419   246       /*  816MHz */
 197                 518   335       /* 1008MHz */
 198                 617   428       /* 1200MHz */
 199                 728   573       /* 1416MHz */
 200                 827   724       /* 1608MHz */
 201                 925   900       /* 1800MHz */
 202                 1024  1108      /* 1992MHz */
 203         >;
 204         idle-cost-data = <
 205                  65
 206                  65
 207                  65
 208         >;
 209 };
 210
 211 &CLUSTER_COST_A53 {
 212         busy-cost-data = <
 213                 108    46       /*  408M */
 214                 159    67       /*  600M */
 215                 216    90       /*  816M */
 216                 267    120      /* 1008M */
 217                 318    153      /* 1200M */
 218                 375    198      /* 1416M */
 219                 401    222      /* 1512M */
 220         >;
 221         idle-cost-data = <
 222                 56
 223                 56
 224                 56
 225         >;
 226 };
 227
 228 &gpu_opp_table {
 229         opp@200000000 {
 230                 opp-hz = /bits/ 64 <200000000>;
 231                 opp-microvolt = <800000>;
 232         };
 233         opp@300000000 {
 234                 opp-hz = /bits/ 64 <300000000>;
 235                 opp-microvolt = <800000>;
 236         };
 237         opp@400000000 {
 238                 opp-hz = /bits/ 64 <400000000>;
 239                 opp-microvolt = <800000>;
 240         };
 241         opp@500000000 {
 242                 opp-hz = /bits/ 64 <500000000>;
 243                 opp-microvolt = <825000>;
 244         };
 245         opp@600000000 {
 246                 opp-hz = /bits/ 64 <600000000>;
 247                 opp-microvolt = <900000>;
 248         };
 249         opp@800000000 {
 250                 opp-hz = /bits/ 64 <800000000>;
 251                 opp-microvolt = <1050000>;
 252         };
 253 };
 254
 255 &i2c0 {
 256         fusb1: fusb30x@22 {
 257                 compatible = "fairchild,fusb302";
 258                 reg = <0x22>;
 259                 pinctrl-names = "default";
 260                 pinctrl-0 = <&fusb1_int>;
 261                 vbus-5v-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
 262                 int-n-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
 263                 status = "okay";
 264         };
 265
 266         vdd_cpu_b: syr827@40 {
 267                 compatible = "silergy,syr827";
 268                 reg = <0x40>;
 269                 vin-supply = <&vcc5v0_sys>;
 270                 regulator-compatible = "fan53555-reg";
 271                 pinctrl-0 = <&vsel1_gpio>;
 272                 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
 273                 regulator-name = "vdd_cpu_b";
 274                 regulator-min-microvolt = <712500>;
 275                 regulator-max-microvolt = <1500000>;
 276                 regulator-ramp-delay = <1000>;
 277                 fcs,suspend-voltage-selector = <1>;
 278                 regulator-always-on;
 279                 regulator-boot-on;
 280                 regulator-initial-state = <3>;
 281                         regulator-state-mem {
 282                         regulator-off-in-suspend;
 283                 };
 284         };
 285
 286         vdd_gpu: syr828@41 {
 287                 compatible = "silergy,syr828";
 288                 reg = <0x41>;
 289                 vin-supply = <&vcc5v0_sys>;
 290                 regulator-compatible = "fan53555-reg";
 291                 pinctrl-0 = <&vsel2_gpio>;
 292                 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
 293                 regulator-name = "vdd_gpu";
 294                 regulator-min-microvolt = <712500>;
 295                 regulator-max-microvolt = <1500000>;
 296                 regulator-ramp-delay = <1000>;
 297                 fcs,suspend-voltage-selector = <1>;
 298                 regulator-always-on;
 299                 regulator-boot-on;
 300                 regulator-initial-state = <3>;
 301                         regulator-state-mem {
 302                         regulator-off-in-suspend;
 303                 };
 304         };
 305
 306         rk808: pmic@1b {
 307                 compatible = "rockchip,rk808";
 308                 reg = <0x1b>;
 309                 interrupt-parent = <&gpio1>;
 310                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 311                 pinctrl-names = "default";
 312                 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
 313                 rockchip,system-power-controller;
 314                 wakeup-source;
 315                 #clock-cells = <1>;
 316                 clock-output-names = "xin32k", "rk808-clkout2";
 317
 318                 vcc1-supply = <&vcc3v3_sys>;
 319                 vcc2-supply = <&vcc3v3_sys>;
 320                 vcc3-supply = <&vcc3v3_sys>;
 321                 vcc4-supply = <&vcc3v3_sys>;
 322                 vcc6-supply = <&vcc3v3_sys>;
 323                 vcc7-supply = <&vcc3v3_sys>;
 324                 vcc8-supply = <&vcc3v3_sys>;
 325                 vcc9-supply = <&vcc3v3_sys>;
 326                 vcc10-supply = <&vcc3v3_sys>;
 327                 vcc11-supply = <&vcc3v3_sys>;
 328                 vcc12-supply = <&vcc3v3_sys>;
 329                 vddio-supply = <&vcc1v8_pmu>;
 330
 331                 regulators {
 332                         vdd_log: DCDC_REG1 {
 333                                 regulator-always-on;
 334                                 regulator-boot-on;
 335                                 regulator-min-microvolt = <750000>;
 336                                 regulator-max-microvolt = <1350000>;
 337                                 regulator-ramp-delay = <6001>;
 338                                 regulator-name = "vdd_log";
 339                                 regulator-state-mem {
 340                                         regulator-on-in-suspend;
 341                                         regulator-suspend-microvolt = <900000>;
 342                                 };
 343                         };
 344
 345                         vdd_cpu_l: DCDC_REG2 {
 346                                 regulator-always-on;
 347                                 regulator-boot-on;
 348                                 regulator-min-microvolt = <750000>;
 349                                 regulator-max-microvolt = <1350000>;
 350                                 regulator-ramp-delay = <6001>;
 351                                 regulator-name = "vdd_cpu_l";
 352                                 regulator-state-mem {
 353                                         regulator-off-in-suspend;
 354                                 };
 355                         };
 356
 357                         vcc_ddr: DCDC_REG3 {
 358                                 regulator-always-on;
 359                                 regulator-boot-on;
 360                                 regulator-name = "vcc_ddr";
 361                                 regulator-state-mem {
 362                                         regulator-on-in-suspend;
 363                                 };
 364                         };
 365
 366                         vcc_1v8: DCDC_REG4 {
 367                                 regulator-always-on;
 368                                 regulator-boot-on;
 369                                 regulator-min-microvolt = <1800000>;
 370                                 regulator-max-microvolt = <1800000>;
 371                                 regulator-name = "vcc_1v8";
 372                                 regulator-state-mem {
 373                                         regulator-on-in-suspend;
 374                                         regulator-suspend-microvolt = <1800000>;
 375                                 };
 376                         };
 377
 378                         vcc1v8_dvp: LDO_REG1 {
 379                                 regulator-always-on;
 380                                 regulator-boot-on;
 381                                 regulator-min-microvolt = <1800000>;
 382                                 regulator-max-microvolt = <1800000>;
 383                                 regulator-name = "vcc1v8_dvp";
 384                                 regulator-state-mem {
 385                                         regulator-off-in-suspend;
 386                                 };
 387                         };
 388
 389                         vcc3v0_tp: LDO_REG2 {
 390                                 regulator-always-on;
 391                                 regulator-boot-on;
 392                                 regulator-min-microvolt = <3000000>;
 393                                 regulator-max-microvolt = <3000000>;
 394                                 regulator-name = "vcc3v0_tp";
 395                                 regulator-state-mem {
 396                                         regulator-off-in-suspend;
 397                                 };
 398                         };
 399
 400                         vcc1v8_pmu: LDO_REG3 {
 401                                 regulator-always-on;
 402                                 regulator-boot-on;
 403                                 regulator-min-microvolt = <1800000>;
 404                                 regulator-max-microvolt = <1800000>;
 405                                 regulator-name = "vcc1v8_pmu";
 406                                 regulator-state-mem {
 407                                         regulator-on-in-suspend;
 408                                         regulator-suspend-microvolt = <1800000>;
 409                                 };
 410                         };
 411
 412                         vcc_sd: LDO_REG4 {
 413                                 regulator-always-on;
 414                                 regulator-boot-on;
 415                                 regulator-min-microvolt = <1800000>;
 416                                 regulator-max-microvolt = <3300000>;
 417                                 regulator-name = "vcc_sd";
 418                                 regulator-state-mem {
 419                                         regulator-on-in-suspend;
 420                                         regulator-suspend-microvolt = <3300000>;
 421                                 };
 422                         };
 423
 424                         vcca3v0_codec: LDO_REG5 {
 425                                 regulator-always-on;
 426                                 regulator-boot-on;
 427                                 regulator-min-microvolt = <3000000>;
 428                                 regulator-max-microvolt = <3000000>;
 429                                 regulator-name = "vcca3v0_codec";
 430                                 regulator-state-mem {
 431                                         regulator-off-in-suspend;
 432                                 };
 433                         };
 434
 435                         vcc_1v5: LDO_REG6 {
 436                                 regulator-always-on;
 437                                 regulator-boot-on;
 438                                 regulator-min-microvolt = <1500000>;
 439                                 regulator-max-microvolt = <1500000>;
 440                                 regulator-name = "vcc_1v5";
 441                                 regulator-state-mem {
 442                                         regulator-on-in-suspend;
 443                                         regulator-suspend-microvolt = <1500000>;
 444                                 };
 445                         };
 446
 447                         vcca1v8_codec: LDO_REG7 {
 448                                 regulator-always-on;
 449                                 regulator-boot-on;
 450                                 regulator-min-microvolt = <1800000>;
 451                                 regulator-max-microvolt = <1800000>;
 452                                 regulator-name = "vcca1v8_codec";
 453                                 regulator-state-mem {
 454                                         regulator-off-in-suspend;
 455                                 };
 456                         };
 457
 458                         vcc_3v0: LDO_REG8 {
 459                                 regulator-always-on;
 460                                 regulator-boot-on;
 461                                 regulator-min-microvolt = <3000000>;
 462                                 regulator-max-microvolt = <3000000>;
 463                                 regulator-name = "vcc_3v0";
 464                                 regulator-state-mem {
 465                                         regulator-on-in-suspend;
 466                                         regulator-suspend-microvolt = <3000000>;
 467                                 };
 468                         };
 469
 470                         vcc3v3_s3: SWITCH_REG1 {
 471                                 regulator-always-on;
 472                                 regulator-boot-on;
 473                                 regulator-name = "vcc3v3_s3";
 474                                 regulator-state-mem {
 475                                         regulator-on-in-suspend;
 476                                 };
 477                         };
 478
 479                         vcc3v3_s0: SWITCH_REG2 {
 480                                 regulator-always-on;
 481                                 regulator-boot-on;
 482                                 regulator-name = "vcc3v3_s0";
 483                                 regulator-state-mem {
 484                                         regulator-off-in-suspend;
 485                                 };
 486                         };
 487                 };
 488         };
 489 };
 490
 491 &es8316 {
 492         reg = <0x11>;
 493 };
 494
 495 &i2c6 {
 496         status = "okay";
 497         fusb0: fusb30x@22 {
 498                 compatible = "fairchild,fusb302";
 499                 reg = <0x22>;
 500                 pinctrl-names = "default";
 501                 pinctrl-0 = <&fusb0_int>;
 502                 vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
 503                 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
 504                 status = "okay";
 505         };
 506 };
 507
 508 &pwm2 {
 509         status = "okay";
 510 };