ARM64: dts: rk3399: support fusb302 for evb1/2/3
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399-evb-rev3.dtsi
1 /*
2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42
43 #include "rk3399-evb.dtsi"
44
45 / {
46         compatible = "rockchip,rk3399-evb-rev3", "rockchip,rk3399";
47
48         vcc5v0_sys: vcc5v0-sys {
49                 compatible = "regulator-fixed";
50                 regulator-name = "vcc5v0_sys";
51                 regulator-always-on;
52                 regulator-boot-on;
53                 regulator-min-microvolt = <5000000>;
54                 regulator-max-microvolt = <5000000>;
55         };
56 };
57
58 &cluster0_opp {
59         opp@408000000 {
60                 opp-hz = /bits/ 64 <408000000>;
61                 opp-microvolt = <800000>;
62                 clock-latency-ns = <40000>;
63         };
64         opp@600000000 {
65                 opp-hz = /bits/ 64 <600000000>;
66                 opp-microvolt = <800000>;
67         };
68         opp@816000000 {
69                 opp-hz = /bits/ 64 <816000000>;
70                 opp-microvolt = <800000>;
71         };
72         opp@1008000000 {
73                 opp-hz = /bits/ 64 <1008000000>;
74                 opp-microvolt = <875000>;
75         };
76         opp@1200000000 {
77                 opp-hz = /bits/ 64 <1200000000>;
78                 opp-microvolt = <925000>;
79         };
80         opp@1416000000 {
81                 opp-hz = /bits/ 64 <1416000000>;
82                 opp-microvolt = <1050000>;
83         };
84         opp@1512000000 {
85                 opp-hz = /bits/ 64 <1512000000>;
86                 opp-microvolt = <1075000>;
87         };
88 };
89
90 &cluster1_opp {
91         opp@408000000 {
92                 opp-hz = /bits/ 64 <408000000>;
93                 opp-microvolt = <800000>;
94                 clock-latency-ns = <40000>;
95         };
96         opp@600000000 {
97                 opp-hz = /bits/ 64 <600000000>;
98                 opp-microvolt = <800000>;
99         };
100         opp@816000000 {
101                 opp-hz = /bits/ 64 <816000000>;
102                 opp-microvolt = <825000>;
103         };
104         opp@1008000000 {
105                 opp-hz = /bits/ 64 <1008000000>;
106                 opp-microvolt = <875000>;
107         };
108         opp@1200000000 {
109                 opp-hz = /bits/ 64 <1200000000>;
110                 opp-microvolt = <950000>;
111         };
112         opp@1416000000 {
113                 opp-hz = /bits/ 64 <1416000000>;
114                 opp-microvolt = <1025000>;
115         };
116         opp@1608000000 {
117                 opp-hz = /bits/ 64 <1608000000>;
118                 opp-microvolt = <1100000>;
119         };
120         opp@1800000000 {
121                 opp-hz = /bits/ 64 <1800000000>;
122                 opp-microvolt = <1175000>;
123         };
124         opp@1992000000 {
125                 opp-hz = /bits/ 64 <1992000000>;
126                 opp-microvolt = <1250000>;
127         };
128 };
129
130 &CPU_COST_A72 {
131         busy-cost-data = <
132                 210   129       /*  408MHz */
133                 308   184       /*  600MHz */
134                 419   246       /*  816MHz */
135                 518   335       /* 1008MHz */
136                 617   428       /* 1200MHz */
137                 728   573       /* 1416MHz */
138                 827   724       /* 1608MHz */
139                 925   900       /* 1800MHz */
140                 1024  1108      /* 1992MHz */
141         >;
142         idle-cost-data = <
143               15
144               15
145                0
146         >;
147 };
148
149 &CPU_COST_A53 {
150         busy-cost-data = <
151                 108    46       /*  408M */
152                 159    67       /*  600M */
153                 216    90       /*  816M */
154                 267    120      /* 1008M */
155                 318    153      /* 1200M */
156                 375    198      /* 1416M */
157                 401    222      /* 1512M */
158         >;
159         idle-cost-data = <
160               6
161               6
162               0
163         >;
164 };
165
166 &CLUSTER_COST_A72 {
167         busy-cost-data = <
168                 210   129       /*  408MHz */
169                 308   184       /*  600MHz */
170                 419   246       /*  816MHz */
171                 518   335       /* 1008MHz */
172                 617   428       /* 1200MHz */
173                 728   573       /* 1416MHz */
174                 827   724       /* 1608MHz */
175                 925   900       /* 1800MHz */
176                 1024  1108      /* 1992MHz */
177         >;
178         idle-cost-data = <
179                  65
180                  65
181                  65
182         >;
183 };
184
185 &CLUSTER_COST_A53 {
186         busy-cost-data = <
187                 108    46       /*  408M */
188                 159    67       /*  600M */
189                 216    90       /*  816M */
190                 267    120      /* 1008M */
191                 318    153      /* 1200M */
192                 375    198      /* 1416M */
193                 401    222      /* 1512M */
194         >;
195         idle-cost-data = <
196                 56
197                 56
198                 56
199         >;
200 };
201
202 &gpu_opp_table {
203         opp@200000000 {
204                 opp-hz = /bits/ 64 <200000000>;
205                 opp-microvolt = <800000>;
206         };
207         opp@300000000 {
208                 opp-hz = /bits/ 64 <300000000>;
209                 opp-microvolt = <800000>;
210         };
211         opp@400000000 {
212                 opp-hz = /bits/ 64 <400000000>;
213                 opp-microvolt = <800000>;
214         };
215         opp@500000000 {
216                 opp-hz = /bits/ 64 <500000000>;
217                 opp-microvolt = <850000>;
218         };
219         opp@600000000 {
220                 opp-hz = /bits/ 64 <600000000>;
221                 opp-microvolt = <900000>;
222         };
223         opp@800000000 {
224                 opp-hz = /bits/ 64 <800000000>;
225                 opp-microvolt = <1000000>;
226         };
227 };
228
229 &i2c0 {
230         fusb1: fusb30x@22 {
231                 compatible = "fairchild,fusb302";
232                 reg = <0x22>;
233                 pinctrl-names = "default";
234                 pinctrl-0 = <&fusb1_int>;
235                 vbus-5v-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
236                 int-n-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
237                 status = "okay";
238         };
239
240         vdd_cpu_b: syr827@40 {
241                 compatible = "silergy,syr827";
242                 reg = <0x40>;
243                 vin-supply = <&vcc5v0_sys>;
244                 regulator-compatible = "fan53555-reg";
245                 regulator-name = "vdd_cpu_b";
246                 regulator-min-microvolt = <712500>;
247                 regulator-max-microvolt = <1500000>;
248                 regulator-ramp-delay = <1000>;
249                 fcs,suspend-voltage-selector = <1>;
250                 regulator-always-on;
251                 regulator-boot-on;
252                 regulator-initial-state = <3>;
253                         regulator-state-mem {
254                         regulator-off-in-suspend;
255                 };
256         };
257
258         vdd_gpu: syr828@41 {
259                 compatible = "silergy,syr828";
260                 reg = <0x41>;
261                 vin-supply = <&vcc5v0_sys>;
262                 regulator-compatible = "fan53555-reg";
263                 regulator-name = "vdd_gpu";
264                 regulator-min-microvolt = <712500>;
265                 regulator-max-microvolt = <1500000>;
266                 regulator-ramp-delay = <1000>;
267                 fcs,suspend-voltage-selector = <1>;
268                 regulator-always-on;
269                 regulator-boot-on;
270                 regulator-initial-state = <3>;
271                         regulator-state-mem {
272                         regulator-off-in-suspend;
273                 };
274         };
275
276         rk808: pmic@1b {
277                 compatible = "rockchip,rk808";
278                 reg = <0x1b>;
279                 interrupt-parent = <&gpio1>;
280                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
281                 pinctrl-names = "default";
282                 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
283                 rockchip,system-power-controller;
284                 wakeup-source;
285                 #clock-cells = <1>;
286                 clock-output-names = "xin32k", "rk808-clkout2";
287
288                 vcc1-supply = <&vcc3v3_sys>;
289                 vcc2-supply = <&vcc3v3_sys>;
290                 vcc3-supply = <&vcc3v3_sys>;
291                 vcc4-supply = <&vcc3v3_sys>;
292                 vcc6-supply = <&vcc3v3_sys>;
293                 vcc7-supply = <&vcc3v3_sys>;
294                 vcc8-supply = <&vcc3v3_sys>;
295                 vcc9-supply = <&vcc3v3_sys>;
296                 vcc10-supply = <&vcc3v3_sys>;
297                 vcc11-supply = <&vcc3v3_sys>;
298                 vcc12-supply = <&vcc3v3_sys>;
299                 vddio-supply = <&vcc1v8_pmu>;
300
301                 regulators {
302                         vdd_log: DCDC_REG1 {
303                                 regulator-always-on;
304                                 regulator-boot-on;
305                                 regulator-min-microvolt = <750000>;
306                                 regulator-max-microvolt = <1350000>;
307                                 regulator-name = "vdd_log";
308                                 regulator-state-mem {
309                                         regulator-on-in-suspend;
310                                         regulator-suspend-microvolt = <900000>;
311                                 };
312                         };
313
314                         vdd_cpu_l: DCDC_REG2 {
315                                 regulator-always-on;
316                                 regulator-boot-on;
317                                 regulator-min-microvolt = <750000>;
318                                 regulator-max-microvolt = <1350000>;
319                                 regulator-name = "vdd_cpu_l";
320                                 regulator-state-mem {
321                                         regulator-off-in-suspend;
322                                 };
323                         };
324
325                         vcc_ddr: DCDC_REG3 {
326                                 regulator-always-on;
327                                 regulator-boot-on;
328                                 regulator-name = "vcc_ddr";
329                                 regulator-state-mem {
330                                         regulator-on-in-suspend;
331                                 };
332                         };
333
334                         vcc_1v8: DCDC_REG4 {
335                                 regulator-always-on;
336                                 regulator-boot-on;
337                                 regulator-min-microvolt = <1800000>;
338                                 regulator-max-microvolt = <1800000>;
339                                 regulator-name = "vcc_1v8";
340                                 regulator-state-mem {
341                                         regulator-on-in-suspend;
342                                         regulator-suspend-microvolt = <1800000>;
343                                 };
344                         };
345
346                         vcc1v8_dvp: LDO_REG1 {
347                                 regulator-always-on;
348                                 regulator-boot-on;
349                                 regulator-min-microvolt = <1800000>;
350                                 regulator-max-microvolt = <1800000>;
351                                 regulator-name = "vcc1v8_dvp";
352                                 regulator-state-mem {
353                                         regulator-off-in-suspend;
354                                 };
355                         };
356
357                         vcc3v0_tp: LDO_REG2 {
358                                 regulator-always-on;
359                                 regulator-boot-on;
360                                 regulator-min-microvolt = <3000000>;
361                                 regulator-max-microvolt = <3000000>;
362                                 regulator-name = "vcc3v0_tp";
363                                 regulator-state-mem {
364                                         regulator-off-in-suspend;
365                                 };
366                         };
367
368                         vcc1v8_pmu: LDO_REG3 {
369                                 regulator-always-on;
370                                 regulator-boot-on;
371                                 regulator-min-microvolt = <1800000>;
372                                 regulator-max-microvolt = <1800000>;
373                                 regulator-name = "vcc1v8_pmu";
374                                 regulator-state-mem {
375                                         regulator-on-in-suspend;
376                                         regulator-suspend-microvolt = <1800000>;
377                                 };
378                         };
379
380                         vcc_sd: LDO_REG4 {
381                                 regulator-always-on;
382                                 regulator-boot-on;
383                                 regulator-min-microvolt = <1800000>;
384                                 regulator-max-microvolt = <3300000>;
385                                 regulator-name = "vcc_sd";
386                                 regulator-state-mem {
387                                         regulator-on-in-suspend;
388                                         regulator-suspend-microvolt = <3300000>;
389                                 };
390                         };
391
392                         vcca3v0_codec: LDO_REG5 {
393                                 regulator-always-on;
394                                 regulator-boot-on;
395                                 regulator-min-microvolt = <3000000>;
396                                 regulator-max-microvolt = <3000000>;
397                                 regulator-name = "vcca3v0_codec";
398                                 regulator-state-mem {
399                                         regulator-off-in-suspend;
400                                 };
401                         };
402
403                         vcc_1v5: LDO_REG6 {
404                                 regulator-always-on;
405                                 regulator-boot-on;
406                                 regulator-min-microvolt = <1500000>;
407                                 regulator-max-microvolt = <1500000>;
408                                 regulator-name = "vcc_1v5";
409                                 regulator-state-mem {
410                                         regulator-on-in-suspend;
411                                         regulator-suspend-microvolt = <1500000>;
412                                 };
413                         };
414
415                         vcca1v8_codec: LDO_REG7 {
416                                 regulator-always-on;
417                                 regulator-boot-on;
418                                 regulator-min-microvolt = <1800000>;
419                                 regulator-max-microvolt = <1800000>;
420                                 regulator-name = "vcca1v8_codec";
421                                 regulator-state-mem {
422                                         regulator-off-in-suspend;
423                                 };
424                         };
425
426                         vcc_3v0: LDO_REG8 {
427                                 regulator-always-on;
428                                 regulator-boot-on;
429                                 regulator-min-microvolt = <3000000>;
430                                 regulator-max-microvolt = <3000000>;
431                                 regulator-name = "vcc_3v0";
432                                 regulator-state-mem {
433                                         regulator-on-in-suspend;
434                                         regulator-suspend-microvolt = <3000000>;
435                                 };
436                         };
437
438                         vcc3v3_s3: SWITCH_REG1 {
439                                 regulator-always-on;
440                                 regulator-boot-on;
441                                 regulator-name = "vcc3v3_s3";
442                                 regulator-state-mem {
443                                         regulator-off-in-suspend;
444                                 };
445                         };
446
447                         vcc3v3_s0: SWITCH_REG2 {
448                                 regulator-always-on;
449                                 regulator-boot-on;
450                                 regulator-name = "vcc3v3_s0";
451                                 regulator-state-mem {
452                                         regulator-off-in-suspend;
453                                 };
454                         };
455                 };
456         };
457 };
458
459 &es8316 {
460         reg = <0x11>;
461 };
462
463 &i2c6 {
464         status = "okay";
465         fusb0: fusb30x@22 {
466                 compatible = "fairchild,fusb302";
467                 reg = <0x22>;
468                 pinctrl-names = "default";
469                 pinctrl-0 = <&fusb0_int>;
470                 vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
471                 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
472                 status = "okay";
473         };
474 };