arch/arm64/boot/dts/rockchip/rk3399-evb-rev2.dtsi

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 #include "rk3399-evb.dtsi"
  44
  45 / {
  46         compatible = "rockchip,rk3399-evb-rev2", "rockchip,rk3399";
  47
  48         vcc5v0_sys: vcc5v0-sys {
  49                 compatible = "regulator-fixed";
  50                 regulator-name = "vcc5v0_sys";
  51                 regulator-always-on;
  52                 regulator-boot-on;
  53                 regulator-min-microvolt = <5000000>;
  54                 regulator-max-microvolt = <5000000>;
  55         };
  56
  57         vdd_center: vdd-center {
  58                 compatible = "pwm-regulator";
  59                 rockchip,pwm_id = <3>;
  60                 rockchip,pwm_voltage = <900000>;
  61                 pwms = <&pwm3 0 25000 0>;
  62                 regulator-name = "vdd_center";
  63                 regulator-min-microvolt = <800000>;
  64                 regulator-max-microvolt = <1400000>;
  65                 regulator-always-on;
  66                 regulator-boot-on;
  67         };
  68 };
  69
  70 &cpu_l0 {
  71         dynamic-power-coefficient = <121>;
  72 };
  73
  74 &cpu_b0 {
  75         dynamic-power-coefficient = <1068>;
  76 };
  77
  78 &cluster0_opp {
  79         opp@408000000 {
  80                 opp-hz = /bits/ 64 <408000000>;
  81                 opp-microvolt = <800000>;
  82                 clock-latency-ns = <40000>;
  83         };
  84         opp@600000000 {
  85                 opp-hz = /bits/ 64 <600000000>;
  86                 opp-microvolt = <800000>;
  87         };
  88         opp@816000000 {
  89                 opp-hz = /bits/ 64 <816000000>;
  90                 opp-microvolt = <800000>;
  91         };
  92         opp@1008000000 {
  93                 opp-hz = /bits/ 64 <1008000000>;
  94                 opp-microvolt = <875000>;
  95         };
  96         opp@1200000000 {
  97                 opp-hz = /bits/ 64 <1200000000>;
  98                 opp-microvolt = <925000>;
  99                 status = "disabeld";
 100         };
 101         opp@1416000000 {
 102                 opp-hz = /bits/ 64 <1416000000>;
 103                 opp-microvolt = <1050000>;
 104                 status = "disabeld";
 105         };
 106         opp@1512000000 {
 107                 opp-hz = /bits/ 64 <1512000000>;
 108                 opp-microvolt = <1075000>;
 109                 status = "disabeld";
 110         };
 111 };
 112
 113 &cluster1_opp {
 114         opp@408000000 {
 115                 opp-hz = /bits/ 64 <408000000>;
 116                 opp-microvolt = <800000>;
 117                 clock-latency-ns = <40000>;
 118         };
 119         opp@600000000 {
 120                 opp-hz = /bits/ 64 <600000000>;
 121                 opp-microvolt = <800000>;
 122         };
 123         opp@816000000 {
 124                 opp-hz = /bits/ 64 <816000000>;
 125                 opp-microvolt = <825000>;
 126         };
 127         opp@1008000000 {
 128                 opp-hz = /bits/ 64 <1008000000>;
 129                 opp-microvolt = <875000>;
 130         };
 131         opp@1200000000 {
 132                 opp-hz = /bits/ 64 <1200000000>;
 133                 opp-microvolt = <950000>;
 134                 status = "disabeld";
 135         };
 136         opp@1416000000 {
 137                 opp-hz = /bits/ 64 <1416000000>;
 138                 opp-microvolt = <1025000>;
 139                 status = "disabeld";
 140         };
 141         opp@1608000000 {
 142                 opp-hz = /bits/ 64 <1608000000>;
 143                 opp-microvolt = <1125000>;
 144                 status = "disabeld";
 145         };
 146         opp@1800000000 {
 147                 opp-hz = /bits/ 64 <1800000000>;
 148                 opp-microvolt = <1200000>;
 149                 status = "disabeld";
 150         };
 151 };
 152
 153 &CPU_COST_A72 {
 154         busy-cost-data = <
 155                 232   349       /*  408MHz */
 156                 341   547       /*  600MHz */
 157                 464   794       /*  816MHz */
 158                 573   1141      /* 1008MHz */
 159         //      683   1850      /* 1200MHz */
 160         //      805   2499      /* 1416MHz */
 161         //      915   2922      /* 1608MHz */
 162         //      1024  3416      /* 1800MHz */
 163         >;
 164         idle-cost-data = <
 165               15
 166               15
 167                0
 168         >;
 169 };
 170
 171 &CPU_COST_A53 {
 172         busy-cost-data = <
 173                 121    40       /*  408M */
 174                 179    62       /*  600M */
 175                 243    90       /*  816M */
 176                 300    126      /* 1008M */
 177         //      357    196      /* 1200M */
 178         //      421    246      /* 1416M */
 179         //      449    263      /* 1512M */
 180         >;
 181         idle-cost-data = <
 182               6
 183               6
 184               0
 185         >;
 186 };
 187
 188 &CLUSTER_COST_A72 {
 189         busy-cost-data = <
 190                 232   349       /*  408MHz */
 191                 341   547       /*  600MHz */
 192                 464   794       /*  816MHz */
 193                 573   1141      /* 1008MHz */
 194         //      683   1850      /* 1200MHz */
 195         //      805   2499      /* 1416MHz */
 196         //      915   2922      /* 1608MHz */
 197         //      1024  3416      /* 1800MHz */
 198         >;
 199         idle-cost-data = <
 200                  65
 201                  65
 202                  65
 203         >;
 204 };
 205
 206 &CLUSTER_COST_A53 {
 207         busy-cost-data = <
 208                 121    40       /*  408M */
 209                 179    62       /*  600M */
 210                 243    90       /*  816M */
 211                 300    126      /* 1008M */
 212         //      357    196      /* 1200M */
 213         //      421    246      /* 1416M */
 214         //      449    263      /* 1512M */
 215         >;
 216         idle-cost-data = <
 217                 56
 218                 56
 219                 56
 220         >;
 221 };
 222
 223 &soc_thermal {
 224         sustainable-power = <1600>; /* milliwatts */
 225
 226         cooling-maps {
 227                 map0 {
 228                         trip = <&target>;
 229                         cooling-device =
 230                                 <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 231                         contribution = <10240>;
 232                 };
 233                 map1 {
 234                         trip = <&target>;
 235                         cooling-device =
 236                                 <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 237                         contribution = <1024>;
 238                 };
 239                 map2 {
 240                         trip = <&target>;
 241                         cooling-device =
 242                                 <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 243                         contribution = <10240>;
 244                 };
 245         };
 246 };
 247
 248 &gpu_power_model {
 249         dynamic-power = <1780>;
 250 };
 251
 252 &i2c0 {
 253         fusb1: fusb30x@22 {
 254                 compatible = "fairchild,fusb302";
 255                 reg = <0x22>;
 256                 pinctrl-names = "default";
 257                 pinctrl-0 = <&fusb1_int>;
 258                 vbus-5v-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
 259                 int-n-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
 260                 status = "okay";
 261         };
 262
 263         vdd_cpu_b: syr827@40 {
 264                 compatible = "silergy,syr827";
 265                 reg = <0x40>;
 266                 vin-supply = <&vcc5v0_sys>;
 267                 regulator-compatible = "fan53555-reg";
 268                 regulator-name = "vdd_cpu_b";
 269                 regulator-min-microvolt = <712500>;
 270                 regulator-max-microvolt = <1500000>;
 271                 regulator-ramp-delay = <1000>;
 272                 fcs,suspend-voltage-selector = <1>;
 273                 regulator-always-on;
 274                 regulator-boot-on;
 275                 regulator-initial-state = <3>;
 276                         regulator-state-mem {
 277                         regulator-off-in-suspend;
 278                 };
 279         };
 280
 281         lp8752: lp8752@60 {
 282                 compatible = "ti,lp8752";
 283                 reg = <0x60>;
 284                 vin0-supply = <&vcc5v0_sys>;
 285                 regulators {
 286                         vdd_gpu: lp8752_buck0 {
 287                                 regulator-name = "vdd_gpu";
 288                                 regulator-min-microvolt = <735000>;
 289                                 regulator-max-microvolt = <1400000>;
 290                                 regulator-ramp-delay = <6000>;
 291                                 regulator-always-on;
 292                                 regulator-boot-on;
 293                         };
 294                 };
 295         };
 296
 297         rk808: pmic@1b {
 298                 compatible = "rockchip,rk808";
 299                 reg = <0x1b>;
 300                 interrupt-parent = <&gpio1>;
 301                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 302                 pinctrl-names = "default";
 303                 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
 304                 rockchip,system-power-controller;
 305                 wakeup-source;
 306                 #clock-cells = <1>;
 307                 clock-output-names = "xin32k", "rk808-clkout2";
 308
 309                 vcc1-supply = <&vcc3v3_sys>;
 310                 vcc2-supply = <&vcc3v3_sys>;
 311                 vcc3-supply = <&vcc3v3_sys>;
 312                 vcc4-supply = <&vcc3v3_sys>;
 313                 vcc6-supply = <&vcc3v3_sys>;
 314                 vcc7-supply = <&vcc3v3_sys>;
 315                 vcc8-supply = <&vcc3v3_sys>;
 316                 vcc9-supply = <&vcc3v3_sys>;
 317                 vcc10-supply = <&vcc3v3_sys>;
 318                 vcc11-supply = <&vcc3v3_sys>;
 319                 vcc12-supply = <&vcc3v3_sys>;
 320                 vddio-supply = <&vcc1v8_pmu>;
 321
 322                 regulators {
 323                         vdd_log: DCDC_REG1 {
 324                                 regulator-always-on;
 325                                 regulator-boot-on;
 326                                 regulator-min-microvolt = <750000>;
 327                                 regulator-max-microvolt = <1350000>;
 328                                 regulator-ramp-delay = <6001>;
 329                                 regulator-name = "vdd_log";
 330                                 regulator-state-mem {
 331                                         regulator-on-in-suspend;
 332                                         regulator-suspend-microvolt = <900000>;
 333                                 };
 334                         };
 335
 336                         vdd_cpu_l: DCDC_REG2 {
 337                                 regulator-always-on;
 338                                 regulator-boot-on;
 339                                 regulator-min-microvolt = <750000>;
 340                                 regulator-max-microvolt = <1350000>;
 341                                 regulator-ramp-delay = <6001>;
 342                                 regulator-name = "vdd_cpu_l";
 343                                 regulator-state-mem {
 344                                         regulator-off-in-suspend;
 345                                 };
 346                         };
 347
 348                         vcc_ddr: DCDC_REG3 {
 349                                 regulator-always-on;
 350                                 regulator-boot-on;
 351                                 regulator-name = "vcc_ddr";
 352                                 regulator-state-mem {
 353                                         regulator-on-in-suspend;
 354                                 };
 355                         };
 356
 357                         vcc_1v8: DCDC_REG4 {
 358                                 regulator-always-on;
 359                                 regulator-boot-on;
 360                                 regulator-min-microvolt = <1800000>;
 361                                 regulator-max-microvolt = <1800000>;
 362                                 regulator-name = "vcc_1v8";
 363                                 regulator-state-mem {
 364                                         regulator-on-in-suspend;
 365                                         regulator-suspend-microvolt = <1800000>;
 366                                 };
 367                         };
 368
 369                         vcc1v8_dvp: LDO_REG1 {
 370                                 regulator-always-on;
 371                                 regulator-boot-on;
 372                                 regulator-min-microvolt = <1800000>;
 373                                 regulator-max-microvolt = <1800000>;
 374                                 regulator-name = "vcc1v8_dvp";
 375                                 regulator-state-mem {
 376                                         regulator-off-in-suspend;
 377                                 };
 378                         };
 379
 380                         vcc3v0_tp: LDO_REG2 {
 381                                 regulator-always-on;
 382                                 regulator-boot-on;
 383                                 regulator-min-microvolt = <3000000>;
 384                                 regulator-max-microvolt = <3000000>;
 385                                 regulator-name = "vcc3v0_tp";
 386                                 regulator-state-mem {
 387                                         regulator-off-in-suspend;
 388                                 };
 389                         };
 390
 391                         vcc1v8_pmu: LDO_REG3 {
 392                                 regulator-always-on;
 393                                 regulator-boot-on;
 394                                 regulator-min-microvolt = <1800000>;
 395                                 regulator-max-microvolt = <1800000>;
 396                                 regulator-name = "vcc1v8_pmu";
 397                                 regulator-state-mem {
 398                                         regulator-on-in-suspend;
 399                                         regulator-suspend-microvolt = <1800000>;
 400                                 };
 401                         };
 402
 403                         vcc_sd: LDO_REG4 {
 404                                 regulator-always-on;
 405                                 regulator-boot-on;
 406                                 regulator-min-microvolt = <1800000>;
 407                                 regulator-max-microvolt = <3300000>;
 408                                 regulator-name = "vcc_sd";
 409                                 regulator-state-mem {
 410                                         regulator-on-in-suspend;
 411                                         regulator-suspend-microvolt = <3300000>;
 412                                 };
 413                         };
 414
 415                         vcca3v0_codec: LDO_REG5 {
 416                                 regulator-always-on;
 417                                 regulator-boot-on;
 418                                 regulator-min-microvolt = <3000000>;
 419                                 regulator-max-microvolt = <3000000>;
 420                                 regulator-name = "vcca3v0_codec";
 421                                 regulator-state-mem {
 422                                         regulator-off-in-suspend;
 423                                 };
 424                         };
 425
 426                         vcc_1v5: LDO_REG6 {
 427                                 regulator-always-on;
 428                                 regulator-boot-on;
 429                                 regulator-min-microvolt = <1500000>;
 430                                 regulator-max-microvolt = <1500000>;
 431                                 regulator-name = "vcc_1v5";
 432                                 regulator-state-mem {
 433                                         regulator-on-in-suspend;
 434                                         regulator-suspend-microvolt = <1500000>;
 435                                 };
 436                         };
 437
 438                         vcca1v8_codec: LDO_REG7 {
 439                                 regulator-always-on;
 440                                 regulator-boot-on;
 441                                 regulator-min-microvolt = <1800000>;
 442                                 regulator-max-microvolt = <1800000>;
 443                                 regulator-name = "vcca1v8_codec";
 444                                 regulator-state-mem {
 445                                         regulator-off-in-suspend;
 446                                 };
 447                         };
 448
 449                         vcc_3v0: LDO_REG8 {
 450                                 regulator-always-on;
 451                                 regulator-boot-on;
 452                                 regulator-min-microvolt = <3000000>;
 453                                 regulator-max-microvolt = <3000000>;
 454                                 regulator-name = "vcc_3v0";
 455                                 regulator-state-mem {
 456                                         regulator-on-in-suspend;
 457                                         regulator-suspend-microvolt = <3000000>;
 458                                 };
 459                         };
 460
 461                         vcc3v3_s3: SWITCH_REG1 {
 462                                 regulator-always-on;
 463                                 regulator-boot-on;
 464                                 regulator-name = "vcc3v3_s3";
 465                                 regulator-state-mem {
 466                                         regulator-off-in-suspend;
 467                                 };
 468                         };
 469
 470                         vcc3v3_s0: SWITCH_REG2 {
 471                                 regulator-always-on;
 472                                 regulator-boot-on;
 473                                 regulator-name = "vcc3v3_s0";
 474                                 regulator-state-mem {
 475                                         regulator-off-in-suspend;
 476                                 };
 477                         };
 478                 };
 479         };
 480 };
 481
 482 &pwm3 {
 483         status = "okay";
 484 };
 485
 486 &u2phy0_otg {
 487         rockchip,utmi-avalid;
 488 };
 489
 490 &i2c6 {
 491         status = "okay";
 492         fusb0: fusb30x@22 {
 493                 compatible = "fairchild,fusb302";
 494                 reg = <0x22>;
 495                 pinctrl-names = "default";
 496                 pinctrl-0 = <&fusb0_int>;
 497                 vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
 498                 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
 499                 status = "okay";
 500         };
 501 };