ARM64: dts: rk3399: prevent out of bounds accesses to array
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399-evb-rev2.dtsi
1 /*
2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42
43 #include "rk3399-evb.dtsi"
44
45 / {
46         compatible = "rockchip,rk3399-evb-rev2", "rockchip,rk3399";
47
48         vcc5v0_sys: vcc5v0-sys {
49                 compatible = "regulator-fixed";
50                 regulator-name = "vcc5v0_sys";
51                 regulator-always-on;
52                 regulator-boot-on;
53                 regulator-min-microvolt = <5000000>;
54                 regulator-max-microvolt = <5000000>;
55         };
56 };
57
58 &cluster0_opp {
59         opp@408000000 {
60                 opp-hz = /bits/ 64 <408000000>;
61                 opp-microvolt = <800000>;
62                 clock-latency-ns = <40000>;
63         };
64         opp@600000000 {
65                 opp-hz = /bits/ 64 <600000000>;
66                 opp-microvolt = <800000>;
67         };
68         opp@816000000 {
69                 opp-hz = /bits/ 64 <816000000>;
70                 opp-microvolt = <800000>;
71         };
72         opp@1008000000 {
73                 opp-hz = /bits/ 64 <1008000000>;
74                 opp-microvolt = <875000>;
75         };
76         opp@1200000000 {
77                 opp-hz = /bits/ 64 <1200000000>;
78                 opp-microvolt = <925000>;
79         };
80         opp@1416000000 {
81                 opp-hz = /bits/ 64 <1416000000>;
82                 opp-microvolt = <1025000>;
83         };
84         opp@1512000000 {
85                 opp-hz = /bits/ 64 <1512000000>;
86                 opp-microvolt = <1075000>;
87         };
88 };
89
90 &cluster1_opp {
91         opp@408000000 {
92                 opp-hz = /bits/ 64 <408000000>;
93                 opp-microvolt = <800000>;
94                 clock-latency-ns = <40000>;
95         };
96         opp@600000000 {
97                 opp-hz = /bits/ 64 <600000000>;
98                 opp-microvolt = <800000>;
99         };
100         opp@816000000 {
101                 opp-hz = /bits/ 64 <816000000>;
102                 opp-microvolt = <800000>;
103         };
104         opp@1008000000 {
105                 opp-hz = /bits/ 64 <1008000000>;
106                 opp-microvolt = <850000>;
107         };
108         opp@1200000000 {
109                 opp-hz = /bits/ 64 <1200000000>;
110                 opp-microvolt = <925000>;
111         };
112         opp@1416000000 {
113                 opp-hz = /bits/ 64 <1416000000>;
114                 opp-microvolt = <1025000>;
115         };
116         opp@1608000000 {
117                 opp-hz = /bits/ 64 <1608000000>;
118                 opp-microvolt = <1125000>;
119         };
120         opp@1800000000 {
121                 opp-hz = /bits/ 64 <1800000000>;
122                 opp-microvolt = <1200000>;
123                 status = "disabeld";
124         };
125 };
126
127 &CPU_COST_A72 {
128         busy-cost-data = <
129                 232   349       /*  408MHz */
130                 341   547       /*  600MHz */
131                 464   794       /*  816MHz */
132                 573   1141      /* 1008MHz */
133                 683   1850      /* 1200MHz */
134                 805   2499      /* 1416MHz */
135                 915   2922      /* 1608MHz */
136         //      1024  3416      /* 1800MHz */
137         >;
138         idle-cost-data = <
139               15
140               15
141                0
142         >;
143 };
144
145 &CPU_COST_A53 {
146         busy-cost-data = <
147                 121    40       /*  408M */
148                 179    62       /*  600M */
149                 243    90       /*  816M */
150                 300    126      /* 1008M */
151                 357    196      /* 1200M */
152                 421    246      /* 1416M */
153                 449    263      /* 1512M */
154         >;
155         idle-cost-data = <
156               6
157               6
158               0
159         >;
160 };
161
162 &CLUSTER_COST_A72 {
163         busy-cost-data = <
164                 232   349       /*  408MHz */
165                 341   547       /*  600MHz */
166                 464   794       /*  816MHz */
167                 573   1141      /* 1008MHz */
168                 683   1850      /* 1200MHz */
169                 805   2499      /* 1416MHz */
170                 915   2922      /* 1608MHz */
171         //      1024  3416      /* 1800MHz */
172         >;
173         idle-cost-data = <
174                  65
175                  65
176                  65
177         >;
178 };
179
180 &CLUSTER_COST_A53 {
181         busy-cost-data = <
182                 121    40       /*  408M */
183                 179    62       /*  600M */
184                 243    90       /*  816M */
185                 300    126      /* 1008M */
186                 357    196      /* 1200M */
187                 421    246      /* 1416M */
188                 449    263      /* 1512M */
189         >;
190         idle-cost-data = <
191                 56
192                 56
193                 56
194         >;
195 };
196
197 &i2c0 {
198         vdd_cpu_b: syr827@40 {
199                 compatible = "silergy,syr827";
200                 reg = <0x40>;
201                 vin-supply = <&vcc5v0_sys>;
202                 regulator-compatible = "fan53555-reg";
203                 regulator-name = "vdd_cpu_b";
204                 regulator-min-microvolt = <712500>;
205                 regulator-max-microvolt = <1500000>;
206                 regulator-ramp-delay = <1000>;
207                 fcs,suspend-voltage-selector = <1>;
208                 regulator-always-on;
209                 regulator-boot-on;
210                 regulator-initial-state = <3>;
211                         regulator-state-mem {
212                         regulator-off-in-suspend;
213                 };
214         };
215
216         lp8752: lp8752@60 {
217                 compatible = "ti,lp8752";
218                 reg = <0x60>;
219                 vin0-supply = <&vcc5v0_sys>;
220                 regulators {
221                         vdd_gpu: lp8752_buck0 {
222                                 regulator-name = "vdd_gpu";
223                                 regulator-min-microvolt = <735000>;
224                                 regulator-max-microvolt = <1400000>;
225                                 regulator-always-on;
226                                 regulator-boot-on;
227                         };
228                 };
229         };
230
231         rk808: pmic@1b {
232                 compatible = "rockchip,rk808";
233                 reg = <0x1b>;
234                 interrupt-parent = <&gpio1>;
235                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
236                 pinctrl-names = "default";
237                 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
238                 rockchip,system-power-controller;
239                 wakeup-source;
240                 #clock-cells = <1>;
241                 clock-output-names = "xin32k", "rk808-clkout2";
242
243                 vcc1-supply = <&vcc3v3_sys>;
244                 vcc2-supply = <&vcc3v3_sys>;
245                 vcc3-supply = <&vcc3v3_sys>;
246                 vcc4-supply = <&vcc3v3_sys>;
247                 vcc6-supply = <&vcc3v3_sys>;
248                 vcc7-supply = <&vcc3v3_sys>;
249                 vcc8-supply = <&vcc3v3_sys>;
250                 vcc9-supply = <&vcc3v3_sys>;
251                 vcc10-supply = <&vcc3v3_sys>;
252                 vcc11-supply = <&vcc3v3_sys>;
253                 vcc12-supply = <&vcc3v3_sys>;
254                 vddio-supply = <&vcc1v8_pmu>;
255
256                 regulators {
257                         vdd_log: DCDC_REG1 {
258                                 regulator-always-on;
259                                 regulator-boot-on;
260                                 regulator-min-microvolt = <750000>;
261                                 regulator-max-microvolt = <1350000>;
262                                 regulator-name = "vdd_log";
263                                 regulator-state-mem {
264                                         regulator-on-in-suspend;
265                                         regulator-suspend-microvolt = <900000>;
266                                 };
267                         };
268
269                         vdd_cpu_l: DCDC_REG2 {
270                                 regulator-always-on;
271                                 regulator-boot-on;
272                                 regulator-min-microvolt = <750000>;
273                                 regulator-max-microvolt = <1350000>;
274                                 regulator-name = "vdd_cpu_l";
275                                 regulator-state-mem {
276                                         regulator-off-in-suspend;
277                                 };
278                         };
279
280                         vcc_ddr: DCDC_REG3 {
281                                 regulator-always-on;
282                                 regulator-boot-on;
283                                 regulator-name = "vcc_ddr";
284                                 regulator-state-mem {
285                                         regulator-on-in-suspend;
286                                 };
287                         };
288
289                         vcc_1v8: DCDC_REG4 {
290                                 regulator-always-on;
291                                 regulator-boot-on;
292                                 regulator-min-microvolt = <1800000>;
293                                 regulator-max-microvolt = <1800000>;
294                                 regulator-name = "vcc_1v8";
295                                 regulator-state-mem {
296                                         regulator-on-in-suspend;
297                                         regulator-suspend-microvolt = <1800000>;
298                                 };
299                         };
300
301                         vcc1v8_dvp: LDO_REG1 {
302                                 regulator-always-on;
303                                 regulator-boot-on;
304                                 regulator-min-microvolt = <1800000>;
305                                 regulator-max-microvolt = <1800000>;
306                                 regulator-name = "vcc1v8_dvp";
307                                 regulator-state-mem {
308                                         regulator-off-in-suspend;
309                                 };
310                         };
311
312                         vcc3v0_tp: LDO_REG2 {
313                                 regulator-always-on;
314                                 regulator-boot-on;
315                                 regulator-min-microvolt = <3000000>;
316                                 regulator-max-microvolt = <3000000>;
317                                 regulator-name = "vcc3v0_tp";
318                                 regulator-state-mem {
319                                         regulator-off-in-suspend;
320                                 };
321                         };
322
323                         vcc1v8_pmu: LDO_REG3 {
324                                 regulator-always-on;
325                                 regulator-boot-on;
326                                 regulator-min-microvolt = <1800000>;
327                                 regulator-max-microvolt = <1800000>;
328                                 regulator-name = "vcc1v8_pmu";
329                                 regulator-state-mem {
330                                         regulator-on-in-suspend;
331                                         regulator-suspend-microvolt = <1800000>;
332                                 };
333                         };
334
335                         vcc_sd: LDO_REG4 {
336                                 regulator-always-on;
337                                 regulator-boot-on;
338                                 regulator-min-microvolt = <1800000>;
339                                 regulator-max-microvolt = <3300000>;
340                                 regulator-name = "vcc_sd";
341                                 regulator-state-mem {
342                                         regulator-on-in-suspend;
343                                         regulator-suspend-microvolt = <3300000>;
344                                 };
345                         };
346
347                         vcca3v0_codec: LDO_REG5 {
348                                 regulator-always-on;
349                                 regulator-boot-on;
350                                 regulator-min-microvolt = <3000000>;
351                                 regulator-max-microvolt = <3000000>;
352                                 regulator-name = "vcca3v0_codec";
353                                 regulator-state-mem {
354                                         regulator-off-in-suspend;
355                                 };
356                         };
357
358                         vcc_1v5: LDO_REG6 {
359                                 regulator-always-on;
360                                 regulator-boot-on;
361                                 regulator-min-microvolt = <1500000>;
362                                 regulator-max-microvolt = <1500000>;
363                                 regulator-name = "vcc_1v5";
364                                 regulator-state-mem {
365                                         regulator-on-in-suspend;
366                                         regulator-suspend-microvolt = <1500000>;
367                                 };
368                         };
369
370                         vcca1v8_codec: LDO_REG7 {
371                                 regulator-always-on;
372                                 regulator-boot-on;
373                                 regulator-min-microvolt = <1800000>;
374                                 regulator-max-microvolt = <1800000>;
375                                 regulator-name = "vcca1v8_codec";
376                                 regulator-state-mem {
377                                         regulator-off-in-suspend;
378                                 };
379                         };
380
381                         vcc_3v0: LDO_REG8 {
382                                 regulator-always-on;
383                                 regulator-boot-on;
384                                 regulator-min-microvolt = <3000000>;
385                                 regulator-max-microvolt = <3000000>;
386                                 regulator-name = "vcc_3v0";
387                                 regulator-state-mem {
388                                         regulator-on-in-suspend;
389                                         regulator-suspend-microvolt = <3000000>;
390                                 };
391                         };
392
393                         vcc3v3_s3: SWITCH_REG1 {
394                                 regulator-always-on;
395                                 regulator-boot-on;
396                                 regulator-name = "vcc3v3_s3";
397                                 regulator-state-mem {
398                                         regulator-off-in-suspend;
399                                 };
400                         };
401
402                         vcc3v3_s0: SWITCH_REG2 {
403                                 regulator-always-on;
404                                 regulator-boot-on;
405                                 regulator-name = "vcc3v3_s0";
406                                 regulator-state-mem {
407                                         regulator-off-in-suspend;
408                                 };
409                         };
410                 };
411         };
412 };
413
414 &cpu_l0 {
415         cpu-supply = <&vdd_cpu_l>;
416 };
417
418 &cpu_l1 {
419         cpu-supply = <&vdd_cpu_l>;
420 };
421
422 &cpu_l2 {
423         cpu-supply = <&vdd_cpu_l>;
424 };
425
426 &cpu_l3 {
427         cpu-supply = <&vdd_cpu_l>;
428 };
429
430 &cpu_b0 {
431         cpu-supply = <&vdd_cpu_b>;
432 };
433
434 &cpu_b1 {
435         cpu-supply = <&vdd_cpu_b>;
436 };
437
438 &gpu {
439         status = "okay";
440         mali-supply = <&vdd_gpu>;
441 };
442