arch/arm64/boot/dts/rockchip/rk3399-box.dtsi

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42 #include <dt-bindings/pwm/pwm.h>
  43 #include <dt-bindings/input/input.h>
  44 #include "rk3399.dtsi"
  45 #include "rk3399-android.dtsi"
  46
  47 / {
  48         compatible = "rockchip,rk3399-box","rockchip,rk3399";
  49
  50         vcc1v8_s0: vcc1v8-s0 {
  51                 compatible = "regulator-fixed";
  52                 regulator-name = "vcc1v8_s0";
  53                 regulator-min-microvolt = <1800000>;
  54                 regulator-max-microvolt = <1800000>;
  55                 regulator-always-on;
  56         };
  57
  58         vcc_sys: vcc-sys {
  59                 compatible = "regulator-fixed";
  60                 regulator-name = "vcc_sys";
  61                 regulator-min-microvolt = <5000000>;
  62                 regulator-max-microvolt = <5000000>;
  63                 regulator-always-on;
  64         };
  65
  66         vcc_phy: vcc-phy-regulator {
  67                 compatible = "regulator-fixed";
  68                 regulator-name = "vcc_phy";
  69                 regulator-always-on;
  70                 regulator-boot-on;
  71         };
  72
  73         vcc3v3_sys: vcc3v3-sys {
  74                 compatible = "regulator-fixed";
  75                 regulator-name = "vcc3v3_sys";
  76                 regulator-min-microvolt = <3300000>;
  77                 regulator-max-microvolt = <3300000>;
  78                 regulator-always-on;
  79                 vin-supply = <&vcc_sys>;
  80         };
  81
  82         vcc5v0_host: vcc5v0-host-regulator {
  83                 compatible = "regulator-fixed";
  84                 enable-active-high;
  85                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
  86                 pinctrl-names = "default";
  87                 pinctrl-0 = <&host_vbus_drv>;
  88                 regulator-name = "vcc5v0_host";
  89         };
  90
  91         vdd_log: vdd-log {
  92                 compatible = "pwm-regulator";
  93                 pwms = <&pwm2 0 25000 0>;
  94                 regulator-name = "vdd_log";
  95                 regulator-min-microvolt = <800000>;
  96                 regulator-max-microvolt = <1400000>;
  97                 regulator-always-on;
  98                 regulator-boot-on;
  99
 100                 /* for rockchip boot on */
 101                 rockchip,pwm_id= <2>;
 102                 rockchip,pwm_voltage = <900000>;
 103
 104                 vin-supply = <&vcc_sys>;
 105         };
 106
 107         clkin_gmac: external-gmac-clock {
 108                 compatible = "fixed-clock";
 109                 clock-frequency = <125000000>;
 110                 clock-output-names = "clkin_gmac";
 111                 #clock-cells = <0>;
 112         };
 113
 114         io-domains {
 115                 compatible = "rockchip,rk3399-io-voltage-domain";
 116                 rockchip,grf = <&grf>;
 117
 118                 bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
 119                 audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
 120                 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
 121                 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
 122         };
 123
 124         pmu-io-domains {
 125                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
 126                 rockchip,grf = <&pmugrf>;
 127
 128                 pmu1830-supply = <&vcc_1v8>;
 129         };
 130
 131         spdif-sound {
 132                 status = "okay";
 133                 compatible = "simple-audio-card";
 134                 simple-audio-card,name = "ROCKCHIP,SPDIF";
 135                 simple-audio-card,cpu {
 136                         sound-dai = <&spdif>;
 137                 };
 138                 simple-audio-card,codec {
 139                         sound-dai = <&spdif_out>;
 140                 };
 141         };
 142
 143         spdif_out: spdif-out {
 144                 status = "okay";
 145                 compatible = "linux,spdif-dit";
 146                 #sound-dai-cells = <0>;
 147         };
 148
 149         hdmi_sound: hdmi-sound {
 150                 status = "disabled";
 151                 compatible = "simple-audio-card";
 152                 simple-audio-card,format = "i2s";
 153                 simple-audio-card,mclk-fs = <256>;
 154                 simple-audio-card,name = "rockchip,hdmi";
 155                 simple-audio-card,cpu {
 156                         sound-dai = <&i2s2>;
 157                 };
 158                 simple-audio-card,codec {
 159                         sound-dai = <&dw_hdmi_audio>;
 160                 };
 161         };
 162
 163         dw_hdmi_audio: dw-hdmi-audio {
 164                 status = "okay";
 165                 compatible = "rockchip,dw-hdmi-audio";
 166                 #sound-dai-cells = <0>;
 167         };
 168
 169         sdio_pwrseq: sdio-pwrseq {
 170                 compatible = "mmc-pwrseq-simple";
 171                 clocks = <&rk808 1>;
 172                 clock-names = "ext_clock";
 173                 pinctrl-names = "default";
 174                 pinctrl-0 = <&wifi_enable_h>;
 175
 176                 /*
 177                  * On the module itself this is one of these (depending
 178                  * on the actual card populated):
 179                  * - SDIO_RESET_L_WL_REG_ON
 180                  * - PDN (power down when low)
 181                  */
 182                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 183         };
 184
 185         wireless-wlan {
 186                 compatible = "wlan-platdata";
 187                 rockchip,grf = <&grf>;
 188                 wifi_chip_type = "ap6354";
 189                 sdio_vref = <1800>;
 190                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>;
 191                 status = "okay";
 192         };
 193
 194         wireless-bluetooth {
 195                 compatible = "bluetooth-platdata";
 196                 clocks = <&rk808 1>;
 197                 clock-names = "ext_clock";
 198                 /* wifi-bt-power-toggle; */
 199                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
 200                 pinctrl-names = "default", "rts_gpio";
 201                 pinctrl-0 = <&uart0_rts>;
 202                 pinctrl-1 = <&uart0_gpios>;
 203                 /* BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; */
 204                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>;
 205                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>;
 206                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>;
 207                 status = "okay";
 208         };
 209
 210         test-power {
 211                 status = "okay";
 212         };
 213 };
 214
 215 &sdmmc {
 216         clock-frequency = <100000000>;
 217         clock-freq-min-max = <100000 100000000>;
 218         supports-sd;
 219         bus-width = <4>;
 220         cap-mmc-highspeed;
 221         cap-sd-highspeed;
 222         disable-wp;
 223         num-slots = <1>;
 224         sd-uhs-sdr104;
 225         vqmmc-supply = <&vcc_sd>;
 226         pinctrl-names = "default";
 227         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
 228         status = "okay";
 229 };
 230
 231 &sdio0 {
 232         clock-frequency = <100000000>;
 233         clock-freq-min-max = <200000 100000000>;
 234         supports-sdio;
 235         bus-width = <4>;
 236         disable-wp;
 237         cap-sd-highspeed;
 238         cap-sdio-irq;
 239         keep-power-in-suspend;
 240         mmc-pwrseq = <&sdio_pwrseq>;
 241         non-removable;
 242         num-slots = <1>;
 243         pinctrl-names = "default";
 244         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
 245         sd-uhs-sdr104;
 246         status = "okay";
 247 };
 248
 249 &emmc_phy {
 250         freq-sel = <200000000>;
 251         dr-sel = <50>;
 252         opdelay = <4>;
 253         status = "okay";
 254 };
 255
 256 &sdhci {
 257         bus-width = <8>;
 258         mmc-hs400-1_8v;
 259         supports-emmc;
 260         non-removable;
 261         mmc-hs400-enhanced-strobe;
 262         status = "okay";
 263 };
 264
 265 &i2s0 {
 266         status = "okay";
 267         rockchip,i2s-broken-burst-len;
 268         rockchip,playback-channels = <8>;
 269         rockchip,capture-channels = <8>;
 270         #sound-dai-cells = <0>;
 271 };
 272
 273 &i2s2 {
 274         #sound-dai-cells = <0>;
 275 };
 276
 277 &spdif {
 278         pinctrl-0 = <&spdif_bus_1>;
 279         status = "okay";
 280         #sound-dai-cells = <0>;
 281 };
 282
 283 &cluster0_opp {
 284         opp@408000000 {
 285                 opp-hz = /bits/ 64 <408000000>;
 286                 opp-microvolt = <800000>;
 287                 clock-latency-ns = <40000>;
 288         };
 289         opp@600000000 {
 290                 opp-hz = /bits/ 64 <600000000>;
 291                 opp-microvolt = <800000>;
 292         };
 293         opp@816000000 {
 294                 opp-hz = /bits/ 64 <816000000>;
 295                 opp-microvolt = <800000>;
 296         };
 297         opp@1008000000 {
 298                 opp-hz = /bits/ 64 <1008000000>;
 299                 opp-microvolt = <875000>;
 300         };
 301         opp@1200000000 {
 302                 opp-hz = /bits/ 64 <1200000000>;
 303                 opp-microvolt = <925000>;
 304         };
 305         opp@1416000000 {
 306                 opp-hz = /bits/ 64 <1416000000>;
 307                 opp-microvolt = <1050000>;
 308         };
 309         opp@1512000000 {
 310                 opp-hz = /bits/ 64 <1512000000>;
 311                 opp-microvolt = <1125000>;
 312         };
 313 };
 314
 315 &cluster1_opp {
 316         opp@408000000 {
 317                 opp-hz = /bits/ 64 <408000000>;
 318                 opp-microvolt = <800000>;
 319                 clock-latency-ns = <40000>;
 320         };
 321         opp@600000000 {
 322                 opp-hz = /bits/ 64 <600000000>;
 323                 opp-microvolt = <800000>;
 324         };
 325         opp@816000000 {
 326                 opp-hz = /bits/ 64 <816000000>;
 327                 opp-microvolt = <825000>;
 328         };
 329         opp@1008000000 {
 330                 opp-hz = /bits/ 64 <1008000000>;
 331                 opp-microvolt = <875000>;
 332         };
 333         opp@1200000000 {
 334                 opp-hz = /bits/ 64 <1200000000>;
 335                 opp-microvolt = <950000>;
 336         };
 337         opp@1416000000 {
 338                 opp-hz = /bits/ 64 <1416000000>;
 339                 opp-microvolt = <1025000>;
 340         };
 341         opp@1608000000 {
 342                 opp-hz = /bits/ 64 <1608000000>;
 343                 opp-microvolt = <1100000>;
 344         };
 345         opp@1800000000 {
 346                 opp-hz = /bits/ 64 <1800000000>;
 347                 opp-microvolt = <1175000>;
 348         };
 349         opp@1992000000 {
 350                 opp-hz = /bits/ 64 <1992000000>;
 351                 opp-microvolt = <1250000>;
 352         };
 353 };
 354
 355 &CPU_COST_A72 {
 356         busy-cost-data = <
 357                 210   129       /*  408MHz */
 358                 308   184       /*  600MHz */
 359                 419   246       /*  816MHz */
 360                 518   335       /* 1008MHz */
 361                 617   428       /* 1200MHz */
 362                 728   573       /* 1416MHz */
 363                 827   724       /* 1608MHz */
 364                 925   900       /* 1800MHz */
 365                 1024  1108      /* 1992MHz */
 366         >;
 367         idle-cost-data = <
 368               15
 369               15
 370                0
 371         >;
 372 };
 373
 374 &CPU_COST_A53 {
 375         busy-cost-data = <
 376                 108    46       /*  408M */
 377                 159    67       /*  600M */
 378                 216    90       /*  816M */
 379                 267    120      /* 1008M */
 380                 318    153      /* 1200M */
 381                 375    198      /* 1416M */
 382                 401    222      /* 1512M */
 383         >;
 384         idle-cost-data = <
 385               6
 386               6
 387               0
 388         >;
 389 };
 390
 391 &CLUSTER_COST_A72 {
 392         busy-cost-data = <
 393                 210   129       /*  408MHz */
 394                 308   184       /*  600MHz */
 395                 419   246       /*  816MHz */
 396                 518   335       /* 1008MHz */
 397                 617   428       /* 1200MHz */
 398                 728   573       /* 1416MHz */
 399                 827   724       /* 1608MHz */
 400                 925   900       /* 1800MHz */
 401                 1024  1108      /* 1992MHz */
 402         >;
 403         idle-cost-data = <
 404                  65
 405                  65
 406                  65
 407         >;
 408 };
 409
 410 &CLUSTER_COST_A53 {
 411         busy-cost-data = <
 412                 108    46       /*  408M */
 413                 159    67       /*  600M */
 414                 216    90       /*  816M */
 415                 267    120      /* 1008M */
 416                 318    153      /* 1200M */
 417                 375    198      /* 1416M */
 418                 401    222      /* 1512M */
 419         >;
 420         idle-cost-data = <
 421                 56
 422                 56
 423                 56
 424         >;
 425 };
 426
 427 &gpu_opp_table {
 428         opp@200000000 {
 429                 opp-hz = /bits/ 64 <200000000>;
 430                 opp-microvolt = <800000>;
 431         };
 432         opp@300000000 {
 433                 opp-hz = /bits/ 64 <300000000>;
 434                 opp-microvolt = <800000>;
 435         };
 436         opp@400000000 {
 437                 opp-hz = /bits/ 64 <400000000>;
 438                 opp-microvolt = <800000>;
 439         };
 440         opp@500000000 {
 441                 opp-hz = /bits/ 64 <500000000>;
 442                 opp-microvolt = <900000>;
 443         };
 444         opp@600000000 {
 445                 opp-hz = /bits/ 64 <600000000>;
 446                 opp-microvolt = <900000>;
 447         };
 448         opp@800000000 {
 449                 opp-hz = /bits/ 64 <800000000>;
 450                 opp-microvolt = <1000000>;
 451         };
 452 };
 453
 454 &i2c0 {
 455         status = "okay";
 456         i2c-scl-rising-time-ns = <168>;
 457         i2c-scl-falling-time-ns = <4>;
 458         clock-frequency = <400000>;
 459
 460         vdd_cpu_b: syr827@40 {
 461                 compatible = "silergy,syr827";
 462                 reg = <0x40>;
 463                 regulator-compatible = "fan53555-reg";
 464                 regulator-name = "vdd_cpu_b";
 465                 regulator-min-microvolt = <712500>;
 466                 regulator-max-microvolt = <1500000>;
 467                 regulator-ramp-delay = <1000>;
 468                 fcs,suspend-voltage-selector = <0>;
 469                 regulator-always-on;
 470                 regulator-boot-on;
 471                 vin-supply = <&vcc_sys>;
 472                 regulator-state-mem {
 473                         regulator-off-in-suspend;
 474                 };
 475         };
 476
 477         vdd_gpu: syr828@41 {
 478                 compatible = "silergy,syr828";
 479                 reg = <0x41>;
 480                 regulator-compatible = "fan53555-reg";
 481                 regulator-name = "vdd_gpu";
 482                 regulator-min-microvolt = <712500>;
 483                 regulator-max-microvolt = <1500000>;
 484                 regulator-ramp-delay = <1000>;
 485                 fcs,suspend-voltage-selector = <1>;
 486                 regulator-always-on;
 487                 regulator-boot-on;
 488                 vin-supply = <&vcc_sys>;
 489                 regulator-initial-mode = <1>; /* 1:force PWM 2:auto */
 490                 regulator-state-mem {
 491                         regulator-off-in-suspend;
 492                 };
 493         };
 494
 495         rk808: pmic@1b {
 496                 compatible = "rockchip,rk808";
 497                 reg = <0x1b>;
 498                 interrupt-parent = <&gpio1>;
 499                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 500                 pinctrl-names = "default";
 501                 pinctrl-0 = <&pmic_int_l>;
 502                 rockchip,system-power-controller;
 503                 wakeup-source;
 504                 #clock-cells = <1>;
 505                 clock-output-names = "xin32k", "rk808-clkout2";
 506
 507                 vcc1-supply = <&vcc_sys>;
 508                 vcc2-supply = <&vcc_sys>;
 509                 vcc3-supply = <&vcc_sys>;
 510                 vcc4-supply = <&vcc_sys>;
 511                 vcc6-supply = <&vcc_sys>;
 512                 vcc7-supply = <&vcc_sys>;
 513                 vcc8-supply = <&vcc3v3_sys>;
 514                 vcc9-supply = <&vcc_sys>;
 515                 vcc10-supply = <&vcc_sys>;
 516                 vcc11-supply = <&vcc_sys>;
 517                 vcc12-supply = <&vcc3v3_sys>;
 518                 vddio-supply = <&vcc_1v8>;
 519
 520                 regulators {
 521                         vdd_center: DCDC_REG1 {
 522                                 regulator-name = "vdd_center";
 523                                 regulator-min-microvolt = <750000>;
 524                                 regulator-max-microvolt = <1350000>;
 525                                 regulator-always-on;
 526                                 regulator-boot-on;
 527                                 regulator-state-mem {
 528                                         regulator-off-in-suspend;
 529                                 };
 530                         };
 531
 532                         vdd_cpu_l: DCDC_REG2 {
 533                                 regulator-name = "vdd_cpu_l";
 534                                 regulator-min-microvolt = <750000>;
 535                                 regulator-max-microvolt = <1350000>;
 536                                 regulator-always-on;
 537                                 regulator-boot-on;
 538                                 regulator-state-mem {
 539                                         regulator-off-in-suspend;
 540                                 };
 541                         };
 542
 543                         vcc_ddr: DCDC_REG3 {
 544                                 regulator-name = "vcc_ddr";
 545                                 regulator-always-on;
 546                                 regulator-boot-on;
 547                                 regulator-state-mem {
 548                                         regulator-on-in-suspend;
 549                                 };
 550                         };
 551
 552                         vcc_1v8: DCDC_REG4 {
 553                                 regulator-name = "vcc_1v8";
 554                                 regulator-min-microvolt = <1800000>;
 555                                 regulator-max-microvolt = <1800000>;
 556                                 regulator-always-on;
 557                                 regulator-boot-on;
 558                                 regulator-state-mem {
 559                                         regulator-on-in-suspend;
 560                                         regulator-suspend-microvolt = <1800000>;
 561                                 };
 562                         };
 563
 564                         vcc1v8_dvp: LDO_REG1 {
 565                                 regulator-name = "vcc1v8_dvp";
 566                                 regulator-min-microvolt = <1800000>;
 567                                 regulator-max-microvolt = <1800000>;
 568                                 regulator-always-on;
 569                                 regulator-boot-on;
 570                                 regulator-state-mem {
 571                                         regulator-on-in-suspend;
 572                                         regulator-suspend-microvolt = <1800000>;
 573                                 };
 574                         };
 575
 576                         vcca1v8_hdmi: LDO_REG2 {
 577                                 regulator-name = "vcca1v8_hdmi";
 578                                 regulator-min-microvolt = <1800000>;
 579                                 regulator-max-microvolt = <1800000>;
 580                                 regulator-always-on;
 581                                 regulator-boot-on;
 582                                 regulator-state-mem {
 583                                         regulator-on-in-suspend;
 584                                         regulator-suspend-microvolt = <1800000>;
 585                                 };
 586                         };
 587
 588                         vcca_1v8: LDO_REG3 {
 589                                 regulator-name = "vcca_1v8";
 590                                 regulator-min-microvolt = <1800000>;
 591                                 regulator-max-microvolt = <1800000>;
 592                                 regulator-always-on;
 593                                 regulator-boot-on;
 594                                 regulator-state-mem {
 595                                         regulator-on-in-suspend;
 596                                         regulator-suspend-microvolt = <1800000>;
 597                                 };
 598                         };
 599
 600                         vcc_sd: LDO_REG4 {
 601                                 regulator-name = "vcc_sd";
 602                                 regulator-min-microvolt = <1800000>;
 603                                 regulator-max-microvolt = <3300000>;
 604                                 regulator-always-on;
 605                                 regulator-boot-on;
 606                                 regulator-state-mem {
 607                                         regulator-on-in-suspend;
 608                                         regulator-suspend-microvolt = <3300000>;
 609                                 };
 610                         };
 611
 612                         vcc3v0_sd: LDO_REG5 {
 613                                 regulator-name = "vcc3v0_sd";
 614                                 regulator-min-microvolt = <3000000>;
 615                                 regulator-max-microvolt = <3000000>;
 616                                 regulator-always-on;
 617                                 regulator-boot-on;
 618                                 regulator-state-mem {
 619                                         regulator-on-in-suspend;
 620                                         regulator-suspend-microvolt = <3000000>;
 621                                 };
 622                         };
 623
 624                         vcc_1v5: LDO_REG6 {
 625                                 regulator-name = "vcc_1v5";
 626                                 regulator-min-microvolt = <1500000>;
 627                                 regulator-max-microvolt = <1500000>;
 628                                 regulator-always-on;
 629                                 regulator-boot-on;
 630                                 regulator-state-mem {
 631                                         regulator-on-in-suspend;
 632                                         regulator-suspend-microvolt = <1500000>;
 633                                 };
 634                         };
 635
 636                         vcca0v9_hdmi: LDO_REG7 {
 637                                 regulator-name = "vcca0v9_hdmi";
 638                                 regulator-min-microvolt = <900000>;
 639                                 regulator-max-microvolt = <900000>;
 640                                 regulator-always-on;
 641                                 regulator-boot-on;
 642                                 regulator-state-mem {
 643                                         regulator-on-in-suspend;
 644                                         regulator-suspend-microvolt = <900000>;
 645                                 };
 646                         };
 647
 648                         vcc_3v0: LDO_REG8 {
 649                                 regulator-name = "vcc_3v0";
 650                                 regulator-min-microvolt = <3000000>;
 651                                 regulator-max-microvolt = <3000000>;
 652                                 regulator-always-on;
 653                                 regulator-boot-on;
 654                                 regulator-state-mem {
 655                                         regulator-on-in-suspend;
 656                                         regulator-suspend-microvolt = <3000000>;
 657                                 };
 658                         };
 659
 660                         vcc3v3_s3: SWITCH_REG1 {
 661                                 regulator-name = "vcc3v3_s3";
 662                                 regulator-always-on;
 663                                 regulator-boot-on;
 664                                 regulator-state-mem {
 665                                         regulator-on-in-suspend;
 666                                 };
 667                         };
 668
 669                         vcc3v3_s0: SWITCH_REG2 {
 670                                 regulator-name = "vcc3v3_s0";
 671                                 regulator-always-on;
 672                                 regulator-boot-on;
 673                                 regulator-state-mem {
 674                                         regulator-on-in-suspend;
 675                                 };
 676                         };
 677                 };
 678         };
 679 };
 680
 681 &cpu_l0 {
 682         cpu-supply = <&vdd_cpu_l>;
 683 };
 684
 685 &cpu_l1 {
 686         cpu-supply = <&vdd_cpu_l>;
 687 };
 688
 689 &cpu_l2 {
 690         cpu-supply = <&vdd_cpu_l>;
 691 };
 692
 693 &cpu_l3 {
 694         cpu-supply = <&vdd_cpu_l>;
 695 };
 696
 697 &cpu_b0 {
 698         cpu-supply = <&vdd_cpu_b>;
 699 };
 700
 701 &cpu_b1 {
 702         cpu-supply = <&vdd_cpu_b>;
 703 };
 704
 705 &gpu {
 706         status = "okay";
 707         mali-supply = <&vdd_gpu>;
 708 };
 709
 710 &rga {
 711         status = "okay";
 712 };
 713
 714 &threshold {
 715         temperature = <85000>;
 716 };
 717
 718 &target {
 719         temperature = <100000>;
 720 };
 721
 722 &soc_crit {
 723         temperature = <105000>;
 724 };
 725
 726 &tcphy0 {
 727         extcon = <&fusb0>;
 728         status = "okay";
 729 };
 730
 731 &tcphy1 {
 732         status = "okay";
 733 };
 734
 735 &tsadc {
 736         /* tshut mode 0:CRU 1:GPIO */
 737         rockchip,hw-tshut-mode = <1>;
 738         /* tshut polarity 0:LOW 1:HIGH */
 739         rockchip,hw-tshut-polarity = <1>;
 740         rockchip,hw-tshut-temp = <110000>;
 741         status = "okay";
 742 };
 743
 744 &u2phy0 {
 745         status = "okay";
 746         extcon = <&fusb0>;
 747
 748         u2phy0_otg: otg-port {
 749                 status = "okay";
 750         };
 751
 752         u2phy0_host: host-port {
 753                 phy-supply = <&vcc5v0_host>;
 754                 status = "okay";
 755         };
 756 };
 757
 758 &u2phy1 {
 759         status = "okay";
 760
 761         u2phy1_otg: otg-port {
 762                 status = "okay";
 763         };
 764
 765         u2phy1_host: host-port {
 766                 phy-supply = <&vcc5v0_host>;
 767                 status = "okay";
 768         };
 769 };
 770
 771 &uart0 {
 772         pinctrl-names = "default";
 773         pinctrl-0 = <&uart0_xfer &uart0_cts>;
 774         status = "okay";
 775 };
 776
 777 &uart2 {
 778         status = "okay";
 779 };
 780
 781 &usb_host0_ehci {
 782         status = "okay";
 783 };
 784
 785 &usb_host0_ohci {
 786         status = "okay";
 787 };
 788
 789 &usb_host1_ehci {
 790         status = "okay";
 791 };
 792
 793 &usb_host1_ohci {
 794         status = "okay";
 795 };
 796
 797 &usbdrd3_0 {
 798         extcon = <&fusb0>;
 799         status = "okay";
 800 };
 801
 802 &usbdrd_dwc3_0 {
 803         dr_mode = "peripheral";
 804         status = "okay";
 805 };
 806
 807 &usbdrd3_1 {
 808         status = "okay";
 809 };
 810
 811 &usbdrd_dwc3_1 {
 812         dr_mode = "host";
 813         status = "okay";
 814 };
 815
 816 &pwm2 {
 817         status = "okay";
 818 };
 819
 820 &pwm3 {
 821         status = "okay";
 822
 823         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
 824         compatible = "rockchip,remotectl-pwm";
 825         remote_pwm_id = <3>;
 826         handle_cpu_id = <0>;
 827
 828         ir_key1 {
 829                 rockchip,usercode = <0x4040>;
 830                 rockchip,key_table =
 831                         <0xf2   KEY_REPLY>,
 832                         <0xba   KEY_BACK>,
 833                         <0xf4   KEY_UP>,
 834                         <0xf1   KEY_DOWN>,
 835                         <0xef   KEY_LEFT>,
 836                         <0xee   KEY_RIGHT>,
 837                         <0xbd   KEY_HOME>,
 838                         <0xea   KEY_VOLUMEUP>,
 839                         <0xe3   KEY_VOLUMEDOWN>,
 840                         <0xe2   KEY_SEARCH>,
 841                         <0xb2   KEY_POWER>,
 842                         <0xbc   KEY_MUTE>,
 843                         <0xec   KEY_MENU>,
 844                         <0xbf   0x190>,
 845                         <0xe0   0x191>,
 846                         <0xe1   0x192>,
 847                         <0xe9   183>,
 848                         <0xe6   248>,
 849                         <0xe8   185>,
 850                         <0xe7   186>,
 851                         <0xf0   388>,
 852                         <0xbe   0x175>;
 853         };
 854
 855         ir_key2 {
 856                 rockchip,usercode = <0xff00>;
 857                 rockchip,key_table =
 858                         <0xf9   KEY_HOME>,
 859                         <0xbf   KEY_BACK>,
 860                         <0xfb   KEY_MENU>,
 861                         <0xaa   KEY_REPLY>,
 862                         <0xb9   KEY_UP>,
 863                         <0xe9   KEY_DOWN>,
 864                         <0xb8   KEY_LEFT>,
 865                         <0xea   KEY_RIGHT>,
 866                         <0xeb   KEY_VOLUMEDOWN>,
 867                         <0xef   KEY_VOLUMEUP>,
 868                         <0xf7   KEY_MUTE>,
 869                         <0xe7   KEY_POWER>,
 870                         <0xfc   KEY_POWER>,
 871                         <0xa9   KEY_VOLUMEDOWN>,
 872                         <0xa8   KEY_VOLUMEDOWN>,
 873                         <0xe0   KEY_VOLUMEDOWN>,
 874                         <0xa5   KEY_VOLUMEDOWN>,
 875                         <0xab   183>,
 876                         <0xb7   388>,
 877                         <0xf8   184>,
 878                         <0xaf   185>,
 879                         <0xed   KEY_VOLUMEDOWN>,
 880                         <0xee   186>,
 881                         <0xb3   KEY_VOLUMEDOWN>,
 882                         <0xf1   KEY_VOLUMEDOWN>,
 883                         <0xf2   KEY_VOLUMEDOWN>,
 884                         <0xf3   KEY_SEARCH>,
 885                         <0xb4   KEY_VOLUMEDOWN>,
 886                         <0xbe   KEY_SEARCH>;
 887         };
 888
 889         ir_key3 {
 890                 rockchip,usercode = <0x1dcc>;
 891                 rockchip,key_table =
 892                         <0xee   KEY_REPLY>,
 893                         <0xf0   KEY_BACK>,
 894                         <0xf8   KEY_UP>,
 895                         <0xbb   KEY_DOWN>,
 896                         <0xef   KEY_LEFT>,
 897                         <0xed   KEY_RIGHT>,
 898                         <0xfc   KEY_HOME>,
 899                         <0xf1   KEY_VOLUMEUP>,
 900                         <0xfd   KEY_VOLUMEDOWN>,
 901                         <0xb7   KEY_SEARCH>,
 902                         <0xff   KEY_POWER>,
 903                         <0xf3   KEY_MUTE>,
 904                         <0xbf   KEY_MENU>,
 905                         <0xf9   0x191>,
 906                         <0xf5   0x192>,
 907                         <0xb3   388>,
 908                         <0xbe   KEY_1>,
 909                         <0xba   KEY_2>,
 910                         <0xb2   KEY_3>,
 911                         <0xbd   KEY_4>,
 912                         <0xf9   KEY_5>,
 913                         <0xb1   KEY_6>,
 914                         <0xfc   KEY_7>,
 915                         <0xf8   KEY_8>,
 916                         <0xb0   KEY_9>,
 917                         <0xb6   KEY_0>,
 918                         <0xb5   KEY_BACKSPACE>;
 919         };
 920 };
 921
 922 &gmac {
 923         phy-supply = <&vcc_phy>;
 924         phy-mode = "rgmii";
 925         clock_in_out = "input";
 926         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
 927         snps,reset-active-low;
 928         snps,reset-delays-us = <0 10000 50000>;
 929         assigned-clocks = <&cru SCLK_RMII_SRC>;
 930         assigned-clock-parents = <&clkin_gmac>;
 931         pinctrl-names = "default", "sleep";
 932         pinctrl-0 = <&rgmii_pins>;
 933         pinctrl-1 = <&rgmii_sleep_pins>;
 934         tx_delay = <0x28>;
 935         rx_delay = <0x11>;
 936         status = "okay";
 937 };
 938
 939 &saradc {
 940         status = "okay";
 941 };
 942
 943 &rk_screen {
 944         #include <dt-bindings/display/screen-timing/lcd-box.dtsi>
 945 };
 946
 947 &disp_timings {
 948         native-mode = <&timing1>; /* 1080p */
 949 };
 950
 951 &vopb_rk_fb {
 952         status = "okay";
 953 };
 954
 955 &fb {
 956         rockchip,disp-mode = <NO_DUAL>;
 957         rockchip,disp-policy = <DISPLAY_POLICY_BOX>;
 958 };
 959
 960 &hdmi_rk_fb {
 961         status = "okay";
 962         rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC0>;
 963 };
 964
 965 &cdn_dp_sound {
 966         status = "okay";
 967 };
 968
 969 &cdn_dp_fb {
 970         status = "okay";
 971         extcon = <&fusb0>;
 972         phys = <&tcphy0 0>;
 973 };
 974
 975 &i2s2 {
 976         status = "okay";
 977 };
 978
 979 &pinctrl {
 980         sdio-pwrseq {
 981                 wifi_enable_h: wifi-enable-h {
 982                         rockchip,pins =
 983                                 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
 984                 };
 985         };
 986
 987         wireless-bluetooth {
 988                 uart0_gpios: uart0-gpios {
 989                         rockchip,pins =
 990                                 <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
 991                 };
 992         };
 993
 994         usb2 {
 995                 host_vbus_drv: host-vbus-drv {
 996                         rockchip,pins =
 997                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
 998                 };
 999         };
1000
1001         pmic {
1002                 pmic_int_l: pmic-int-l {
1003                         rockchip,pins =
1004                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
1005                 };
1006         };
1007
1008         gmac {
1009                 rgmii_sleep_pins: rgmii-sleep-pins {
1010                         rockchip,pins =
1011                                 <3 15 RK_FUNC_GPIO &pcfg_output_low>;
1012                 };
1013         };
1014 };