2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
42 #include <dt-bindings/pwm/pwm.h>
43 #include <dt-bindings/input/input.h>
44 #include "rk3399.dtsi"
45 #include "rk3399-android.dtsi"
46 #include "rk3399-opp.dtsi"
49 compatible = "rockchip,rk3399-box","rockchip,rk3399";
51 vcc1v8_s0: vcc1v8-s0 {
52 compatible = "regulator-fixed";
53 regulator-name = "vcc1v8_s0";
54 regulator-min-microvolt = <1800000>;
55 regulator-max-microvolt = <1800000>;
60 compatible = "regulator-fixed";
61 regulator-name = "vcc_sys";
62 regulator-min-microvolt = <5000000>;
63 regulator-max-microvolt = <5000000>;
67 vcc_phy: vcc-phy-regulator {
68 compatible = "regulator-fixed";
69 regulator-name = "vcc_phy";
74 vcc3v3_sys: vcc3v3-sys {
75 compatible = "regulator-fixed";
76 regulator-name = "vcc3v3_sys";
77 regulator-min-microvolt = <3300000>;
78 regulator-max-microvolt = <3300000>;
80 vin-supply = <&vcc_sys>;
83 vcc5v0_host: vcc5v0-host-regulator {
84 compatible = "regulator-fixed";
86 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
87 pinctrl-names = "default";
88 pinctrl-0 = <&host_vbus_drv>;
89 regulator-name = "vcc5v0_host";
94 compatible = "pwm-regulator";
95 pwms = <&pwm2 0 25000 1>;
96 regulator-name = "vdd_log";
97 regulator-min-microvolt = <800000>;
98 regulator-max-microvolt = <1400000>;
102 /* for rockchip boot on */
103 rockchip,pwm_id= <2>;
104 rockchip,pwm_voltage = <900000>;
106 vin-supply = <&vcc_sys>;
109 clkin_gmac: external-gmac-clock {
110 compatible = "fixed-clock";
111 clock-frequency = <125000000>;
112 clock-output-names = "clkin_gmac";
118 compatible = "simple-audio-card";
119 simple-audio-card,name = "ROCKCHIP,SPDIF";
120 simple-audio-card,cpu {
121 sound-dai = <&spdif>;
123 simple-audio-card,codec {
124 sound-dai = <&spdif_out>;
128 spdif_out: spdif-out {
130 compatible = "linux,spdif-dit";
131 #sound-dai-cells = <0>;
134 sdio_pwrseq: sdio-pwrseq {
135 compatible = "mmc-pwrseq-simple";
137 clock-names = "ext_clock";
138 pinctrl-names = "default";
139 pinctrl-0 = <&wifi_enable_h>;
142 * On the module itself this is one of these (depending
143 * on the actual card populated):
144 * - SDIO_RESET_L_WL_REG_ON
145 * - PDN (power down when low)
147 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
151 compatible = "wlan-platdata";
152 rockchip,grf = <&grf>;
153 wifi_chip_type = "ap6354";
155 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>;
160 compatible = "bluetooth-platdata";
162 clock-names = "ext_clock";
163 /* wifi-bt-power-toggle; */
164 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
165 pinctrl-names = "default", "rts_gpio";
166 pinctrl-0 = <&uart0_rts>;
167 pinctrl-1 = <&uart0_gpios>;
168 /* BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; */
169 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>;
170 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
171 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>;
185 clock-frequency = <100000000>;
186 clock-freq-min-max = <100000 100000000>;
194 vqmmc-supply = <&vcc_sd>;
195 pinctrl-names = "default";
196 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
197 card-detect-delay = <800>;
202 clock-frequency = <100000000>;
203 clock-freq-min-max = <200000 100000000>;
209 keep-power-in-suspend;
210 mmc-pwrseq = <&sdio_pwrseq>;
213 pinctrl-names = "default";
214 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
228 mmc-hs400-enhanced-strobe;
234 rockchip,i2s-broken-burst-len;
235 rockchip,playback-channels = <8>;
236 rockchip,capture-channels = <8>;
237 #sound-dai-cells = <0>;
241 #sound-dai-cells = <0>;
245 pinctrl-0 = <&spdif_bus_1>;
247 #sound-dai-cells = <0>;
252 i2c-scl-rising-time-ns = <168>;
253 i2c-scl-falling-time-ns = <4>;
254 clock-frequency = <400000>;
256 vdd_cpu_b: syr827@40 {
257 compatible = "silergy,syr827";
259 regulator-compatible = "fan53555-reg";
260 pinctrl-0 = <&vsel1_gpio>;
261 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
262 regulator-name = "vdd_cpu_b";
263 regulator-min-microvolt = <712500>;
264 regulator-max-microvolt = <1500000>;
265 regulator-ramp-delay = <1000>;
266 fcs,suspend-voltage-selector = <1>;
269 vin-supply = <&vcc_sys>;
270 regulator-state-mem {
271 regulator-off-in-suspend;
276 compatible = "silergy,syr828";
278 regulator-compatible = "fan53555-reg";
279 pinctrl-0 = <&vsel2_gpio>;
280 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
281 regulator-name = "vdd_gpu";
282 regulator-min-microvolt = <712500>;
283 regulator-max-microvolt = <1500000>;
284 regulator-ramp-delay = <1000>;
285 fcs,suspend-voltage-selector = <1>;
288 vin-supply = <&vcc_sys>;
289 regulator-initial-mode = <1>; /* 1:force PWM 2:auto */
290 regulator-state-mem {
291 regulator-off-in-suspend;
296 compatible = "rockchip,rk808";
298 interrupt-parent = <&gpio1>;
299 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
300 pinctrl-names = "default";
301 pinctrl-0 = <&pmic_int_l>;
302 rockchip,system-power-controller;
305 clock-output-names = "xin32k", "rk808-clkout2";
307 vcc1-supply = <&vcc_sys>;
308 vcc2-supply = <&vcc_sys>;
309 vcc3-supply = <&vcc_sys>;
310 vcc4-supply = <&vcc_sys>;
311 vcc6-supply = <&vcc_sys>;
312 vcc7-supply = <&vcc_sys>;
313 vcc8-supply = <&vcc3v3_sys>;
314 vcc9-supply = <&vcc_sys>;
315 vcc10-supply = <&vcc_sys>;
316 vcc11-supply = <&vcc_sys>;
317 vcc12-supply = <&vcc3v3_sys>;
318 vddio-supply = <&vcc_1v8>;
321 vdd_center: DCDC_REG1 {
322 regulator-name = "vdd_center";
323 regulator-min-microvolt = <750000>;
324 regulator-max-microvolt = <1350000>;
325 regulator-ramp-delay = <6001>;
328 regulator-state-mem {
329 regulator-off-in-suspend;
333 vdd_cpu_l: DCDC_REG2 {
334 regulator-name = "vdd_cpu_l";
335 regulator-min-microvolt = <750000>;
336 regulator-max-microvolt = <1350000>;
337 regulator-ramp-delay = <6001>;
340 regulator-state-mem {
341 regulator-off-in-suspend;
346 regulator-name = "vcc_ddr";
349 regulator-state-mem {
350 regulator-on-in-suspend;
355 regulator-name = "vcc_1v8";
356 regulator-min-microvolt = <1800000>;
357 regulator-max-microvolt = <1800000>;
360 regulator-state-mem {
361 regulator-on-in-suspend;
362 regulator-suspend-microvolt = <1800000>;
366 vcc1v8_dvp: LDO_REG1 {
367 regulator-name = "vcc1v8_dvp";
368 regulator-min-microvolt = <1800000>;
369 regulator-max-microvolt = <1800000>;
372 regulator-state-mem {
373 regulator-on-in-suspend;
374 regulator-suspend-microvolt = <1800000>;
378 vcca1v8_hdmi: LDO_REG2 {
379 regulator-name = "vcca1v8_hdmi";
380 regulator-min-microvolt = <1800000>;
381 regulator-max-microvolt = <1800000>;
384 regulator-state-mem {
385 regulator-on-in-suspend;
386 regulator-suspend-microvolt = <1800000>;
391 regulator-name = "vcca_1v8";
392 regulator-min-microvolt = <1800000>;
393 regulator-max-microvolt = <1800000>;
396 regulator-state-mem {
397 regulator-on-in-suspend;
398 regulator-suspend-microvolt = <1800000>;
403 regulator-name = "vcc_sd";
404 regulator-min-microvolt = <1800000>;
405 regulator-max-microvolt = <3300000>;
408 regulator-state-mem {
409 regulator-on-in-suspend;
410 regulator-suspend-microvolt = <3300000>;
414 vcc3v0_sd: LDO_REG5 {
415 regulator-name = "vcc3v0_sd";
416 regulator-min-microvolt = <3000000>;
417 regulator-max-microvolt = <3000000>;
420 regulator-state-mem {
421 regulator-on-in-suspend;
422 regulator-suspend-microvolt = <3000000>;
427 regulator-name = "vcc_1v5";
428 regulator-min-microvolt = <1500000>;
429 regulator-max-microvolt = <1500000>;
432 regulator-state-mem {
433 regulator-on-in-suspend;
434 regulator-suspend-microvolt = <1500000>;
438 vcca0v9_hdmi: LDO_REG7 {
439 regulator-name = "vcca0v9_hdmi";
440 regulator-min-microvolt = <900000>;
441 regulator-max-microvolt = <900000>;
444 regulator-state-mem {
445 regulator-on-in-suspend;
446 regulator-suspend-microvolt = <900000>;
451 regulator-name = "vcc_3v0";
452 regulator-min-microvolt = <3000000>;
453 regulator-max-microvolt = <3000000>;
456 regulator-state-mem {
457 regulator-on-in-suspend;
458 regulator-suspend-microvolt = <3000000>;
462 vcc3v3_s3: SWITCH_REG1 {
463 regulator-name = "vcc3v3_s3";
466 regulator-state-mem {
467 regulator-on-in-suspend;
471 vcc3v3_s0: SWITCH_REG2 {
472 regulator-name = "vcc3v3_s0";
475 regulator-state-mem {
476 regulator-on-in-suspend;
484 cpu-supply = <&vdd_cpu_l>;
488 cpu-supply = <&vdd_cpu_l>;
492 cpu-supply = <&vdd_cpu_l>;
496 cpu-supply = <&vdd_cpu_l>;
500 cpu-supply = <&vdd_cpu_b>;
504 cpu-supply = <&vdd_cpu_b>;
509 mali-supply = <&vdd_gpu>;
513 temperature = <85000>;
517 temperature = <100000>;
521 temperature = <105000>;
534 /* tshut mode 0:CRU 1:GPIO */
535 rockchip,hw-tshut-mode = <1>;
536 /* tshut polarity 0:LOW 1:HIGH */
537 rockchip,hw-tshut-polarity = <1>;
538 rockchip,hw-tshut-temp = <110000>;
546 u2phy0_otg: otg-port {
550 u2phy0_host: host-port {
551 phy-supply = <&vcc5v0_host>;
559 u2phy1_otg: otg-port {
563 u2phy1_host: host-port {
564 phy-supply = <&vcc5v0_host>;
570 pinctrl-names = "default";
571 pinctrl-0 = <&uart0_xfer &uart0_cts>;
621 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
622 compatible = "rockchip,remotectl-pwm";
627 rockchip,usercode = <0x4040>;
637 <0xe3 KEY_VOLUMEDOWN>,
654 rockchip,usercode = <0xff00>;
664 <0xeb KEY_VOLUMEDOWN>,
669 <0xa9 KEY_VOLUMEDOWN>,
670 <0xa8 KEY_VOLUMEDOWN>,
671 <0xe0 KEY_VOLUMEDOWN>,
672 <0xa5 KEY_VOLUMEDOWN>,
678 <0xed KEY_VOLUMEDOWN>,
680 <0xb3 KEY_VOLUMEDOWN>,
681 <0xf1 KEY_VOLUMEDOWN>,
682 <0xf2 KEY_VOLUMEDOWN>,
684 <0xb4 KEY_VOLUMEDOWN>,
689 rockchip,usercode = <0x1dcc>;
699 <0xfd KEY_VOLUMEDOWN>,
717 <0xb5 KEY_BACKSPACE>;
722 phy-supply = <&vcc_phy>;
724 clock_in_out = "input";
725 snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
726 snps,reset-active-low;
727 snps,reset-delays-us = <0 10000 50000>;
728 assigned-clocks = <&cru SCLK_RMII_SRC>;
729 assigned-clock-parents = <&clkin_gmac>;
730 pinctrl-names = "default", "sleep";
731 pinctrl-0 = <&rgmii_pins>;
732 pinctrl-1 = <&rgmii_sleep_pins>;
749 bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
750 audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
751 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
752 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
757 wifi_enable_h: wifi-enable-h {
759 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
764 uart0_gpios: uart0-gpios {
766 <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
771 host_vbus_drv: host-vbus-drv {
773 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
778 pmic_int_l: pmic-int-l {
780 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
783 vsel1_gpio: vsel1-gpio {
785 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
788 vsel2_gpio: vsel2-gpio {
790 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
795 rgmii_sleep_pins: rgmii-sleep-pins {
797 <3 15 RK_FUNC_GPIO &pcfg_output_low>;
812 pmu1830-supply = <&vcc_1v8>;
817 rockchip,sleep-debug-en = <0>;
818 rockchip,sleep-mode-config = <
828 rockchip,wakeup-config = <
834 rockchip,pwm-regulator-config = <
839 rockchip,power-ctrl =
840 <&gpio1 17 GPIO_ACTIVE_HIGH>,
841 <&gpio1 14 GPIO_ACTIVE_HIGH>;
845 assigned-clocks = <&cru DCLK_VOP0_DIV>;
846 assigned-clock-parents = <&cru PLL_VPLL>;
850 assigned-clocks = <&cru DCLK_VOP1_DIV>;
851 assigned-clock-parents = <&cru PLL_CPLL>;