1bae51807796194e4e67d2feb2a00ffbebc1f747
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399-box.dtsi
1 /*
2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42 #include <dt-bindings/pwm/pwm.h>
43 #include <dt-bindings/input/input.h>
44 #include "rk3399.dtsi"
45 #include "rk3399-android.dtsi"
46
47 / {
48         compatible = "rockchip,rk3399-box","rockchip,rk3399";
49
50         vcc1v8_s0: vcc1v8-s0 {
51                 compatible = "regulator-fixed";
52                 regulator-name = "vcc1v8_s0";
53                 regulator-min-microvolt = <1800000>;
54                 regulator-max-microvolt = <1800000>;
55                 regulator-always-on;
56         };
57
58         vcc_sys: vcc-sys {
59                 compatible = "regulator-fixed";
60                 regulator-name = "vcc_sys";
61                 regulator-min-microvolt = <5000000>;
62                 regulator-max-microvolt = <5000000>;
63                 regulator-always-on;
64         };
65
66         vcc_phy: vcc-phy-regulator {
67                 compatible = "regulator-fixed";
68                 regulator-name = "vcc_phy";
69                 regulator-always-on;
70                 regulator-boot-on;
71         };
72
73         vcc3v3_sys: vcc3v3-sys {
74                 compatible = "regulator-fixed";
75                 regulator-name = "vcc3v3_sys";
76                 regulator-min-microvolt = <3300000>;
77                 regulator-max-microvolt = <3300000>;
78                 regulator-always-on;
79                 vin-supply = <&vcc_sys>;
80         };
81
82         vcc5v0_host: vcc5v0-host-regulator {
83                 compatible = "regulator-fixed";
84                 enable-active-high;
85                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
86                 pinctrl-names = "default";
87                 pinctrl-0 = <&host_vbus_drv>;
88                 regulator-name = "vcc5v0_host";
89         };
90
91         vdd_log: vdd-log {
92                 compatible = "pwm-regulator";
93                 pwms = <&pwm2 0 25000 0>;
94                 regulator-name = "vdd_log";
95                 regulator-min-microvolt = <800000>;
96                 regulator-max-microvolt = <1400000>;
97                 regulator-always-on;
98                 regulator-boot-on;
99
100                 /* for rockchip boot on */
101                 rockchip,pwm_id= <2>;
102                 rockchip,pwm_voltage = <900000>;
103
104                 vin-supply = <&vcc_sys>;
105         };
106
107         clkin_gmac: external-gmac-clock {
108                 compatible = "fixed-clock";
109                 clock-frequency = <125000000>;
110                 clock-output-names = "clkin_gmac";
111                 #clock-cells = <0>;
112         };
113
114         io-domains {
115                 compatible = "rockchip,rk3399-io-voltage-domain";
116                 rockchip,grf = <&grf>;
117
118                 bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
119                 audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
120                 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
121                 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
122         };
123
124         pmu-io-domains {
125                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
126                 rockchip,grf = <&pmugrf>;
127
128                 pmu1830-supply = <&vcc_1v8>;
129         };
130
131         spdif-sound {
132                 status = "okay";
133                 compatible = "simple-audio-card";
134                 simple-audio-card,name = "ROCKCHIP,SPDIF";
135                 simple-audio-card,cpu {
136                         sound-dai = <&spdif>;
137                 };
138                 simple-audio-card,codec {
139                         sound-dai = <&spdif_out>;
140                 };
141         };
142
143         spdif_out: spdif-out {
144                 status = "okay";
145                 compatible = "linux,spdif-dit";
146                 #sound-dai-cells = <0>;
147         };
148
149         hdmi_sound: hdmi-sound {
150                 status = "okay";
151                 compatible = "simple-audio-card";
152                 simple-audio-card,format = "i2s";
153                 simple-audio-card,mclk-fs = <256>;
154                 simple-audio-card,name = "rockchip,hdmi";
155                 simple-audio-card,cpu {
156                         sound-dai = <&i2s2>;
157                 };
158                 simple-audio-card,codec {
159                         sound-dai = <&dw_hdmi_audio>;
160                 };
161         };
162
163         dw_hdmi_audio: dw-hdmi-audio {
164                 status = "okay";
165                 compatible = "rockchip,dw-hdmi-audio";
166                 #sound-dai-cells = <0>;
167         };
168
169         sdio_pwrseq: sdio-pwrseq {
170                 compatible = "mmc-pwrseq-simple";
171                 clocks = <&rk808 1>;
172                 clock-names = "ext_clock";
173                 pinctrl-names = "default";
174                 pinctrl-0 = <&wifi_enable_h>;
175
176                 /*
177                  * On the module itself this is one of these (depending
178                  * on the actual card populated):
179                  * - SDIO_RESET_L_WL_REG_ON
180                  * - PDN (power down when low)
181                  */
182                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
183         };
184
185         wireless-wlan {
186                 compatible = "wlan-platdata";
187                 rockchip,grf = <&grf>;
188                 wifi_chip_type = "ap6354";
189                 sdio_vref = <1800>;
190                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>;
191                 status = "okay";
192         };
193
194         wireless-bluetooth {
195                 compatible = "bluetooth-platdata";
196                 clocks = <&rk808 1>;
197                 clock-names = "ext_clock";
198                 /* wifi-bt-power-toggle; */
199                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
200                 pinctrl-names = "default", "rts_gpio";
201                 pinctrl-0 = <&uart0_rts>;
202                 pinctrl-1 = <&uart0_gpios>;
203                 /* BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; */
204                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>;
205                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>;
206                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>;
207                 status = "okay";
208         };
209 };
210
211 &sdmmc {
212         clock-frequency = <100000000>;
213         clock-freq-min-max = <100000 100000000>;
214         supports-sd;
215         bus-width = <4>;
216         cap-mmc-highspeed;
217         cap-sd-highspeed;
218         disable-wp;
219         num-slots = <1>;
220         sd-uhs-sdr104;
221         vqmmc-supply = <&vcc_sd>;
222         pinctrl-names = "default";
223         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
224         status = "okay";
225 };
226
227 &sdio0 {
228         clock-frequency = <100000000>;
229         clock-freq-min-max = <200000 100000000>;
230         supports-sdio;
231         bus-width = <4>;
232         disable-wp;
233         cap-sd-highspeed;
234         cap-sdio-irq;
235         keep-power-in-suspend;
236         mmc-pwrseq = <&sdio_pwrseq>;
237         non-removable;
238         num-slots = <1>;
239         pinctrl-names = "default";
240         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
241         sd-uhs-sdr104;
242         status = "okay";
243 };
244
245 &emmc_phy {
246         freq-sel = <200000000>;
247         dr-sel = <50>;
248         opdelay = <4>;
249         status = "okay";
250 };
251
252 &sdhci {
253         bus-width = <8>;
254         mmc-hs400-1_8v;
255         supports-emmc;
256         non-removable;
257         mmc-hs400-enhanced-strobe;
258         status = "okay";
259 };
260
261 &i2s0 {
262         status = "okay";
263         rockchip,i2s-broken-burst-len;
264         rockchip,playback-channels = <8>;
265         rockchip,capture-channels = <8>;
266         #sound-dai-cells = <0>;
267 };
268
269 &i2s2 {
270         #sound-dai-cells = <0>;
271 };
272
273 &spdif {
274         pinctrl-0 = <&spdif_bus_1>;
275         status = "okay";
276         #sound-dai-cells = <0>;
277 };
278
279 &cluster0_opp {
280         opp@408000000 {
281                 opp-hz = /bits/ 64 <408000000>;
282                 opp-microvolt = <800000>;
283                 clock-latency-ns = <40000>;
284         };
285         opp@600000000 {
286                 opp-hz = /bits/ 64 <600000000>;
287                 opp-microvolt = <800000>;
288         };
289         opp@816000000 {
290                 opp-hz = /bits/ 64 <816000000>;
291                 opp-microvolt = <800000>;
292         };
293         opp@1008000000 {
294                 opp-hz = /bits/ 64 <1008000000>;
295                 opp-microvolt = <875000>;
296         };
297         opp@1200000000 {
298                 opp-hz = /bits/ 64 <1200000000>;
299                 opp-microvolt = <925000>;
300         };
301         opp@1416000000 {
302                 opp-hz = /bits/ 64 <1416000000>;
303                 opp-microvolt = <1050000>;
304         };
305         opp@1512000000 {
306                 opp-hz = /bits/ 64 <1512000000>;
307                 opp-microvolt = <1075000>;
308         };
309 };
310
311 &cluster1_opp {
312         opp@408000000 {
313                 opp-hz = /bits/ 64 <408000000>;
314                 opp-microvolt = <800000>;
315                 clock-latency-ns = <40000>;
316         };
317         opp@600000000 {
318                 opp-hz = /bits/ 64 <600000000>;
319                 opp-microvolt = <800000>;
320         };
321         opp@816000000 {
322                 opp-hz = /bits/ 64 <816000000>;
323                 opp-microvolt = <825000>;
324         };
325         opp@1008000000 {
326                 opp-hz = /bits/ 64 <1008000000>;
327                 opp-microvolt = <875000>;
328         };
329         opp@1200000000 {
330                 opp-hz = /bits/ 64 <1200000000>;
331                 opp-microvolt = <950000>;
332         };
333         opp@1416000000 {
334                 opp-hz = /bits/ 64 <1416000000>;
335                 opp-microvolt = <1025000>;
336         };
337         opp@1608000000 {
338                 opp-hz = /bits/ 64 <1608000000>;
339                 opp-microvolt = <1100000>;
340         };
341         opp@1800000000 {
342                 opp-hz = /bits/ 64 <1800000000>;
343                 opp-microvolt = <1175000>;
344         };
345         opp@1992000000 {
346                 opp-hz = /bits/ 64 <1992000000>;
347                 opp-microvolt = <1250000>;
348         };
349 };
350
351 &CPU_COST_A72 {
352         busy-cost-data = <
353                 210   129       /*  408MHz */
354                 308   184       /*  600MHz */
355                 419   246       /*  816MHz */
356                 518   335       /* 1008MHz */
357                 617   428       /* 1200MHz */
358                 728   573       /* 1416MHz */
359                 827   724       /* 1608MHz */
360                 925   900       /* 1800MHz */
361                 1024  1108      /* 1992MHz */
362         >;
363         idle-cost-data = <
364               15
365               15
366                0
367         >;
368 };
369
370 &CPU_COST_A53 {
371         busy-cost-data = <
372                 108    46       /*  408M */
373                 159    67       /*  600M */
374                 216    90       /*  816M */
375                 267    120      /* 1008M */
376                 318    153      /* 1200M */
377                 375    198      /* 1416M */
378                 401    222      /* 1512M */
379         >;
380         idle-cost-data = <
381               6
382               6
383               0
384         >;
385 };
386
387 &CLUSTER_COST_A72 {
388         busy-cost-data = <
389                 210   129       /*  408MHz */
390                 308   184       /*  600MHz */
391                 419   246       /*  816MHz */
392                 518   335       /* 1008MHz */
393                 617   428       /* 1200MHz */
394                 728   573       /* 1416MHz */
395                 827   724       /* 1608MHz */
396                 925   900       /* 1800MHz */
397                 1024  1108      /* 1992MHz */
398         >;
399         idle-cost-data = <
400                  65
401                  65
402                  65
403         >;
404 };
405
406 &CLUSTER_COST_A53 {
407         busy-cost-data = <
408                 108    46       /*  408M */
409                 159    67       /*  600M */
410                 216    90       /*  816M */
411                 267    120      /* 1008M */
412                 318    153      /* 1200M */
413                 375    198      /* 1416M */
414                 401    222      /* 1512M */
415         >;
416         idle-cost-data = <
417                 56
418                 56
419                 56
420         >;
421 };
422
423 &gpu_opp_table {
424         opp@200000000 {
425                 opp-hz = /bits/ 64 <200000000>;
426                 opp-microvolt = <800000>;
427         };
428         opp@300000000 {
429                 opp-hz = /bits/ 64 <300000000>;
430                 opp-microvolt = <800000>;
431         };
432         opp@400000000 {
433                 opp-hz = /bits/ 64 <400000000>;
434                 opp-microvolt = <800000>;
435         };
436         opp@500000000 {
437                 opp-hz = /bits/ 64 <500000000>;
438                 opp-microvolt = <900000>;
439         };
440         opp@600000000 {
441                 opp-hz = /bits/ 64 <600000000>;
442                 opp-microvolt = <900000>;
443         };
444         opp@800000000 {
445                 opp-hz = /bits/ 64 <800000000>;
446                 opp-microvolt = <1000000>;
447         };
448 };
449
450 &i2c0 {
451         status = "okay";
452         i2c-scl-rising-time-ns = <168>;
453         i2c-scl-falling-time-ns = <4>;
454         clock-frequency = <400000>;
455
456         vdd_cpu_b: syr827@40 {
457                 compatible = "silergy,syr827";
458                 reg = <0x40>;
459                 regulator-compatible = "fan53555-reg";
460                 regulator-name = "vdd_cpu_b";
461                 regulator-min-microvolt = <712500>;
462                 regulator-max-microvolt = <1500000>;
463                 regulator-ramp-delay = <1000>;
464                 fcs,suspend-voltage-selector = <0>;
465                 regulator-always-on;
466                 regulator-boot-on;
467                 vin-supply = <&vcc_sys>;
468                 regulator-state-mem {
469                         regulator-off-in-suspend;
470                 };
471         };
472
473         vdd_gpu: syr828@41 {
474                 compatible = "silergy,syr828";
475                 reg = <0x41>;
476                 regulator-compatible = "fan53555-reg";
477                 regulator-name = "vdd_gpu";
478                 regulator-min-microvolt = <712500>;
479                 regulator-max-microvolt = <1500000>;
480                 regulator-ramp-delay = <1000>;
481                 fcs,suspend-voltage-selector = <1>;
482                 regulator-always-on;
483                 regulator-boot-on;
484                 vin-supply = <&vcc_sys>;
485                 regulator-state-mem {
486                         regulator-off-in-suspend;
487                 };
488         };
489
490         rk808: pmic@1b {
491                 compatible = "rockchip,rk808";
492                 reg = <0x1b>;
493                 interrupt-parent = <&gpio1>;
494                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
495                 pinctrl-names = "default";
496                 pinctrl-0 = <&pmic_int_l>;
497                 rockchip,system-power-controller;
498                 wakeup-source;
499                 #clock-cells = <1>;
500                 clock-output-names = "xin32k", "rk808-clkout2";
501
502                 vcc1-supply = <&vcc_sys>;
503                 vcc2-supply = <&vcc_sys>;
504                 vcc3-supply = <&vcc_sys>;
505                 vcc4-supply = <&vcc_sys>;
506                 vcc6-supply = <&vcc_sys>;
507                 vcc7-supply = <&vcc_sys>;
508                 vcc8-supply = <&vcc3v3_sys>;
509                 vcc9-supply = <&vcc_sys>;
510                 vcc10-supply = <&vcc_sys>;
511                 vcc11-supply = <&vcc_sys>;
512                 vcc12-supply = <&vcc3v3_sys>;
513                 vddio-supply = <&vcc_1v8>;
514
515                 regulators {
516                         vdd_center: DCDC_REG1 {
517                                 regulator-name = "vdd_center";
518                                 regulator-min-microvolt = <750000>;
519                                 regulator-max-microvolt = <1350000>;
520                                 regulator-always-on;
521                                 regulator-boot-on;
522                                 regulator-state-mem {
523                                         regulator-off-in-suspend;
524                                 };
525                         };
526
527                         vdd_cpu_l: DCDC_REG2 {
528                                 regulator-name = "vdd_cpu_l";
529                                 regulator-min-microvolt = <750000>;
530                                 regulator-max-microvolt = <1350000>;
531                                 regulator-always-on;
532                                 regulator-boot-on;
533                                 regulator-state-mem {
534                                         regulator-off-in-suspend;
535                                 };
536                         };
537
538                         vcc_ddr: DCDC_REG3 {
539                                 regulator-name = "vcc_ddr";
540                                 regulator-always-on;
541                                 regulator-boot-on;
542                                 regulator-state-mem {
543                                         regulator-on-in-suspend;
544                                 };
545                         };
546
547                         vcc_1v8: DCDC_REG4 {
548                                 regulator-name = "vcc_1v8";
549                                 regulator-min-microvolt = <1800000>;
550                                 regulator-max-microvolt = <1800000>;
551                                 regulator-always-on;
552                                 regulator-boot-on;
553                                 regulator-state-mem {
554                                         regulator-on-in-suspend;
555                                         regulator-suspend-microvolt = <1800000>;
556                                 };
557                         };
558
559                         vcc1v8_dvp: LDO_REG1 {
560                                 regulator-name = "vcc1v8_dvp";
561                                 regulator-min-microvolt = <1800000>;
562                                 regulator-max-microvolt = <1800000>;
563                                 regulator-always-on;
564                                 regulator-boot-on;
565                                 regulator-state-mem {
566                                         regulator-on-in-suspend;
567                                         regulator-suspend-microvolt = <1800000>;
568                                 };
569                         };
570
571                         vcca1v8_hdmi: LDO_REG2 {
572                                 regulator-name = "vcca1v8_hdmi";
573                                 regulator-min-microvolt = <1800000>;
574                                 regulator-max-microvolt = <1800000>;
575                                 regulator-always-on;
576                                 regulator-boot-on;
577                                 regulator-state-mem {
578                                         regulator-on-in-suspend;
579                                         regulator-suspend-microvolt = <1800000>;
580                                 };
581                         };
582
583                         vcca_1v8: LDO_REG3 {
584                                 regulator-name = "vcca_1v8";
585                                 regulator-min-microvolt = <1800000>;
586                                 regulator-max-microvolt = <1800000>;
587                                 regulator-always-on;
588                                 regulator-boot-on;
589                                 regulator-state-mem {
590                                         regulator-on-in-suspend;
591                                         regulator-suspend-microvolt = <1800000>;
592                                 };
593                         };
594
595                         vcc_sd: LDO_REG4 {
596                                 regulator-name = "vcc_sd";
597                                 regulator-min-microvolt = <1800000>;
598                                 regulator-max-microvolt = <3300000>;
599                                 regulator-always-on;
600                                 regulator-boot-on;
601                                 regulator-state-mem {
602                                         regulator-on-in-suspend;
603                                         regulator-suspend-microvolt = <3300000>;
604                                 };
605                         };
606
607                         vcc3v0_sd: LDO_REG5 {
608                                 regulator-name = "vcc3v0_sd";
609                                 regulator-min-microvolt = <3000000>;
610                                 regulator-max-microvolt = <3000000>;
611                                 regulator-always-on;
612                                 regulator-boot-on;
613                                 regulator-state-mem {
614                                         regulator-on-in-suspend;
615                                         regulator-suspend-microvolt = <3000000>;
616                                 };
617                         };
618
619                         vcc_1v5: LDO_REG6 {
620                                 regulator-name = "vcc_1v5";
621                                 regulator-min-microvolt = <1500000>;
622                                 regulator-max-microvolt = <1500000>;
623                                 regulator-always-on;
624                                 regulator-boot-on;
625                                 regulator-state-mem {
626                                         regulator-on-in-suspend;
627                                         regulator-suspend-microvolt = <1500000>;
628                                 };
629                         };
630
631                         vcca0v9_hdmi: LDO_REG7 {
632                                 regulator-name = "vcca0v9_hdmi";
633                                 regulator-min-microvolt = <900000>;
634                                 regulator-max-microvolt = <900000>;
635                                 regulator-always-on;
636                                 regulator-boot-on;
637                                 regulator-state-mem {
638                                         regulator-on-in-suspend;
639                                         regulator-suspend-microvolt = <900000>;
640                                 };
641                         };
642
643                         vcc_3v0: LDO_REG8 {
644                                 regulator-name = "vcc_3v0";
645                                 regulator-min-microvolt = <3000000>;
646                                 regulator-max-microvolt = <3000000>;
647                                 regulator-always-on;
648                                 regulator-boot-on;
649                                 regulator-state-mem {
650                                         regulator-on-in-suspend;
651                                         regulator-suspend-microvolt = <3000000>;
652                                 };
653                         };
654
655                         vcc3v3_s3: SWITCH_REG1 {
656                                 regulator-name = "vcc3v3_s3";
657                                 regulator-always-on;
658                                 regulator-boot-on;
659                                 regulator-state-mem {
660                                         regulator-on-in-suspend;
661                                 };
662                         };
663
664                         vcc3v3_s0: SWITCH_REG2 {
665                                 regulator-name = "vcc3v3_s0";
666                                 regulator-always-on;
667                                 regulator-boot-on;
668                                 regulator-state-mem {
669                                         regulator-on-in-suspend;
670                                 };
671                         };
672                 };
673         };
674 };
675
676 &cpu_l0 {
677         cpu-supply = <&vdd_cpu_l>;
678 };
679
680 &cpu_l1 {
681         cpu-supply = <&vdd_cpu_l>;
682 };
683
684 &cpu_l2 {
685         cpu-supply = <&vdd_cpu_l>;
686 };
687
688 &cpu_l3 {
689         cpu-supply = <&vdd_cpu_l>;
690 };
691
692 &cpu_b0 {
693         cpu-supply = <&vdd_cpu_b>;
694 };
695
696 &cpu_b1 {
697         cpu-supply = <&vdd_cpu_b>;
698 };
699
700 &gpu {
701         status = "okay";
702         mali-supply = <&vdd_gpu>;
703 };
704
705 &rga {
706         status = "okay";
707 };
708
709 &threshold {
710         temperature = <85000>;
711 };
712
713 &target {
714         temperature = <100000>;
715 };
716
717 &soc_crit {
718         temperature = <105000>;
719 };
720
721 &tcphy0 {
722         extcon = <&fusb0>;
723         status = "okay";
724 };
725
726 &tsadc {
727         /* tshut mode 0:CRU 1:GPIO */
728         rockchip,hw-tshut-mode = <1>;
729         /* tshut polarity 0:LOW 1:HIGH */
730         rockchip,hw-tshut-polarity = <1>;
731         rockchip,hw-tshut-temp = <110000>;
732         status = "okay";
733 };
734
735 &u2phy0 {
736         status = "okay";
737         extcon = <&fusb0>;
738
739         u2phy0_otg: otg-port {
740                 status = "okay";
741         };
742
743         u2phy0_host: host-port {
744                 phy-supply = <&vcc5v0_host>;
745                 status = "okay";
746         };
747 };
748
749 &u2phy1 {
750         status = "okay";
751
752         u2phy1_otg: otg-port {
753                 status = "okay";
754         };
755
756         u2phy1_host: host-port {
757                 phy-supply = <&vcc5v0_host>;
758                 status = "okay";
759         };
760 };
761
762 &uart0 {
763         pinctrl-names = "default";
764         pinctrl-0 = <&uart0_xfer &uart0_cts>;
765         status = "okay";
766 };
767
768 &uart2 {
769         status = "okay";
770 };
771
772 &usb_host0_ehci {
773         status = "okay";
774 };
775
776 &usb_host0_ohci {
777         status = "okay";
778 };
779
780 &usb_host1_ehci {
781         status = "okay";
782 };
783
784 &usb_host1_ohci {
785         status = "okay";
786 };
787
788 &usbdrd3_0 {
789         extcon = <&fusb0>;
790         status = "okay";
791 };
792
793 &usbdrd_dwc3_0 {
794         dr_mode = "peripheral";
795         status = "okay";
796 };
797
798 &usbdrd3_1 {
799         status = "okay";
800 };
801
802 &usbdrd_dwc3_1 {
803         dr_mode = "host";
804         status = "okay";
805 };
806
807 &pwm2 {
808         status = "okay";
809 };
810
811 &pwm3 {
812         status = "okay";
813
814         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
815         compatible = "rockchip,remotectl-pwm";
816         remote_pwm_id = <3>;
817         handle_cpu_id = <0>;
818
819         ir_key1 {
820                 rockchip,usercode = <0x4040>;
821                 rockchip,key_table =
822                         <0xf2   KEY_REPLY>,
823                         <0xba   KEY_BACK>,
824                         <0xf4   KEY_UP>,
825                         <0xf1   KEY_DOWN>,
826                         <0xef   KEY_LEFT>,
827                         <0xee   KEY_RIGHT>,
828                         <0xbd   KEY_HOME>,
829                         <0xea   KEY_VOLUMEUP>,
830                         <0xe3   KEY_VOLUMEDOWN>,
831                         <0xe2   KEY_SEARCH>,
832                         <0xb2   KEY_POWER>,
833                         <0xbc   KEY_MUTE>,
834                         <0xec   KEY_MENU>,
835                         <0xbf   0x190>,
836                         <0xe0   0x191>,
837                         <0xe1   0x192>,
838                         <0xe9   183>,
839                         <0xe6   248>,
840                         <0xe8   185>,
841                         <0xe7   186>,
842                         <0xf0   388>,
843                         <0xbe   0x175>;
844         };
845
846         ir_key2 {
847                 rockchip,usercode = <0xff00>;
848                 rockchip,key_table =
849                         <0xf9   KEY_HOME>,
850                         <0xbf   KEY_BACK>,
851                         <0xfb   KEY_MENU>,
852                         <0xaa   KEY_REPLY>,
853                         <0xb9   KEY_UP>,
854                         <0xe9   KEY_DOWN>,
855                         <0xb8   KEY_LEFT>,
856                         <0xea   KEY_RIGHT>,
857                         <0xeb   KEY_VOLUMEDOWN>,
858                         <0xef   KEY_VOLUMEUP>,
859                         <0xf7   KEY_MUTE>,
860                         <0xe7   KEY_POWER>,
861                         <0xfc   KEY_POWER>,
862                         <0xa9   KEY_VOLUMEDOWN>,
863                         <0xa8   KEY_VOLUMEDOWN>,
864                         <0xe0   KEY_VOLUMEDOWN>,
865                         <0xa5   KEY_VOLUMEDOWN>,
866                         <0xab   183>,
867                         <0xb7   388>,
868                         <0xf8   184>,
869                         <0xaf   185>,
870                         <0xed   KEY_VOLUMEDOWN>,
871                         <0xee   186>,
872                         <0xb3   KEY_VOLUMEDOWN>,
873                         <0xf1   KEY_VOLUMEDOWN>,
874                         <0xf2   KEY_VOLUMEDOWN>,
875                         <0xf3   KEY_SEARCH>,
876                         <0xb4   KEY_VOLUMEDOWN>,
877                         <0xbe   KEY_SEARCH>;
878         };
879
880         ir_key3 {
881                 rockchip,usercode = <0x1dcc>;
882                 rockchip,key_table =
883                         <0xee   KEY_REPLY>,
884                         <0xf0   KEY_BACK>,
885                         <0xf8   KEY_UP>,
886                         <0xbb   KEY_DOWN>,
887                         <0xef   KEY_LEFT>,
888                         <0xed   KEY_RIGHT>,
889                         <0xfc   KEY_HOME>,
890                         <0xf1   KEY_VOLUMEUP>,
891                         <0xfd   KEY_VOLUMEDOWN>,
892                         <0xb7   KEY_SEARCH>,
893                         <0xff   KEY_POWER>,
894                         <0xf3   KEY_MUTE>,
895                         <0xbf   KEY_MENU>,
896                         <0xf9   0x191>,
897                         <0xf5   0x192>,
898                         <0xb3   388>,
899                         <0xbe   KEY_1>,
900                         <0xba   KEY_2>,
901                         <0xb2   KEY_3>,
902                         <0xbd   KEY_4>,
903                         <0xf9   KEY_5>,
904                         <0xb1   KEY_6>,
905                         <0xfc   KEY_7>,
906                         <0xf8   KEY_8>,
907                         <0xb0   KEY_9>,
908                         <0xb6   KEY_0>,
909                         <0xb5   KEY_BACKSPACE>;
910         };
911 };
912
913 &gmac {
914         phy-supply = <&vcc_phy>;
915         phy-mode = "rgmii";
916         clock_in_out = "input";
917         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
918         snps,reset-active-low;
919         snps,reset-delays-us = <0 10000 50000>;
920         assigned-clocks = <&cru SCLK_RMII_SRC>;
921         assigned-clock-parents = <&clkin_gmac>;
922         pinctrl-names = "default";
923         pinctrl-0 = <&rgmii_pins>;
924         tx_delay = <0x28>;
925         rx_delay = <0x11>;
926         status = "okay";
927 };
928
929 &saradc {
930         status = "okay";
931 };
932
933 &rk_screen {
934         #include <dt-bindings/display/screen-timing/lcd-box.dtsi>
935 };
936
937 &disp_timings {
938         native-mode = <&timing1>; /* 1080p */
939 };
940
941 &vopb_rk_fb {
942         status = "okay";
943 };
944
945 &fb {
946         rockchip,disp-mode = <NO_DUAL>;
947         rockchip,disp-policy = <DISPLAY_POLICY_BOX>;
948 };
949
950 &hdmi_rk_fb {
951         status = "okay";
952         rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC0>;
953 };
954
955 &i2s2 {
956         status = "okay";
957 };
958
959 &pinctrl {
960         sdio-pwrseq {
961                 wifi_enable_h: wifi-enable-h {
962                         rockchip,pins =
963                                 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
964                 };
965         };
966
967         wireless-bluetooth {
968                 uart0_gpios: uart0-gpios {
969                         rockchip,pins =
970                                 <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
971                 };
972         };
973
974         usb2 {
975                 host_vbus_drv: host-vbus-drv {
976                         rockchip,pins =
977                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
978                 };
979         };
980
981         pmic {
982                 pmic_int_l: pmic-int-l {
983                         rockchip,pins =
984                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
985                 };
986         };
987 };