3f083c50c13180ab0efff3de06283aacf020ac2a
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399-box-808-android.dts
1 /*
2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42
43 /dts-v1/;
44
45 #include <dt-bindings/pwm/pwm.h>
46 #include <dt-bindings/input/input.h>
47 #include "rk3399.dtsi"
48 #include "rk3399-android.dtsi"
49
50 / {
51         model = "Rockchip RK3399 Box Board v1 (Android)";
52         compatible = "rockchip,rk3399";
53
54         vcc1v8_s0: vcc1v8-s0 {
55                 compatible = "regulator-fixed";
56                 regulator-name = "vcc1v8_s0";
57                 regulator-min-microvolt = <1800000>;
58                 regulator-max-microvolt = <1800000>;
59                 regulator-always-on;
60         };
61
62         vcc_sys: vcc-sys {
63                 compatible = "regulator-fixed";
64                 regulator-name = "vcc_sys";
65                 regulator-min-microvolt = <5000000>;
66                 regulator-max-microvolt = <5000000>;
67                 regulator-always-on;
68         };
69
70         vcc_phy: vcc-phy-regulator {
71                 compatible = "regulator-fixed";
72                 regulator-name = "vcc_phy";
73                 regulator-always-on;
74                 regulator-boot-on;
75         };
76
77         vcc3v3_sys: vcc3v3-sys {
78                 compatible = "regulator-fixed";
79                 regulator-name = "vcc3v3_sys";
80                 regulator-min-microvolt = <3300000>;
81                 regulator-max-microvolt = <3300000>;
82                 regulator-always-on;
83                 vin-supply = <&vcc_sys>;
84         };
85
86         vcc5v0_host: vcc5v0-host-regulator {
87                 compatible = "regulator-fixed";
88                 enable-active-high;
89                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
90                 pinctrl-names = "default";
91                 pinctrl-0 = <&host_vbus_drv>;
92                 regulator-name = "vcc5v0_host";
93         };
94
95         vdd_center: vdd-center {
96                 compatible = "pwm-regulator";
97                 pwms = <&pwm2 0 25000 0>;
98                 regulator-name = "vdd_center";
99                 regulator-min-microvolt = <800000>;
100                 regulator-max-microvolt = <1400000>;
101                 regulator-always-on;
102                 regulator-boot-on;
103
104                 /* for rockchip boot on */
105                 rockchip,pwm_id= <2>;
106                 rockchip,pwm_voltage = <900000>;
107
108                 vin-supply = <&vcc_sys>;
109         };
110
111         clkin_gmac: external-gmac-clock {
112                 compatible = "fixed-clock";
113                 clock-frequency = <125000000>;
114                 clock-output-names = "clkin_gmac";
115                 #clock-cells = <0>;
116         };
117
118         io-domains {
119                 compatible = "rockchip,rk3399-io-voltage-domain";
120                 rockchip,grf = <&grf>;
121
122                 bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
123                 audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
124                 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
125                 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
126         };
127
128         pmu-io-domains {
129                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
130                 rockchip,grf = <&pmugrf>;
131
132                 pmu1830-supply = <&vcc_1v8>;
133         };
134
135         spdif-sound {
136                 status = "okay";
137                 compatible = "simple-audio-card";
138                 simple-audio-card,name = "ROCKCHIP,SPDIF";
139                 simple-audio-card,cpu {
140                         sound-dai = <&spdif>;
141                 };
142                 simple-audio-card,codec {
143                         sound-dai = <&spdif_out>;
144                 };
145         };
146
147         spdif_out: spdif-out {
148                 status = "okay";
149                 compatible = "linux,spdif-dit";
150                 #sound-dai-cells = <0>;
151         };
152
153         hdmi_sound: hdmi-sound {
154                 status = "okay";
155                 compatible = "simple-audio-card";
156                 simple-audio-card,format = "i2s";
157                 simple-audio-card,mclk-fs = <256>;
158                 simple-audio-card,name = "rockchip,hdmi";
159                 simple-audio-card,cpu {
160                         sound-dai = <&i2s2>;
161                 };
162                 simple-audio-card,codec {
163                         sound-dai = <&dw_hdmi_audio>;
164                 };
165         };
166
167         dw_hdmi_audio: dw-hdmi-audio {
168                 status = "okay";
169                 compatible = "rockchip,dw-hdmi-audio";
170                 #sound-dai-cells = <0>;
171         };
172
173         sdio_pwrseq: sdio-pwrseq {
174                 compatible = "mmc-pwrseq-simple";
175                 clocks = <&rk808 1>;
176                 clock-names = "ext_clock";
177                 pinctrl-names = "default";
178                 pinctrl-0 = <&wifi_enable_h>;
179
180                 /*
181                  * On the module itself this is one of these (depending
182                  * on the actual card populated):
183                  * - SDIO_RESET_L_WL_REG_ON
184                  * - PDN (power down when low)
185                  */
186                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
187         };
188
189         wireless-wlan {
190                 compatible = "wlan-platdata";
191                 rockchip,grf = <&grf>;
192                 wifi_chip_type = "ap6354";
193                 sdio_vref = <1800>;
194                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>;
195                 status = "okay";
196         };
197
198         wireless-bluetooth {
199                 compatible = "bluetooth-platdata";
200                 /* wifi-bt-power-toggle; */
201                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
202                 pinctrl-names = "default", "rts_gpio";
203                 pinctrl-0 = <&uart0_rts>;
204                 pinctrl-1 = <&uart0_gpios>;
205                 /* BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; */
206                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>;
207                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>;
208                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>;
209                 status = "okay";
210         };
211 };
212
213 &sdmmc {
214         clock-frequency = <150000000>;
215         clock-freq-min-max = <400000 150000000>;
216         supports-sd;
217         bus-width = <4>;
218         cap-mmc-highspeed;
219         cap-sd-highspeed;
220         disable-wp;
221         num-slots = <1>;
222         sd-uhs-sdr104;
223         vqmmc-supply = <&vcc_sd>;
224         pinctrl-names = "default";
225         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
226         status = "okay";
227 };
228
229 &sdio0 {
230         clock-frequency = <140000000>;
231         clock-freq-min-max = <200000 140000000>;
232         supports-sdio;
233         bus-width = <4>;
234         disable-wp;
235         cap-sd-highspeed;
236         cap-sdio-irq;
237         keep-power-in-suspend;
238         mmc-pwrseq = <&sdio_pwrseq>;
239         non-removable;
240         num-slots = <1>;
241         pinctrl-names = "default";
242         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
243         sd-uhs-sdr104;
244         status = "okay";
245 };
246
247 &emmc_phy {
248         freq-sel = <200000000>;
249         dr-sel = <50>;
250         opdelay = <4>;
251         status = "okay";
252 };
253
254 &sdhci {
255         bus-width = <8>;
256         mmc-hs400-1_8v;
257         supports-emmc;
258         non-removable;
259         mmc-hs400-enhanced-strobe;
260         status = "okay";
261 };
262
263 &i2s0 {
264         status = "okay";
265         rockchip,i2s-broken-burst-len;
266         rockchip,playback-channels = <8>;
267         rockchip,capture-channels = <8>;
268         #sound-dai-cells = <0>;
269 };
270
271 &i2s2 {
272         #sound-dai-cells = <0>;
273 };
274
275 &spdif {
276         pinctrl-0 = <&spdif_bus_1>;
277         status = "okay";
278         #sound-dai-cells = <0>;
279 };
280
281 &i2c0 {
282         status = "okay";
283         i2c-scl-rising-time-ns = <168>;
284         i2c-scl-falling-time-ns = <4>;
285         clock-frequency = <400000>;
286
287         vdd_cpu_b: syr827@40 {
288                 compatible = "silergy,syr827";
289                 reg = <0x40>;
290                 regulator-compatible = "fan53555-reg";
291                 regulator-name = "vdd_cpu_b";
292                 regulator-min-microvolt = <712500>;
293                 regulator-max-microvolt = <1500000>;
294                 regulator-ramp-delay = <1000>;
295                 fcs,suspend-voltage-selector = <1>;
296                 regulator-always-on;
297                 regulator-boot-on;
298                 regulator-initial-state = <3>;
299                 vin-supply = <&vcc_sys>;
300                 regulator-state-mem {
301                         regulator-off-in-suspend;
302                 };
303         };
304
305         vdd_gpu: syr828@41 {
306                 compatible = "silergy,syr828";
307                 reg = <0x41>;
308                 regulator-compatible = "fan53555-reg";
309                 regulator-name = "vdd_gpu";
310                 regulator-min-microvolt = <735000>;
311                 regulator-max-microvolt = <1400000>;
312                 regulator-ramp-delay = <1000>;
313                 fcs,suspend-voltage-selector = <1>;
314                 regulator-always-on;
315                 regulator-boot-on;
316                 vin-supply = <&vcc_sys>;
317                 regulator-state-mem {
318                         regulator-off-in-suspend;
319                 };
320         };
321
322         rk808: pmic@1b {
323                 compatible = "rockchip,rk808";
324                 reg = <0x1b>;
325                 interrupt-parent = <&gpio1>;
326                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
327                 pinctrl-names = "default";
328                 pinctrl-0 = <&pmic_int_l>;
329                 rockchip,system-power-controller;
330                 wakeup-source;
331                 #clock-cells = <1>;
332                 clock-output-names = "xin32k", "rk808-clkout2";
333
334                 vcc1-supply = <&vcc_sys>;
335                 vcc2-supply = <&vcc_sys>;
336                 vcc3-supply = <&vcc_sys>;
337                 vcc4-supply = <&vcc_sys>;
338                 vcc6-supply = <&vcc_sys>;
339                 vcc7-supply = <&vcc_sys>;
340                 vcc8-supply = <&vcc3v3_sys>;
341                 vcc9-supply = <&vcc_sys>;
342                 vcc10-supply = <&vcc_sys>;
343                 vcc11-supply = <&vcc_sys>;
344                 vcc12-supply = <&vcc3v3_sys>;
345                 vddio-supply = <&vcc_1v8>;
346
347                 regulators {
348                         vdd_log: DCDC_REG1 {
349                                 regulator-name = "vdd_log";
350                                 regulator-min-microvolt = <750000>;
351                                 regulator-max-microvolt = <1350000>;
352                                 regulator-ramp-delay = <6001>;
353                                 regulator-always-on;
354                                 regulator-boot-on;
355                                 regulator-state-mem {
356                                         regulator-on-in-suspend;
357                                         regulator-suspend-microvolt = <900000>;
358                                 };
359                         };
360
361                         vdd_cpu_l: DCDC_REG2 {
362                                 regulator-name = "vdd_cpu_l";
363                                 regulator-min-microvolt = <750000>;
364                                 regulator-max-microvolt = <1350000>;
365                                 regulator-ramp-delay = <6001>;
366                                 regulator-always-on;
367                                 regulator-boot-on;
368                                 regulator-state-mem {
369                                         regulator-off-in-suspend;
370                                 };
371                         };
372
373                         vcc_ddr: DCDC_REG3 {
374                                 regulator-name = "vcc_ddr";
375                                 regulator-always-on;
376                                 regulator-boot-on;
377                                 regulator-state-mem {
378                                         regulator-on-in-suspend;
379                                 };
380                         };
381
382                         vcc_1v8: DCDC_REG4 {
383                                 regulator-name = "vcc_1v8";
384                                 regulator-min-microvolt = <1800000>;
385                                 regulator-max-microvolt = <1800000>;
386                                 regulator-always-on;
387                                 regulator-boot-on;
388                                 regulator-state-mem {
389                                         regulator-on-in-suspend;
390                                         regulator-suspend-microvolt = <1800000>;
391                                 };
392                         };
393
394                         vcc1v8_dvp: LDO_REG1 {
395                                 regulator-name = "vcc1v8_dvp";
396                                 regulator-min-microvolt = <1800000>;
397                                 regulator-max-microvolt = <1800000>;
398                                 regulator-always-on;
399                                 regulator-boot-on;
400                                 regulator-state-mem {
401                                         regulator-on-in-suspend;
402                                         regulator-suspend-microvolt = <1800000>;
403                                 };
404                         };
405
406                         vcc3v0_tp: LDO_REG2 {
407                                 regulator-name = "vcc3v0_tp";
408                                 regulator-min-microvolt = <3000000>;
409                                 regulator-max-microvolt = <3000000>;
410                                 regulator-always-on;
411                                 regulator-boot-on;
412                                 regulator-state-mem {
413                                         regulator-off-in-suspend;
414                                 };
415                         };
416
417                         vcc1v8_pll: LDO_REG3 {
418                                 regulator-name = "vcc1v8_pll";
419                                 regulator-min-microvolt = <1800000>;
420                                 regulator-max-microvolt = <1800000>;
421                                 regulator-always-on;
422                                 regulator-boot-on;
423                                 regulator-state-mem {
424                                         regulator-on-in-suspend;
425                                         regulator-suspend-microvolt = <1800000>;
426                                 };
427                         };
428
429                         vcc_sd: LDO_REG4 {
430                                 regulator-name = "vcc_sd";
431                                 regulator-min-microvolt = <1800000>;
432                                 regulator-max-microvolt = <3300000>;
433                                 regulator-always-on;
434                                 regulator-boot-on;
435                                 regulator-state-mem {
436                                         regulator-on-in-suspend;
437                                         regulator-suspend-microvolt = <3300000>;
438                                 };
439                         };
440
441                         vcc3v0_sd: LDO_REG5 {
442                                 regulator-name = "vcc3v0_sd";
443                                 regulator-min-microvolt = <3000000>;
444                                 regulator-max-microvolt = <3000000>;
445                                 regulator-always-on;
446                                 regulator-boot-on;
447                                 regulator-state-mem {
448                                         regulator-on-in-suspend;
449                                         regulator-suspend-microvolt = <3000000>;
450                                 };
451                         };
452
453                         vcc_1v5: LDO_REG6 {
454                                 regulator-name = "vcc_1v5";
455                                 regulator-min-microvolt = <1500000>;
456                                 regulator-max-microvolt = <1500000>;
457                                 regulator-always-on;
458                                 regulator-boot-on;
459                                 regulator-state-mem {
460                                         regulator-on-in-suspend;
461                                         regulator-suspend-microvolt = <1500000>;
462                                 };
463                         };
464
465                         vcc_0v9a: LDO_REG7 {
466                                 regulator-name = "vcc_0v9a";
467                                 regulator-min-microvolt = <900000>;
468                                 regulator-max-microvolt = <900000>;
469                                 regulator-always-on;
470                                 regulator-boot-on;
471                                 regulator-state-mem {
472                                         regulator-on-in-suspend;
473                                         regulator-suspend-microvolt = <900000>;
474                                 };
475                         };
476
477                         vcc_3v0: LDO_REG8 {
478                                 regulator-name = "vcc_3v0";
479                                 regulator-min-microvolt = <3000000>;
480                                 regulator-max-microvolt = <3000000>;
481                                 regulator-always-on;
482                                 regulator-boot-on;
483                                 regulator-state-mem {
484                                         regulator-on-in-suspend;
485                                         regulator-suspend-microvolt = <3000000>;
486                                 };
487                         };
488
489                         vcc3v3_s3: SWITCH_REG1 {
490                                 regulator-name = "vcc3v3_s3";
491                                 regulator-always-on;
492                                 regulator-boot-on;
493                                 regulator-state-mem {
494                                         regulator-on-in-suspend;
495                                 };
496                         };
497
498                         vcc3v3_s0: SWITCH_REG2 {
499                                 regulator-name = "vcc3v3_s0";
500                                 regulator-always-on;
501                                 regulator-boot-on;
502                                 regulator-state-mem {
503                                         regulator-on-in-suspend;
504                                 };
505                         };
506                 };
507         };
508 };
509
510 &cpu_l0 {
511         cpu-supply = <&vdd_cpu_l>;
512 };
513
514 &cpu_l1 {
515         cpu-supply = <&vdd_cpu_l>;
516 };
517
518 &cpu_l2 {
519         cpu-supply = <&vdd_cpu_l>;
520 };
521
522 &cpu_l3 {
523         cpu-supply = <&vdd_cpu_l>;
524 };
525
526 &cpu_b0 {
527         cpu-supply = <&vdd_cpu_b>;
528 };
529
530 &cpu_b1 {
531         cpu-supply = <&vdd_cpu_b>;
532 };
533
534 &gpu {
535         status = "okay";
536         mali-supply = <&vdd_gpu>;
537 };
538
539 &rga {
540         status = "okay";
541 };
542
543 &tsadc {
544         /* tshut mode 0:CRU 1:GPIO */
545         rockchip,hw-tshut-mode = <1>;
546         /* tshut polarity 0:LOW 1:HIGH */
547         rockchip,hw-tshut-polarity = <1>;
548         status = "okay";
549 };
550
551 &u2phy0 {
552         status = "okay";
553
554         u2phy0_otg: otg-port {
555                 status = "okay";
556         };
557
558         u2phy0_host: host-port {
559                 phy-supply = <&vcc5v0_host>;
560                 status = "okay";
561         };
562 };
563
564 &u2phy1 {
565         status = "okay";
566
567         u2phy1_otg: otg-port {
568                 status = "okay";
569         };
570
571         u2phy1_host: host-port {
572                 phy-supply = <&vcc5v0_host>;
573                 status = "okay";
574         };
575 };
576
577 &uart0 {
578         pinctrl-names = "default";
579         pinctrl-0 = <&uart0_xfer &uart0_cts>;
580         status = "okay";
581 };
582
583 &uart2 {
584         status = "okay";
585 };
586
587 &usb_host0_ehci {
588         status = "okay";
589 };
590
591 &usb_host0_ohci {
592         status = "okay";
593 };
594
595 &usb_host1_ehci {
596         status = "okay";
597 };
598
599 &usb_host1_ohci {
600         status = "okay";
601 };
602
603 &usbdrd3_0 {
604         status = "okay";
605 };
606
607 &usbdrd_dwc3_0 {
608         dr_mode = "otg";
609         status = "okay";
610 };
611
612 &usbdrd3_1 {
613         status = "okay";
614 };
615
616 &usbdrd_dwc3_1 {
617         dr_mode = "host";
618         status = "okay";
619 };
620
621 &pwm2 {
622         status = "okay";
623 };
624
625 &pwm3 {
626         status = "disabled";
627
628         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
629         compatible = "rockchip,remotectl-pwm";
630         remote_pwm_id = <3>;
631         handle_cpu_id = <0>;
632
633         ir_key1 {
634                 rockchip,usercode = <0x4040>;
635                 rockchip,key_table =
636                         <0xf2   KEY_REPLY>,
637                         <0xba   KEY_BACK>,
638                         <0xf4   KEY_UP>,
639                         <0xf1   KEY_DOWN>,
640                         <0xef   KEY_LEFT>,
641                         <0xee   KEY_RIGHT>,
642                         <0xbd   KEY_HOME>,
643                         <0xea   KEY_VOLUMEUP>,
644                         <0xe3   KEY_VOLUMEDOWN>,
645                         <0xe2   KEY_SEARCH>,
646                         <0xb2   KEY_POWER>,
647                         <0xbc   KEY_MUTE>,
648                         <0xec   KEY_MENU>,
649                         <0xbf   0x190>,
650                         <0xe0   0x191>,
651                         <0xe1   0x192>,
652                         <0xe9   183>,
653                         <0xe6   248>,
654                         <0xe8   185>,
655                         <0xe7   186>,
656                         <0xf0   388>,
657                         <0xbe   0x175>;
658         };
659
660         ir_key2 {
661                 rockchip,usercode = <0xff00>;
662                 rockchip,key_table =
663                         <0xf9   KEY_HOME>,
664                         <0xbf   KEY_BACK>,
665                         <0xfb   KEY_MENU>,
666                         <0xaa   KEY_REPLY>,
667                         <0xb9   KEY_UP>,
668                         <0xe9   KEY_DOWN>,
669                         <0xb8   KEY_LEFT>,
670                         <0xea   KEY_RIGHT>,
671                         <0xeb   KEY_VOLUMEDOWN>,
672                         <0xef   KEY_VOLUMEUP>,
673                         <0xf7   KEY_MUTE>,
674                         <0xe7   KEY_POWER>,
675                         <0xfc   KEY_POWER>,
676                         <0xa9   KEY_VOLUMEDOWN>,
677                         <0xa8   KEY_VOLUMEDOWN>,
678                         <0xe0   KEY_VOLUMEDOWN>,
679                         <0xa5   KEY_VOLUMEDOWN>,
680                         <0xab   183>,
681                         <0xb7   388>,
682                         <0xf8   184>,
683                         <0xaf   185>,
684                         <0xed   KEY_VOLUMEDOWN>,
685                         <0xee   186>,
686                         <0xb3   KEY_VOLUMEDOWN>,
687                         <0xf1   KEY_VOLUMEDOWN>,
688                         <0xf2   KEY_VOLUMEDOWN>,
689                         <0xf3   KEY_SEARCH>,
690                         <0xb4   KEY_VOLUMEDOWN>,
691                         <0xbe   KEY_SEARCH>;
692         };
693
694         ir_key3 {
695                 rockchip,usercode = <0x1dcc>;
696                 rockchip,key_table =
697                         <0xee   KEY_REPLY>,
698                         <0xf0   KEY_BACK>,
699                         <0xf8   KEY_UP>,
700                         <0xbb   KEY_DOWN>,
701                         <0xef   KEY_LEFT>,
702                         <0xed   KEY_RIGHT>,
703                         <0xfc   KEY_HOME>,
704                         <0xf1   KEY_VOLUMEUP>,
705                         <0xfd   KEY_VOLUMEDOWN>,
706                         <0xb7   KEY_SEARCH>,
707                         <0xff   KEY_POWER>,
708                         <0xf3   KEY_MUTE>,
709                         <0xbf   KEY_MENU>,
710                         <0xf9   0x191>,
711                         <0xf5   0x192>,
712                         <0xb3   388>,
713                         <0xbe   KEY_1>,
714                         <0xba   KEY_2>,
715                         <0xb2   KEY_3>,
716                         <0xbd   KEY_4>,
717                         <0xf9   KEY_5>,
718                         <0xb1   KEY_6>,
719                         <0xfc   KEY_7>,
720                         <0xf8   KEY_8>,
721                         <0xb0   KEY_9>,
722                         <0xb6   KEY_0>,
723                         <0xb5   KEY_BACKSPACE>;
724         };
725 };
726
727 &gmac {
728         phy-supply = <&vcc_phy>;
729         phy-mode = "rgmii";
730         clock_in_out = "input";
731         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
732         snps,reset-active-low;
733         snps,reset-delays-us = <0 10000 50000>;
734         assigned-clocks = <&cru SCLK_RMII_SRC>;
735         assigned-clock-parents = <&clkin_gmac>;
736         pinctrl-names = "default";
737         pinctrl-0 = <&rgmii_pins>;
738         tx_delay = <0x28>;
739         rx_delay = <0x11>;
740         status = "okay";
741 };
742
743 &saradc {
744         status = "okay";
745 };
746
747 &pinctrl {
748         sdio-pwrseq {
749                 wifi_enable_h: wifi-enable-h {
750                         rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
751                 };
752         };
753
754         wireless-bluetooth {
755                 uart0_gpios: uart0-gpios {
756                         rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
757                 };
758         };
759
760         pmic {
761                 pmic_int_l: pmic-int-l {
762                         rockchip,pins =
763                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
764                 };
765         };
766
767         usb2 {
768                 host_vbus_drv: host-vbus-drv {
769                         rockchip,pins =
770                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
771                 };
772         };
773 };
774
775 &rk_screen {
776         #include <dt-bindings/display/screen-timing/lcd-box.dtsi>
777 };
778
779 &vopb_rk_fb {
780         status = "okay";
781 };
782
783 &fb {
784         rockchip,disp-mode = <NO_DUAL>;
785         rockchip,disp-policy = <DISPLAY_POLICY_BOX>;
786 };
787
788 &hdmi_rk_fb {
789         status = "okay";
790         rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC0>;
791 };
792
793 &i2s2 {
794         status = "okay";
795 };
796