2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include "rk3366.dtsi"
48 model = "Rockchip SDK tb board";
49 compatible = "rockchip,tb", "rockchip,rk3366";
52 bootargs = "console=uart,mmio32,0xff690000";
56 compatible = "rockchip,ion";
61 reg = <0x00000000 0x02000000>;
68 ramoops_mem: ramoops_mem {
69 reg = <0x0 0x100000 0x0 0x100000>;
70 reg-names = "ramoops_mem";
74 compatible = "ramoops";
75 record-size = <0x0 0x10000>;
76 console-size = <0x0 0x80000>;
77 ftrace-size = <0x0 0x10000>;
78 pmsg-size = <0x0 0x50000>;
79 memory-region = <&ramoops_mem>;
82 backlight: backlight {
83 compatible = "pwm-backlight";
84 pwms = <&pwm0 0 25000 PWM_POLARITY_INVERTED>;
88 16 17 18 19 20 21 22 23
89 24 25 26 27 28 29 30 31
90 32 33 34 35 36 37 38 39
91 40 41 42 43 44 45 46 47
92 48 49 50 51 52 53 54 55
93 56 57 58 59 60 61 62 63
94 64 65 66 67 68 69 70 71
95 72 73 74 75 76 77 78 79
96 80 81 82 83 84 85 86 87
97 88 89 90 91 92 93 94 95
98 96 97 98 99 100 101 102 103
99 104 105 106 107 108 109 110 111
100 112 113 114 115 116 117 118 119
101 120 121 122 123 124 125 126 127
102 128 129 130 131 132 133 134 135
103 136 137 138 139 140 141 142 143
104 144 145 146 147 148 149 150 151
105 152 153 154 155 156 157 158 159
106 160 161 162 163 164 165 166 167
107 168 169 170 171 172 173 174 175
108 176 177 178 179 180 181 182 183
109 184 185 186 187 188 189 190 191
110 192 193 194 195 196 197 198 199
111 200 201 202 203 204 205 206 207
112 208 209 210 211 212 213 214 215
113 216 217 218 219 220 221 222 223
114 224 225 226 227 228 229 230 231
115 232 233 234 235 236 237 238 239
116 240 241 242 243 244 245 246 247
117 248 249 250 251 252 253 254 255>;
118 default-brightness-level = <200>;
119 enable-gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
122 rk_key: rockchip-key {
123 compatible = "rockchip,key";
126 io-channels = <&saradc 1>;
131 rockchip,adc_value = <1>;
136 label = "volume down";
137 rockchip,adc_value = <170>;
141 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
150 rockchip,adc_value = <355>;
156 rockchip,adc_value = <746>;
162 rockchip,adc_value = <560>;
168 rockchip,adc_value = <450>;
173 compatible = "simple-audio-card";
174 simple-audio-card,format = "i2s";
175 simple-audio-card,name = "rockchip,rt5640-codec";
176 simple-audio-card,mclk-fs = <256>;
177 simple-audio-card,widgets =
178 "Microphone", "Mic Jack",
179 "Headphone", "Headphone Jack";
180 simple-audio-card,routing =
181 "Mic Jack", "MICBIAS1",
183 "Headphone Jack", "HPOL",
184 "Headphone Jack", "HPOR";
185 simple-audio-card,cpu {
186 sound-dai = <&i2s_8ch>;
188 simple-audio-card,codec {
189 sound-dai = <&rt5640>;
194 compatible = "simple-audio-card";
195 simple-audio-card,name = "rockchip,spdif";
196 simple-audio-card,cpu {
197 sound-dai = <&spdif>;
199 simple-audio-card,codec {
200 sound-dai = <&spdif_out>;
204 spdif_out: spdif-out {
205 compatible = "linux,spdif-dit";
206 #sound-dai-cells = <0>;
210 compatible = "regulator-fixed";
211 regulator-name = "vcc_sys";
214 regulator-min-microvolt = <3800000>;
215 regulator-max-microvolt = <3800000>;
218 ext_gmac: external-gmac-clock {
219 compatible = "fixed-clock";
220 clock-frequency = <125000000>;
221 clock-output-names = "ext_gmac";
225 vbus_host: vbus-host-regulator {
226 compatible = "regulator-fixed";
228 gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>;
229 pinctrl-names = "default";
230 pinctrl-0 = <&host_vbus_drv>;
231 regulator-name = "vbus_host";
234 vcc_phy: vcc-phy-regulator {
235 compatible = "regulator-fixed";
237 gpio = <&gpio0 25 GPIO_ACTIVE_HIGH>;
238 pinctrl-names = "default";
239 pinctrl-0 = <ð_phy_pwr>;
240 regulator-name = "vcc_phy";
246 compatible = "rockchip,rk3366-io-voltage-domain";
247 rockchip,grf = <&grf>;
249 lcdc-supply = <&vcc_io>;
250 dvpts-supply = <&vcc_18>;
251 wifibt-supply = <&vccio_wl>;
252 audio-supply = <&vcc_io>;
253 sdcard-supply = <&vccio_sd>;
254 tphdsor-supply = <&vcc_io>;
257 dwc_control_usb: dwc-control-usb {
258 compatible = "rockchip,rk3368-dwc-control-usb";
259 rockchip,grf = <&grf>;
260 grf-offset = <0x049c>; /* GRF_SOC_STATUS for USB2.0 OTG */
261 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
262 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
263 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
264 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
265 interrupt-names = "otg_id", "otg_bvalid",
266 "otg_linestate", "host0_linestate";
267 clocks = <&cru SCLK_USBPHY480M>;
268 clock-names = "usbphy_480m";
271 compatible = "inno,phy";
272 regbase = &dwc_control_usb;
273 rk_usb,bvalid = <0x49c 23 1>;
274 rk_usb,iddig = <0x49c 26 1>;
275 rk_usb,vdmsrcen = <0x718 12 1>;
276 rk_usb,vdpsrcen = <0x718 11 1>;
277 rk_usb,rdmpden = <0x718 10 1>;
278 rk_usb,idpsrcen = <0x718 9 1>;
279 rk_usb,idmsinken = <0x718 8 1>;
280 rk_usb,idpsinken = <0x718 7 1>;
281 rk_usb,dpattach = <0x498 31 1>;
282 rk_usb,cpdet = <0x498 30 1>;
283 rk_usb,dcpattach = <0x498 29 1>;
288 compatible = "i2c-gpio";
289 gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>, /* sda */
290 <&gpio5 16 GPIO_ACTIVE_HIGH>; /* scl */
291 i2c-gpio,delay-us = <2>; /* ~100 kHz */
292 #address-cells = <1>;
294 pinctrl-names = "default";
295 pinctrl-0 = <&i2c2_gpio>;
300 compatible = "i2c-gpio";
301 gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>, /* sda */
302 <&gpio5 8 GPIO_ACTIVE_HIGH>; /* scl */
303 i2c-gpio,delay-us = <2>; /* ~100 kHz */
304 #address-cells = <1>;
306 pinctrl-names = "default";
307 pinctrl-0 = <&i2c4_gpio>;
311 compatible = "goodix,gt9xx";
313 touch-gpio = <&gpio5 11 IRQ_TYPE_LEVEL_LOW>;
314 reset-gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>;
318 tp-supply = <&vcc_tp>;
323 sdio_pwrseq: sdio-pwrseq {
324 compatible = "mmc-pwrseq-simple";
326 clock-names = "ext_clock";
327 pinctrl-names = "default";
328 pinctrl-0 = <&wifi_enable_h>;
331 * On the module itself this is one of these (depending
332 * on the actual card populated):
333 * - SDIO_RESET_L_WL_REG_ON
334 * - PDN (power down when low)
336 reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; /* GPIO0_B6 */
340 compatible = "wlan-platdata";
341 rockchip,grf = <&grf>;
342 wifi_chip_type = "ap6335";
344 WIFI,host_wake_irq = <&gpio3 20 GPIO_ACTIVE_HIGH>; /* GPIO3_c4 */
349 compatible = "bluetooth-platdata";
350 //wifi-bt-power-toggle;
351 uart_rts_gpios = <&gpio3 11 GPIO_ACTIVE_LOW>; /* GPIO3_b3 */
352 pinctrl-names = "default","rts_gpio";
353 pinctrl-0 = <&uart0_rts>;
354 pinctrl-1 = <&uart0_rts_gpio>;
355 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIO3_c3 */
356 BT,reset_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIO3_c3 */
357 BT,wake_gpio = <&gpio3 18 GPIO_ACTIVE_HIGH>; /* GPIO3_c2 */
358 BT,wake_host_irq = <&gpio3 21 GPIO_ACTIVE_HIGH>; /* GPIO3_c5 */
368 status = "okay"; /* enable both for emmc and nand */
372 clock-frequency = <100000000>;
373 clock-freq-min-max = <400000 100000000>;
380 pinctrl-names = "default";
381 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
386 clock-frequency = <37500000>;
387 clock-freq-min-max = <400000 37500000>;
392 card-detect-delay = <200>;
395 pinctrl-names = "default";
396 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
401 clock-frequency = <37500000>;
402 clock-freq-min-max = <200000 37500000>;
408 keep-power-in-suspend;
409 mmc-pwrseq = <&sdio_pwrseq>;
412 pinctrl-names = "default";
413 pinctrl-0 = <&sdio_bus4 &sdio_cmd &sdio_clk>;
420 pinctrl-0 = <&uart0_xfer &uart0_cts>;
429 i2c-scl-rising-time-ns = <250>;
430 i2c-scl-falling-time-ns = <20>;
433 regulator-name = "vdd_arm";
434 compatible = "silergy,syr827";
437 regulator-compatible = "fan53555-reg";
438 regulator-min-microvolt = <712500>;
439 regulator-max-microvolt = <1500000>;
440 fcs,suspend-voltage-selector = <1>;
443 regulator-initial-state = <3>;
444 regulator-ramp-delay = <2000>;
445 regulator-state-mem {
446 regulator-off-in-suspend;
447 regulator-suspend-microvolt = <900000>;
452 compatible = "rockchip,rk818";
455 clock-output-names = "xin32k", "wifibt_32kin";
456 interrupt-parent = <&gpio0>;
457 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
458 pinctrl-names = "default";
459 pinctrl-0 = <&pmic_int_l>;
460 rockchip,system-power-controller;
464 vcc1-supply = <&vcc_sys>;
465 vcc2-supply = <&vcc_sys>;
466 vcc3-supply = <&vcc_sys>;
467 vcc4-supply = <&vcc_sys>;
468 vcc6-supply = <&vcc_sys>;
469 vcc7-supply = <&vcc_sys>;
470 vcc8-supply = <&vcc_sys>;
471 vcc9-supply = <&vcc_io>;
474 vdd_logic: DCDC_REG1 {
475 regulator-name = "vdd_logic";
478 regulator-min-microvolt = <750000>;
479 regulator-max-microvolt = <1450000>;
480 regulator-ramp-delay = <6001>;
481 regulator-state-mem {
482 regulator-on-in-suspend;
483 regulator-suspend-microvolt = <1000000>;
488 regulator-name = "vdd_gpu";
491 regulator-min-microvolt = <800000>;
492 regulator-max-microvolt = <1250000>;
493 regulator-ramp-delay = <6001>;
494 regulator-state-mem {
495 regulator-on-in-suspend;
496 regulator-suspend-microvolt = <1000000>;
501 regulator-name = "vcc_ddr";
504 regulator-state-mem {
505 regulator-on-in-suspend;
510 regulator-name = "vcc_io";
513 regulator-min-microvolt = <3300000>;
514 regulator-max-microvolt = <3300000>;
515 regulator-state-mem {
516 regulator-on-in-suspend;
517 regulator-suspend-microvolt = <3300000>;
521 vcca_codec: LDO_REG1 {
522 regulator-name = "vcca_codec";
525 regulator-min-microvolt = <3300000>;
526 regulator-max-microvolt = <3300000>;
527 regulator-state-mem {
528 regulator-on-in-suspend;
529 regulator-suspend-microvolt = <3300000>;
534 regulator-name = "vcc_tp";
537 regulator-min-microvolt = <3000000>;
538 regulator-max-microvolt = <3000000>;
539 regulator-state-mem {
540 regulator-on-in-suspend;
541 regulator-suspend-microvolt = <3000000>;
546 regulator-name = "vdd_10";
549 regulator-min-microvolt = <1000000>;
550 regulator-max-microvolt = <1000000>;
551 regulator-state-mem {
552 regulator-on-in-suspend;
553 regulator-suspend-microvolt = <1000000>;
557 vcc18_lcd: LDO_REG4 {
558 regulator-name = "vcc18_lcd";
561 regulator-min-microvolt = <1800000>;
562 regulator-max-microvolt = <1800000>;
563 regulator-state-mem {
564 regulator-on-in-suspend;
565 regulator-suspend-microvolt = <1800000>;
569 vccio_pmu: LDO_REG5 {
570 regulator-name = "vccio_pmu";
573 regulator-min-microvolt = <1800000>;
574 regulator-max-microvolt = <1800000>;
575 regulator-state-mem {
576 regulator-on-in-suspend;
577 regulator-suspend-microvolt = <1800000>;
581 vdd10_lcd: LDO_REG6 {
582 regulator-name = "vdd10_lcd";
585 regulator-min-microvolt = <1000000>;
586 regulator-max-microvolt = <1000000>;
587 regulator-state-mem {
588 regulator-on-in-suspend;
589 regulator-suspend-microvolt = <1000000>;
594 regulator-name = "vcc_18";
597 regulator-min-microvolt = <1800000>;
598 regulator-max-microvolt = <1800000>;
599 regulator-state-mem {
600 regulator-on-in-suspend;
601 regulator-suspend-microvolt = <1800000>;
606 regulator-name = "vccio_wl";
609 regulator-min-microvolt = <1800000>;
610 regulator-max-microvolt = <3300000>;
611 regulator-state-mem {
612 regulator-on-in-suspend;
613 regulator-suspend-microvolt = <3300000>;
618 regulator-name = "vccio_sd";
621 regulator-min-microvolt = <1800000>;
622 regulator-max-microvolt = <3300000>;
623 regulator-state-mem {
624 regulator-on-in-suspend;
625 regulator-suspend-microvolt = <3300000>;
630 regulator-name = "vcc_sd";
633 regulator-state-mem {
634 regulator-on-in-suspend;
643 i2c-scl-rising-time-ns = <460>;
644 i2c-scl-falling-time-ns = <15>;
647 #sound-dai-cells = <0>;
648 compatible = "realtek,rt5640";
650 clocks = <&cru SCLK_I2S_8CH_OUT>;
651 clock-names = "mclk";
652 realtek,in1-differential;
658 rockchip,i2s-broken-burst-len;
659 rockchip,playback-channels = <8>;
660 rockchip,capture-channels = <2>;
661 #sound-dai-cells = <0>;
666 #sound-dai-cells = <0>;
683 rockchip,disp-mode = <DUAL>;
684 rockchip,uboot-logo-on = <0>;
689 #include <dt-bindings/display/screen-timing/lcd-tv080wum-mipi.dtsi>
690 /* #include <dt-bindings/display/screen-timing/lcd-b101ew05.dtsi> */
694 pinctrl-names = "lcdc", "sleep";
695 pinctrl-0 = <&lcdc_lcdc>;
696 pinctrl-1 = <&lcdc_gpio>;
706 rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC1>;
708 <148500000 0 0 17 18 18 18>,
709 <297000000 1 1 17 14 14 14>,
710 <594000000 1 1 16 5 5 5>;
715 rockchip,prop = <EXTEND>;
716 rockchip,mirror = <NO_MIRROR>;
717 rockchip,cabc_mode = <0>;
718 rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
751 rockchip,prop = <PRMRY>;
752 backlight = <&backlight>;
753 rockchip,mirror = <NO_MIRROR>;
754 rockchip,cabc_mode = <0>;
755 rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
756 power_ctr: power_ctr {
757 rockchip,debug = <0>;
759 rockchip,power_type = <GPIO>;
760 gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* GPIO_B4 = 12 */
761 rockchip,delay = <10>;
765 rockchip,power_type = <GPIO>;
766 gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>; /* GPIO_D0 = 24 */
767 rockchip,delay = <10>;
770 /* lcd_rst: lcd-rst {
771 * rockchip,power_type = <GPIO>;
772 * gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
773 * rockchip,delay = <5>;
785 pmic_int_l: pmic-int-l {
786 rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
791 wifi_enable_h: wifienable-h {
792 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
797 uart0_rts_gpio: uart0-rts-gpios {
798 rockchip,pins = <3 11 RK_FUNC_GPIO &pcfg_pull_none>;
804 phy-supply = <&vcc_phy>;
806 clock_in_out = "input";
807 snps,reset-gpio = <&gpio2 15 GPIO_ACTIVE_LOW>;
808 snps,reset-active-low;
809 snps,reset-delays-us = <0 10000 50000>;
810 assigned-clocks = <&cru SCLK_MAC>;
811 assigned-clock-parents = <&ext_gmac>;
812 pinctrl-names = "default";
813 pinctrl-0 = <&rgmii_pins>;
820 phy-supply = <&vbus_host>;
824 otg_drv_gpio = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO_B2 = 10 */
826 rockchip,remote_wakeup;
827 rockchip,usb_irq_wakeup;
831 assigned-clocks = <&cru SCLK_USBPHY480M>;
832 assigned-clock-parents = <&u2phy>;
841 clocks = <&cru SCLK_OTG_PHY0>, <&cru HCLK_OTG>;
842 clock-names = "sclk_otgphy0", "otg";
843 resets = <&cru SRST_USBOTG_AHB>,
844 <&cru SRST_USBOTG_PHY>,
845 <&cru SRST_USBOTG_CON>;
846 reset-names = "otg_ahb", "otg_phy", "otg_controller";
847 /* 0 - Normal, 1 - Force Host, 2 - Force Device */
848 rockchip,usb-mode = <0>;
857 cpu-supply = <&syr827>;
861 mali-supply = <&vdd_logic>;