arch/arm64/boot/dts/rockchip/rk3328-evb.dts

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This library is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This library is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 /dts-v1/;
  44 #include "rk3328.dtsi"
  45
  46 / {
  47         model = "Rockchip RK3328 EVB";
  48         compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
  49
  50         chosen {
  51                 bootargs = "rockchip_jtag earlyprintk=uart8250-32bit,0xff130000";
  52         };
  53
  54         fiq-debugger {
  55                 compatible = "rockchip,fiq-debugger";
  56                 rockchip,serial-id = <2>;
  57                 rockchip,signal-irq = <159>;
  58                 rockchip,wake-irq = <0>;
  59                 /* If enable uart uses irq instead of fiq */
  60                 rockchip,irq-mode-enable = <0>;
  61                 rockchip,baudrate = <1500000>;  /* Only 115200 and 1500000 */
  62                 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>;
  63                 status = "okay";
  64         };
  65
  66         gmac_clkin: external-gmac-clock {
  67                 compatible = "fixed-clock";
  68                 clock-frequency = <125000000>;
  69                 clock-output-names = "gmac_clkin";
  70                 #clock-cells = <0>;
  71         };
  72
  73         vcc_phy: vcc-phy-regulator {
  74                 compatible = "regulator-fixed";
  75                 regulator-name = "vcc_phy";
  76                 regulator-always-on;
  77                 regulator-boot-on;
  78         };
  79
  80         sdio_pwrseq: sdio-pwrseq {
  81                 compatible = "mmc-pwrseq-simple";
  82                 pinctrl-names = "default";
  83                 pinctrl-0 = <&wifi_enable_h>;
  84
  85                 /*
  86                  * On the module itself this is one of these (depending
  87                  * on the actual card populated):
  88                  * - SDIO_RESET_L_WL_REG_ON
  89                  * - PDN (power down when low)
  90                  */
  91                 reset-gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
  92         };
  93
  94         wireless-wlan {
  95                 compatible = "wlan-platdata";
  96                 rockchip,grf = <&grf>;
  97                 wifi_chip_type = "ap6354";
  98                 sdio_vref = <1800>;
  99                 WIFI,host_wake_irq = <&gpio1 19 GPIO_ACTIVE_HIGH>;
 100                 status = "okay";
 101         };
 102
 103         sound {
 104                 compatible = "simple-audio-card";
 105                 simple-audio-card,format = "i2s";
 106                 simple-audio-card,mclk-fs = <256>;
 107                 simple-audio-card,name = "rockchip,rk3328";
 108                 simple-audio-card,cpu {
 109                         sound-dai = <&i2s1>;
 110                 };
 111                 simple-audio-card,codec {
 112                         sound-dai = <&codec>;
 113                 };
 114         };
 115
 116         spdif-sound {
 117                 compatible = "simple-audio-card";
 118                 simple-audio-card,name = "rockchip,spdif";
 119                 simple-audio-card,cpu {
 120                         sound-dai = <&spdif>;
 121                 };
 122                 simple-audio-card,codec {
 123                         sound-dai = <&spdif_out>;
 124                 };
 125         };
 126
 127         spdif_out: spdif-out {
 128                 compatible = "linux,spdif-dit";
 129                 #sound-dai-cells = <0>;
 130         };
 131 };
 132
 133 &i2s1 {
 134         #sound-dai-cells = <0>;
 135         status = "okay";
 136 };
 137
 138 &codec {
 139         #sound-dai-cells = <0>;
 140         status = "okay";
 141 };
 142
 143 &spdif {
 144         #sound-dai-cells = <0>;
 145         status = "okay";
 146 };
 147
 148 &cpu0 {
 149         cpu-supply = <&vdd_arm>;
 150 };
 151
 152 &sdio {
 153         bus-width = <4>;
 154         cap-sd-highspeed;
 155         cap-sdio-irq;
 156         disable-wp;
 157         keep-power-in-suspend;
 158         max-frequency = <150000000>;
 159         mmc-pwrseq = <&sdio_pwrseq>;
 160         non-removable;
 161         num-slots = <1>;
 162         pinctrl-names = "default";
 163         pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
 164         supports-sdio;
 165         status = "okay";
 166 };
 167
 168 &sdmmc {
 169         bus-width = <4>;
 170         cap-mmc-highspeed;
 171         cap-sd-highspeed;
 172         disable-wp;
 173         max-frequency = <150000000>;
 174         num-slots = <1>;
 175         pinctrl-names = "default";
 176         pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
 177         supports-sd;
 178         status = "okay";
 179 };
 180
 181 &emmc {
 182         bus-width = <8>;
 183         cap-mmc-highspeed;
 184         supports-emmc;
 185         disable-wp;
 186         non-removable;
 187         num-slots = <1>;
 188         pinctrl-names = "default";
 189         pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
 190         status = "okay";
 191 };
 192
 193 &gmac2io {
 194         phy-supply = <&vcc_phy>;
 195         phy-mode = "rgmii";
 196         clock_in_out = "input";
 197         snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
 198         snps,reset-active-low;
 199         snps,reset-delays-us = <0 10000 50000>;
 200         assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
 201         assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
 202         pinctrl-names = "default";
 203         pinctrl-0 = <&rgmiim1_pins>;
 204         tx_delay = <0x26>;
 205         rx_delay = <0x11>;
 206         status = "disabled";
 207 };
 208
 209 &gpu {
 210         status = "okay";
 211         mali-supply = <&vdd_logic>;
 212 };
 213
 214 &io_domains {
 215         status = "okay";
 216
 217         vccio1-supply = <&vcc_io>;
 218         vccio2-supply = <&vcc_18emmc>;
 219         vccio3-supply = <&vcc_io>;
 220         vccio4-supply = <&vdd_18>;
 221         vccio5-supply = <&vcc_io>;
 222         vccio6-supply = <&vcc_io>;
 223         pmuio-supply = <&vcc_io>;
 224 };
 225
 226 &tsadc {
 227         status = "okay";
 228 };
 229
 230 &u2phy {
 231         otg-vbus-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
 232         status = "okay";
 233
 234         u2phy_host: host-port {
 235                 status = "okay";
 236         };
 237
 238         u2phy_otg: otg-port {
 239                 status = "okay";
 240         };
 241 };
 242
 243 &u3phy {
 244         vbus-drv-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
 245         status = "okay";
 246 };
 247
 248 &u3phy_utmi {
 249         status = "okay";
 250 };
 251
 252 &u3phy_pipe {
 253         status = "okay";
 254 };
 255
 256 &usb20_otg {
 257         dr_mode = "peripheral";
 258         status = "okay";
 259 };
 260
 261 &usb_host0_ehci {
 262         status = "okay";
 263 };
 264
 265 &usb_host0_ohci {
 266         status = "okay";
 267 };
 268
 269 &usbdrd3 {
 270         status = "okay";
 271 };
 272
 273 &usbdrd_dwc3 {
 274         status = "okay";
 275 };
 276
 277 &i2c1 {
 278         status = "okay";
 279
 280         rk805: rk805@18 {
 281                 compatible = "rockchip,rk805";
 282                 status = "okay";
 283                 reg = <0x18>;
 284                 interrupt-parent = <&gpio2>;
 285                 interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
 286                 pinctrl-names = "default";
 287                 pinctrl-0 = <&pmic_int_l>;
 288                 rockchip,system-power-controller;
 289                 wakeup-source;
 290                 gpio-controller;
 291                 #gpio-cells = <2>;
 292
 293                 rtc {
 294                         status = "disabled";
 295                 };
 296
 297                 pwrkey {
 298                         status = "disabled";
 299                 };
 300
 301                 gpio {
 302                         status = "okay";
 303                 };
 304
 305                 regulators {
 306                         compatible = "rk805-regulator";
 307                         status = "okay";
 308                         #address-cells = <1>;
 309                         #size-cells = <0>;
 310
 311                         vdd_logic: RK805_DCDC1@0 {
 312                                 regulator-compatible = "RK805_DCDC1";
 313                                 regulator-name = "vdd_logic";
 314                                 regulator-min-microvolt = <712500>;
 315                                 regulator-max-microvolt = <1450000>;
 316                                 regulator-initial-mode = <0x1>;
 317                                 regulator-ramp-delay = <12500>;
 318                                 regulator-boot-on;
 319                                 regulator-always-on;
 320                                 regulator-state-mem {
 321                                         regulator-mode = <0x2>;
 322                                         regulator-on-in-suspend;
 323                                         regulator-suspend-microvolt = <1000000>;
 324                                 };
 325                         };
 326
 327                         vdd_arm: RK805_DCDC2@1 {
 328                                 regulator-compatible = "RK805_DCDC2";
 329                                 regulator-name = "vdd_arm";
 330                                 regulator-min-microvolt = <712500>;
 331                                 regulator-max-microvolt = <1450000>;
 332                                 regulator-initial-mode = <0x1>;
 333                                 regulator-ramp-delay = <12500>;
 334                                 regulator-boot-on;
 335                                 regulator-always-on;
 336                                 regulator-state-mem {
 337                                         regulator-mode = <0x2>;
 338                                         regulator-on-in-suspend;
 339                                         regulator-suspend-microvolt = <950000>;
 340                                 };
 341                         };
 342
 343                         vcc_ddr: RK805_DCDC3@2 {
 344                                 regulator-compatible = "RK805_DCDC3";
 345                                 regulator-name = "vcc_ddr";
 346                                 regulator-initial-mode = <0x1>;
 347                                 regulator-boot-on;
 348                                 regulator-always-on;
 349                                 regulator-state-mem {
 350                                         regulator-mode = <0x2>;
 351                                         regulator-on-in-suspend;
 352                                 };
 353                         };
 354
 355                         vcc_io: RK805_DCDC4@3 {
 356                                 regulator-compatible = "RK805_DCDC4";
 357                                 regulator-name = "vcc_io";
 358                                 regulator-min-microvolt = <3300000>;
 359                                 regulator-max-microvolt = <3300000>;
 360                                 regulator-initial-mode = <0x1>;
 361                                 regulator-boot-on;
 362                                 regulator-always-on;
 363                                 regulator-state-mem {
 364                                         regulator-mode = <0x2>;
 365                                         regulator-on-in-suspend;
 366                                         regulator-suspend-microvolt = <3300000>;
 367                                 };
 368                         };
 369
 370                         vdd_18: RK805_LDO1@4 {
 371                                 regulator-compatible = "RK805_LDO1";
 372                                 regulator-name = "vdd_18";
 373                                 regulator-min-microvolt = <1800000>;
 374                                 regulator-max-microvolt = <1800000>;
 375                                 regulator-boot-on;
 376                                 regulator-always-on;
 377                                 regulator-state-mem {
 378                                         regulator-on-in-suspend;
 379                                         regulator-suspend-microvolt = <1800000>;
 380                                 };
 381                         };
 382
 383                         vcc_18emmc: RK805_LDO2@5 {
 384                                 regulator-compatible = "RK805_LDO2";
 385                                 regulator-name = "vcc_18emmc";
 386                                 regulator-min-microvolt = <1800000>;
 387                                 regulator-max-microvolt = <1800000>;
 388                                 regulator-boot-on;
 389                                 regulator-always-on;
 390                                 regulator-state-mem {
 391                                         regulator-on-in-suspend;
 392                                         regulator-suspend-microvolt = <1800000>;
 393                                 };
 394                         };
 395
 396                         vdd_10: RK805_LDO3@6 {
 397                                 regulator-compatible = "RK805_LDO3";
 398                                 regulator-name = "vdd_10";
 399                                 regulator-min-microvolt = <1000000>;
 400                                 regulator-max-microvolt = <1000000>;
 401                                 regulator-boot-on;
 402                                 regulator-always-on;
 403                                 regulator-state-mem {
 404                                         regulator-on-in-suspend;
 405                                         regulator-suspend-microvolt = <1000000>;
 406                                 };
 407                         };
 408                 };
 409         };
 410 };
 411
 412 &pinctrl {
 413         pmic {
 414                 pmic_int_l: pmic-int-l {
 415                 rockchip,pins =
 416                         <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;  /* gpio2_a6 */
 417                 };
 418         };
 419
 420         sdio-pwrseq {
 421                 wifi_enable_h: wifi-enable-h {
 422                 rockchip,pins =
 423                         <1 18 RK_FUNC_GPIO &pcfg_pull_none>;
 424                 };
 425         };
 426 };