arch/arm64/boot/dts/rk3368-p9_818.dts

   1 /dts-v1/;
   2
   3 #include <dt-bindings/interrupt-controller/arm-gic.h>
   4 #include <dt-bindings/rkfb/rk_fb.h>
   5 #include "rk3368.dtsi"
   6 #include "../../../arm/boot/dts/lcd-ld089wu1-mipi.dtsi"
   7 / {
   8         chosen {
   9                 bootargs = "earlyprintk=uart8250-32bit,0xff690000";
  10         };
  11
  12         wireless-wlan {
  13                 compatible = "wlan-platdata";
  14
  15                 rockchip,grf = <&grf>;
  16
  17                 /* wifi_chip_type - wifi chip define
  18                  * ap6210, ap6330, ap6335
  19                  * rtl8188eu, rtl8723bs, rtl8723bu
  20                  * esp8089
  21                 */
  22                 wifi_chip_type = "ap6210";
  23
  24                 sdio_vref = <1800>; //1800mv or 3300mv
  25                 power_pmu_regulator = "vccio_wl";
  26                 power_pmu_enable_level = <1>; //1->HIGH, 0->LOW
  27
  28                 //vref_ctrl_enable;
  29                 vref_pmu_regulator = "vccio_wl";
  30                 vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW
  31
  32                 WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>;
  33                 WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>;
  34
  35                 status = "okay";
  36         };
  37
  38         wireless-bluetooth {
  39                 compatible = "bluetooth-platdata";
  40                 uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>;
  41                 pinctrl-names = "default","rts_gpio";
  42                 pinctrl-0 = <&uart0_rts>;
  43                 pinctrl-1 = <&uart0_rts_gpio>;
  44
  45                 BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>;
  46                 BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>;
  47                 BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>;
  48                 BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>;
  49
  50                 status = "okay";
  51         };
  52
  53         hallsensor {
  54                compatible = "hall_och165t";
  55                type = <SENSOR_TYPE_HALL>;
  56                irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>;
  57         };
  58
  59         backlight: backlight {
  60                 compatible = "pwm-backlight";
  61                 pwms = <&pwm0 0 25000>;
  62                 brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
  63                 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41
  64                 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
  65                 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87
  66                 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109
  67                 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128
  68                 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147
  69                 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166
  70                 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185
  71                 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204
  72                 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223
  73                 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242
  74                 243 244 245 246 247 248 249 250 251 252 253 254 255>;
  75                 default-brightness-level = <128>;
  76                 enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>;
  77         };
  78
  79         pwm_regulator {
  80                 compatible = "rockchip_pwm_regulator";
  81                 pwms = <&pwm1 0 2000>;
  82                 rockchip,pwm_id= <1>;
  83                 rockchip,pwm_voltage_map= <925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>;
  84                 rockchip,pwm_voltage= <1000000>;
  85                 rockchip,pwm_min_voltage= <925000>;
  86                 rockchip,pwm_max_voltage= <1400000>;
  87                 rockchip,pwm_suspend_voltage= <950000>;
  88                 rockchip,pwm_coefficient= <475>;
  89                 regulators {
  90                         #address-cells = <1>;
  91                         #size-cells = <0>;
  92                         pwm_reg0: regulator@0 {
  93                                 regulator-compatible = "pwm_dcdc1";
  94                                 regulator-name= "vdd_logic";
  95                                 regulator-min-microvolt = <925000>;
  96                                 regulator-max-microvolt = <1400000>;
  97                                 regulator-always-on;
  98                                 regulator-boot-on;
  99                         };
 100                 };
 101         };
 102
 103         codec_hdmi_i2s: codec-hdmi-i2s {
 104                 compatible = "hdmi-i2s";
 105         };
 106
 107         codec_hdmi_spdif: codec-hdmi-spdif {
 108                 compatible = "hdmi-spdif";
 109         };
 110
 111         rockchip-hdmi-i2s {
 112                 compatible = "rockchip-hdmi-i2s";
 113                 dais {
 114                         dai0 {
 115                                 audio-codec = <&codec_hdmi_i2s>;
 116                                 audio-controller = <&i2s0>;
 117                                 format = "i2s";
 118                         };
 119                 };
 120         };
 121
 122         rockchip-hdmi-spdif {
 123                 compatible = "rockchip-hdmi-spdif";
 124                 dais {
 125                         dai0 {
 126                                 audio-codec = <&codec_hdmi_spdif>;
 127                                 audio-controller = <&spdif>;
 128                         };
 129                 };
 130         };
 131
 132         rockchip-es8316 {
 133                 compatible = "rockchip-es8316";
 134                 dais {
 135                         dai0 {
 136                                 audio-codec = <&es8316>;
 137                                 audio-controller = <&i2s0>;
 138                                 format = "i2s";
 139                         };
 140                 };
 141         };
 142
 143         io-domains {
 144                 compatible = "rockchip,rk3368-io-voltage-domain";
 145                 rockchip,grf = <&grf>;
 146                 rockchip,pmugrf = <&pmugrf>;
 147
 148                 /*GRF_IO_VSEL*/
 149                 gpio30-supply = <&rk818_dcdc4_reg>;     /*APIO1_VDD*/
 150                 wifi-supply = <&rk818_ldo8_reg>;     /*APIO2_VDD*/
 151                 audio-supply = <&rk818_dcdc4_reg>;   /*APIO3_VDD*/
 152                 gpio1830-supply = <&rk818_dcdc4_reg>;   /*ADIO4_VDD*/
 153                 sdcard-supply = <&rk818_ldo9_reg>;   /*SDMMC_VDD*/
 154
 155                 /*PMU_GRF_IO_VSEL*/
 156                 pmu-supply = <&rk818_ldo5_reg>;      /*PMUIO_VDD*/
 157                 vop-supply = <&rk818_ldo5_reg>;      /*LCDC_VDD*/
 158         };
 159 };
 160
 161 &tsadc {
 162        tsadc-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
 163        //tsadc-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
 164        status = "okay";
 165 };
 166
 167 &pinctrl {
 168         //used for init some gpio
 169         init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
 170
 171         gpio0_gpio {
 172                         gpio0_c7: gpio0-c7 {
 173                                 rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>;
 174                         };
 175                         gpio0_a3: gpio0-a3 {
 176                                 rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>;
 177                         };
 178                         gpio0_c2: gpio0-c2 {
 179                                 rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>;
 180                         };
 181                         gpio0_c3: gpio0-c3{
 182                                 rockchip,pins = <0 GPIO_C3 RK_FUNC_GPIO &pcfg_pull_down>;
 183                         };
 184
 185                         gpio0_c1: gpio0-c1 {
 186                                 rockchip,pins = <0 GPIO_C1 RK_FUNC_GPIO &pcfg_pull_up>;
 187                         };
 188                         //to add
 189                 };
 190
 191 };
 192
 193 &nandc0 {
 194         status = "disabled"; // used nand set "disabled" ,used emmc set "okay"
 195 };
 196
 197 &nandc0reg {
 198         status = "okay"; // used nand set "disabled" ,used emmc set "okay"
 199 };
 200
 201 &emmc {
 202         clock-frequency = <150000000>;
 203         clock-freq-min-max = <400000 150000000>;
 204
 205         supports-highspeed;
 206         supports-emmc;
 207         bootpart-no-access;
 208
 209         //supports-sd;
 210         supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board.
 211         caps2-mmc-hs200;
 212
 213         ignore-pm-notify;
 214         keep-power-in-suspend;
 215
 216         //poll-hw-reset
 217         status = "okay";
 218 };
 219
 220 &sdmmc {
 221         clock-frequency = <50000000>;
 222         clock-freq-min-max = <400000 50000000>;
 223         supports-highspeed;
 224         supports-sd;
 225         broken-cd;
 226         card-detect-delay = <200>;
 227
 228         ignore-pm-notify;
 229         keep-power-in-suspend;
 230
 231         vmmc-supply = <&rk818_ldo1_reg>;
 232                 status = "okay";
 233 };
 234
 235 &sdio {
 236         clock-frequency = <50000000>;
 237         clock-freq-min-max = <200000 50000000>;
 238         supports-highspeed;
 239         supports-sdio;
 240         ignore-pm-notify;
 241         keep-power-in-suspend;
 242         //cap-sdio-irq;
 243         status = "okay";
 244 };
 245
 246 &dsihost0{
 247         status = "okay";
 248 };
 249
 250 &spi0 {
 251         status = "disabled";
 252 };
 253
 254 &spi1 {
 255         status = "disabled";
 256 };
 257
 258 &spi2 {
 259         status = "disabled";
 260 };
 261
 262 &gmac {
 263         status = "disabled";
 264 };
 265
 266 &uart_dbg {
 267         status = "okay";
 268 };
 269
 270 &uart_bt {
 271         status = "okay";
 272         dma-names = "!tx", "!rx";
 273         pinctrl-0 = <&uart0_xfer &uart0_cts>;
 274 };
 275
 276 &i2c0 {
 277         status = "okay";
 278         syr827: syr827@40 {
 279                 compatible = "silergy,syr82x";
 280                 reg = <0x40>;
 281                 status = "okay";
 282                 regulators {
 283                         #address-cells = <1>;
 284                         #size-cells = <0>;
 285                         syr827_dc1: regulator@0 {
 286                         reg = <0>;
 287                         regulator-compatible = "syr82x_dcdc1";
 288                         regulator-name = "vdd_arm";
 289                         regulator-min-microvolt = <712500>;
 290                         regulator-max-microvolt = <1500000>;
 291                         regulator-always-on;
 292                         regulator-boot-on;
 293                         regulator-initial-mode = <0x2>;
 294                         regulator-initial-state = <3>;
 295                         regulator-state-mem {
 296                                 regulator-state-mode = <0x2>;
 297                                 regulator-state-disabled;
 298                                 regulator-state-uv = <900000>;
 299                         };
 300                 };
 301            };
 302         };
 303         syr828: syr828@41 {
 304                 compatible = "silergy,syr82x";
 305                 reg = <0x41>;
 306                 status = "okay";
 307                 regulators {
 308                         #address-cells = <1>;
 309                         #size-cells = <0>;
 310                         syr828_dc1: regulator@0 {
 311                         reg = <0>;
 312                         regulator-compatible = "syr82x_dcdc1";
 313                         regulator-name = "vdd_gpu";
 314                         regulator-min-microvolt = <712500>;
 315                         regulator-max-microvolt = <1500000>;
 316                         regulator-always-on;
 317                         regulator-boot-on;
 318                         regulator-initial-mode = <0x2>;
 319                         regulator-initial-state = <3>;
 320                         regulator-state-mem {
 321                                 regulator-state-mode = <0x2>;
 322                                 regulator-state-enabled;
 323                                 regulator-state-uv = <900000>;
 324                         };
 325                 };
 326            };
 327         };
 328
 329         rk818: rk818@1c {
 330                 reg = <0x1c>;
 331                 status = "okay";
 332                 compatible = "rockchip,rk818";
 333                 battery {
 334                         ocv_table = <3400 3650 3693 3707 3731 3749 3760
 335                                      3770 3782 3796 3812 3829 3852 3882
 336                                      3915 3951 3981 4047 4086 4132 4182>;
 337                         design_capacity = <8650>;
 338                         design_qmax = <8800>;
 339                         max_overcharge = <100>;
 340                         bat_res = <85>;
 341                         max_input_currentmA  = <2000>;
 342                         max_chrg_currentmA = <1800>;
 343                         max_charge_voltagemV = <4200>;
 344                         max_bat_voltagemV = <4200>;
 345                         sleep_enter_current = <600>;
 346                         sleep_exit_current = <600>;
 347                         power_off_thresd = <3400>;
 348                         chrg_diff_voltagemV = <0>;
 349                         virtual_power = <0>;
 350                         support_usb_adp = <1>;
 351                         support_dc_adp = <1>;
 352                         dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>;
 353                 };
 354         };
 355 };
 356
 357 &i2c1 {
 358         status = "okay";
 359         es8316: es8316@10 {
 360                 compatible = "es8316";
 361                 reg = <0x10>;
 362                 spk-con-gpio = <&gpio0 GPIO_C3 GPIO_ACTIVE_HIGH>;
 363                 hp-det-gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_HIGH>;
 364                 status = "okay";
 365         };
 366 };
 367
 368 &i2c2 {
 369         status = "okay";
 370         touchscreen@14 {
 371                 compatible = "goodix,gt9xx";
 372                 reg = <0x14>;
 373                 touch-gpio = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>;
 374                 reset-gpio = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>;
 375                 max-x = <1920>;
 376                 max-y = <1200>;
 377                 tp-size = <89>;
 378         };
 379 };
 380
 381 &i2c3 {
 382         status = "okay";
 383 };
 384
 385 &i2c4 {
 386         status = "okay";
 387         mpu6500_acc:mpu_acc@68{
 388                 compatible = "mpu6500_acc";
 389                 reg = <0x68>;
 390                 irq_enable = <0>;
 391                 poll_delay_ms = <30>;
 392                 type = <SENSOR_TYPE_ACCEL>;
 393                 layout = <7>;
 394         };
 395 };
 396
 397 &i2c5 {
 398         status = "disabled";
 399 };
 400
 401 &fb {
 402         status = "okay";
 403         rockchip,disp-mode = <NO_DUAL>;
 404         rockchip,uboot-logo-on = <0>;
 405 };
 406
 407 &rk_screen {
 408         status = "okay";
 409         display-timings = <&disp_timings>;
 410 };
 411
 412 &lcdc {
 413         status = "okay";
 414         backlight = <&backlight>;
 415         rockchip,mirror = <NO_MIRROR>;
 416         rockchip,cabc_mode = <0>;
 417         rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
 418         power_ctr: power_ctr {
 419                 rockchip,debug = <0>;
 420                 lcd_en:lcd_en {
 421                         rockchip,power_type = <GPIO>;
 422                         gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>;
 423                         rockchip,delay = <120>;
 424                 };
 425
 426                 lcd_cs:lcd_cs {
 427                         rockchip,power_type = <GPIO>;
 428                         gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>;
 429                         rockchip,delay = <10>;
 430                 };
 431
 432                 /*lcd_rst:lcd_rst {
 433                         rockchip,power_type = <GPIO>;
 434                         gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
 435                         rockchip,delay = <5>;
 436                 };*/
 437         };
 438 };
 439
 440
 441 &hdmi {
 442         status = "okay";
 443 };
 444
 445 &adc {
 446         status = "okay";
 447
 448         rockchip_headset {
 449                 compatible = "rockchip_headset";
 450                 headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>;
 451                 pinctrl-names = "default";
 452                 pinctrl-0 = <&gpio0_c7>;//gpio0_c7
 453                 io-channels = <&adc 2>;
 454        /*
 455                hook_gpio = ;
 456                hook_down_type = ; //interrupt hook key down status
 457                 */
 458        };
 459
 460         key {
 461                 compatible = "rockchip,key";
 462                 io-channels = <&adc 1>;
 463
 464                 vol-up-key {
 465                         linux,code = <115>;
 466                         label = "volume up";
 467                         rockchip,adc_value = <1>;
 468                 };
 469
 470                 vol-down-key {
 471                         linux,code = <114>;
 472                         label = "volume down";
 473                         rockchip,adc_value = <170>;
 474                 };
 475
 476                 power-key {
 477                         gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
 478                         linux,code = <116>;
 479                         label = "power";
 480                         gpio-key,wakeup;
 481                 };
 482         };
 483 };
 484
 485 &pwm0 {
 486         status = "okay";
 487 };
 488
 489 &pwm1 {
 490         status = "disabled";
 491 };
 492
 493 &clk_core_b_dvfs_table {
 494         operating-points = <
 495                 /* KHz    uV */
 496                 216000 950000
 497                 312000 950000
 498                 408000 950000
 499                 600000 950000
 500                 696000 950000
 501                 816000 975000
 502                 1008000 1050000
 503                 1200000 1150000
 504                 1296000 1200000
 505                 >;
 506         status = "okay";
 507 };
 508
 509 &clk_core_l_dvfs_table {
 510         operating-points = <
 511                 /* KHz    uV */
 512                 216000 950000
 513                 312000 950000
 514                 408000 950000
 515                 600000 950000
 516                 696000 975000
 517                 816000 1025000
 518                 1008000 1125000
 519                 >;
 520         status = "okay";
 521 };
 522
 523 &clk_gpu_dvfs_table {
 524         operating-points = <
 525                 /* KHz    uV */
 526                 200000 950000
 527                 288000 1075000
 528                 400000 1100000
 529                 576000 1200000
 530                 >;
 531 };
 532
 533 &clk_ddr_dvfs_table {
 534         operating-points = <
 535                 /* KHz    uV */
 536                 96000  950000
 537                 192000 950000
 538                 300000 1025000
 539                 324000 1025000
 540                 396000 1050000
 541                 528000 1100000
 542                 600000 1125000
 543                 696000 1150000
 544                 792000 1175000
 545                 >;
 546
 547         freq-table = <
 548                 /*status                freq(KHz)*/
 549                 SYS_STATUS_NORMAL       528000
 550                 SYS_STATUS_SUSPEND      192000
 551                 SYS_STATUS_VIDEO_1080P  300000
 552                 SYS_STATUS_VIDEO_4K     600000
 553                 SYS_STATUS_PERFORMANCE  792000
 554                 SYS_STATUS_DUALVIEW     600000
 555                 SYS_STATUS_BOOST        400000
 556                 SYS_STATUS_ISP          533000
 557                 >;
 558         auto-freq-table = <
 559                 240000
 560                 324000
 561                 396000
 562                 528000
 563                 >;
 564         auto-freq=<0>;
 565         status="okay";
 566 };
 567
 568 &dwc_control_usb {
 569         host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>;
 570         otg_drv_gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>;
 571         rockchip,remote_wakeup;
 572         rockchip,usb_irq_wakeup;
 573 };
 574
 575 /include/ "../../../arm/boot/dts/rk818.dtsi"
 576 &rk818 {
 577         gpios =<&gpio0 GPIO_A1 GPIO_ACTIVE_HIGH>,<&gpio0 GPIO_A0 GPIO_ACTIVE_LOW>;
 578         rk818,system-power-controller;
 579         pinctrl-names = "default";
 580         pinctrl-0 = <&gpio0_c1>;
 581         regulators {
 582
 583                 rk818_dcdc1_reg: regulator@0{
 584                         regulator-name= "vdd_arm";/*vcc arm*/
 585                         regulator-min-microvolt = <700000>;/*<725000>;*/
 586                         regulator-max-microvolt = <1500000>;
 587                         regulator-initial-mode = <0x2>;
 588                         regulator-initial-state = <3>;
 589                         regulator-state-mem {
 590                                 regulator-state-mode = <0x2>;
 591                                 regulator-state-disabled;
 592                                 regulator-state-uv =<900000>;
 593                         };
 594                 };
 595
 596                 rk818_dcdc2_reg: regulator@1 {
 597                         regulator-name= "vdd_logic";/*vcc gpu*/
 598                         regulator-min-microvolt = <700000>;
 599                         regulator-max-microvolt = <1200000>;
 600                         regulator-initial-mode = <0x2>;
 601                         regulator-initial-state = <3>;
 602                         regulator-state-mem {
 603                                 regulator-state-mode = <0x2>;
 604                                 regulator-state-enabled;
 605                                 regulator-state-uv = <1200000>;
 606                         };
 607                 };
 608
 609                 rk818_dcdc3_reg: regulator@2 {
 610                         regulator-name= "vcc_ddr";
 611                         regulator-min-microvolt = <1200000>;
 612                         regulator-max-microvolt = <1200000>;
 613                         regulator-initial-mode = <0x2>;
 614                         regulator-initial-state = <3>;
 615                         regulator-state-mem {
 616                                 regulator-state-mode = <0x2>;
 617                                 regulator-state-enabled;
 618                                 regulator-state-uv = <1200000>;
 619                         };
 620                 };
 621
 622                 rk818_dcdc4_reg: regulator@3 {
 623                         regulator-name= "vccio";
 624                         regulator-min-microvolt = <3300000>;
 625                         regulator-max-microvolt = <3300000>;
 626                         regulator-initial-mode = <0x2>;
 627                         regulator-initial-state = <3>;
 628                         regulator-state-mem {
 629                                 regulator-state-mode = <0x2>;
 630                                 regulator-state-enabled;
 631                                 regulator-state-uv = <3000000>;
 632                         };
 633                 };
 634
 635                 rk818_ldo1_reg: regulator@4 {
 636                         regulator-name= "vcc_codec";
 637                         regulator-min-microvolt = <3300000>;
 638                         regulator-max-microvolt = <3300000>;
 639                         regulator-initial-state = <3>;
 640                         regulator-state-mem {
 641                                 regulator-state-disabled;
 642                                 regulator-state-uv = <3300000>;
 643                         };
 644                 };
 645
 646                 rk818_ldo2_reg: regulator@5 {
 647                         regulator-name= "vcc_tp";
 648                         regulator-min-microvolt = <3300000>;
 649                         regulator-max-microvolt = <3300000>;
 650                         regulator-initial-state = <3>;
 651                         regulator-state-mem {
 652                                 regulator-state-disabled;
 653                                 regulator-state-uv = <3300000>;
 654                         };
 655                 };
 656
 657                 rk818_ldo3_reg: regulator@6 {
 658                         regulator-name= "vdd_10";
 659                         regulator-min-microvolt = <1000000>;
 660                         regulator-max-microvolt = <1000000>;
 661                         regulator-initial-state = <3>;
 662                         regulator-state-mem {
 663                                 regulator-state-enabled;
 664                                 regulator-state-uv = <1000000>;
 665                         };
 666                 };
 667
 668                 rk818_ldo4_reg:regulator@7 {
 669                         regulator-name= "vcc18_lcd";
 670                         regulator-min-microvolt = <1800000>;
 671                         regulator-max-microvolt = <1800000>;
 672                         regulator-initial-state = <3>;
 673                         regulator-state-mem {
 674                                 regulator-state-disabled;
 675                                 regulator-state-uv = <1800000>;
 676                         };
 677                 };
 678
 679                 rk818_ldo5_reg: regulator@8 {
 680                         regulator-name= "vccio_pmu";
 681                         regulator-min-microvolt = <1800000>;
 682                         regulator-max-microvolt = <1800000>;
 683                         regulator-initial-state = <3>;
 684                         regulator-state-mem {
 685                                 regulator-state-enabled;
 686                                 regulator-state-uv = <1800000>;
 687                         };
 688                 };
 689
 690                 rk818_ldo6_reg: regulator@9 {
 691                         regulator-name= "vdd10_lcd";
 692                         regulator-min-microvolt = <1000000>;
 693                         regulator-max-microvolt = <1000000>;
 694                         regulator-initial-state = <3>;
 695                         regulator-state-mem {
 696                                 regulator-state-disabled;
 697                                 regulator-state-uv = <1000000>;
 698                         };
 699                 };
 700
 701                 rk818_ldo7_reg: regulator@10 {
 702                         regulator-name= "vcc_18";
 703                         regulator-min-microvolt = <1800000>;
 704                         regulator-max-microvolt = <1800000>;
 705                         regulator-initial-state = <3>;
 706                         regulator-state-mem {
 707                                 regulator-state-enabled;
 708                                 regulator-state-uv = <1800000>;
 709                         };
 710                 };
 711
 712                 rk818_ldo8_reg: regulator@11 {
 713                         regulator-name= "vccio_wl";
 714                         regulator-min-microvolt = <1800000>;
 715                         regulator-max-microvolt = <1800000>;
 716                         regulator-initial-state = <3>;
 717                         regulator-state-mem {
 718                                 regulator-state-enabled;
 719                                 regulator-state-uv = <1800000>;
 720                         };
 721                 };
 722
 723                 rk818_ldo9_reg: regulator@12 {
 724                         regulator-name= "vcc_sd";
 725                         regulator-min-microvolt = <1800000>;
 726                         regulator-max-microvolt = <3300000>;
 727                         regulator-initial-state = <3>;
 728                         regulator-state-mem {
 729                                 regulator-state-enabled;
 730                                 regulator-state-uv = <3300000>;
 731                         };
 732                 };
 733
 734                 rk818_ldo10_reg: regulator@13 {
 735                         regulator-name= "rk818_ldo10";
 736                         regulator-state-mem {
 737                                 regulator-state-disabled;
 738                         };
 739                 };
 740         };
 741 };
 742
 743 &ion_cma {
 744        reg = <0x00000000 0x00000000>; /* 0MB */
 745 };
 746
 747 &rockchip_clocks_init {
 748         rockchip,clocks-init-rate =
 749                 <&clk_gpll 576000000>,          <&clk_core_b 792000000>,
 750                 <&clk_core_l 600000000>,        <&clk_cpll 400000000>,
 751                 /*<&clk_npll 500000000>,*/      <&aclk_bus 150000000>,
 752                 <&hclk_bus 75000000>,           <&pclk_bus 75000000>,
 753                 <&clk_crypto 150000000>,        <&aclk_peri 150000000>,
 754                 <&hclk_peri 75000000>,          <&pclk_peri 75000000>,
 755                 <&pclk_alive_pre 100000000>,    <&pclk_pmu_pre 100000000>,
 756                 <&clk_cs 300000000>,            <&clkin_trace 300000000>,
 757                 <&aclk_cci 600000000>,          <&clk_mac 125000000>,
 758                 <&aclk_vio0 400000000>,         <&hclk_vio 100000000>,
 759                 <&aclk_rga_pre 400000000>,      <&clk_rga 400000000>,
 760                 <&clk_isp 400000000>,           <&clk_edp 200000000>,
 761                 <&clk_gpu_core 400000000>,      <&aclk_gpu_mem 400000000>,
 762                 <&aclk_gpu_cfg 400000000>,      <&aclk_vepu 400000000>,
 763                 <&aclk_vdpu 400000000>,         <&clk_hevc_core 300000000>,
 764                 <&clk_hevc_cabac 300000000>;
 765 };
 766