rk3368-p9_818: dts: rename dc det pinctrl name and add virtual_power
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rk3368-p9_818.dts
1 /dts-v1/;
2
3 #include <dt-bindings/interrupt-controller/arm-gic.h>
4 #include <dt-bindings/rkfb/rk_fb.h>
5 #include "rk3368.dtsi"
6 #include "../../../arm/boot/dts/lcd-ld089wu1-mipi.dtsi"
7 / {
8         chosen {
9                 bootargs = "earlyprintk=uart8250-32bit,0xff690000";
10         };
11
12         wireless-wlan {
13                 compatible = "wlan-platdata";
14
15                 rockchip,grf = <&grf>;
16
17                 /* wifi_chip_type - wifi chip define
18                  * ap6210, ap6330, ap6335
19                  * rtl8188eu, rtl8723bs, rtl8723bu
20                  * esp8089
21                 */
22                 wifi_chip_type = "ap6210";              
23
24                 sdio_vref = <1800>; //1800mv or 3300mv
25                 power_pmu_regulator = "rk818_ldo8_reg";
26                 power_pmu_enable_level = <1>; //1->HIGH, 0->LOW
27                 vref_pmu_regulator = "rk818_ldo8_reg";
28                 vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW
29
30                 WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>;
31                 WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>;
32
33                 status = "okay";
34         };
35
36         wireless-bluetooth {
37                 compatible = "bluetooth-platdata";
38                 uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>;
39                 pinctrl-names = "default","rts_gpio";
40                 pinctrl-0 = <&uart0_rts>;
41                 pinctrl-1 = <&uart0_rts_gpio>;
42
43                 BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>;
44                 BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>;
45                 BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>;
46                 BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>;
47
48                 status = "okay";
49         };
50
51         hallsensor {
52                compatible = "hall_och165t";
53                type = <SENSOR_TYPE_HALL>;
54                irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>;
55         };
56
57         backlight: backlight {
58                 compatible = "pwm-backlight";
59                 pwms = <&pwm0 0 25000>;
60                 brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
61                 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41
62                 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
63                 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87
64                 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109
65                 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128
66                 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147
67                 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166
68                 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185
69                 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204
70                 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223
71                 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242
72                 243 244 245 246 247 248 249 250 251 252 253 254 255>;
73                 default-brightness-level = <128>;
74                 enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>;
75         };
76
77         pwm_regulator {
78                 compatible = "rockchip_pwm_regulator";
79                 pwms = <&pwm1 0 2000>;
80                 rockchip,pwm_id= <1>;
81                 rockchip,pwm_voltage_map= <925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>;
82                 rockchip,pwm_voltage= <1000000>;
83                 rockchip,pwm_min_voltage= <925000>;
84                 rockchip,pwm_max_voltage= <1400000>;
85                 rockchip,pwm_suspend_voltage= <950000>;
86                 rockchip,pwm_coefficient= <475>;
87                 regulators {
88                         #address-cells = <1>;
89                         #size-cells = <0>;
90                         pwm_reg0: regulator@0 {
91                                 regulator-compatible = "pwm_dcdc1";
92                                 regulator-name= "vdd_logic";
93                                 regulator-min-microvolt = <925000>;
94                                 regulator-max-microvolt = <1400000>;
95                                 regulator-always-on;
96                                 regulator-boot-on;
97                         };
98                 };
99         };
100
101         codec_hdmi_i2s: codec-hdmi-i2s {
102                 compatible = "hdmi-i2s";
103         };
104
105         codec_hdmi_spdif: codec-hdmi-spdif {
106                 compatible = "hdmi-spdif";
107         };
108
109         rockchip-hdmi-i2s {
110                 compatible = "rockchip-hdmi-i2s";
111                 dais {
112                         dai0 {
113                                 audio-codec = <&codec_hdmi_i2s>;
114                                 audio-controller = <&i2s0>;
115                                 format = "i2s";
116                         };
117                 };
118         };
119
120         rockchip-hdmi-spdif {
121                 compatible = "rockchip-hdmi-spdif";
122                 dais {
123                         dai0 {
124                                 audio-codec = <&codec_hdmi_spdif>;
125                                 audio-controller = <&spdif>;
126                         };
127                 };
128         };
129
130         rockchip-es8316 {
131                 compatible = "rockchip-es8316";
132                 dais {
133                         dai0 {
134                                 audio-codec = <&es8316>;
135                                 audio-controller = <&i2s0>;
136                                 format = "i2s";
137                         };
138                 };
139         };
140
141         io-domains {
142                 compatible = "rockchip,rk3368-io-voltage-domain";
143                 rockchip,grf = <&grf>;
144                 rockchip,pmugrf = <&pmugrf>;
145
146                 /*GRF_IO_VSEL*/
147                 gpio30-supply = <&rk818_dcdc4_reg>;     /*APIO1_VDD*/
148                 wifi-supply = <&rk818_ldo8_reg>;     /*APIO2_VDD*/
149                 audio-supply = <&rk818_dcdc4_reg>;   /*APIO3_VDD*/
150                 gpio1830-supply = <&rk818_dcdc4_reg>;   /*ADIO4_VDD*/
151                 sdcard-supply = <&rk818_ldo9_reg>;   /*SDMMC_VDD*/
152
153                 /*PMU_GRF_IO_VSEL*/
154                 pmu-supply = <&rk818_ldo5_reg>;      /*PMUIO_VDD*/
155                 vop-supply = <&rk818_ldo5_reg>;      /*LCDC_VDD*/
156         };
157 };
158
159 &tsadc {
160        tsadc-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
161        //tsadc-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
162        status = "okay";
163 };
164
165 &pinctrl {
166         //used for init some gpio
167         init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
168
169         gpio0_gpio {
170                         gpio0_c7: gpio0-c7 {
171                                 rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>;
172                         };
173                         gpio0_a3: gpio0-a3 {
174                                 rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>;
175                         };
176                         gpio0_c2: gpio0-c2 {
177                                 rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>;
178                         };
179                         gpio0_c3: gpio0-c3{
180                                 rockchip,pins = <0 GPIO_C3 RK_FUNC_GPIO &pcfg_pull_down>;
181                         };
182
183                         gpio0_c1: gpio0-c1 {
184                                 rockchip,pins = <0 GPIO_C1 RK_FUNC_GPIO &pcfg_pull_up>;
185                         };
186                         //to add
187                 };
188
189 };
190
191 &nandc0 {
192         status = "disabled"; // used nand set "disabled" ,used emmc set "okay"
193 };
194
195 &nandc0reg {
196         status = "okay"; // used nand set "disabled" ,used emmc set "okay"
197 };
198
199 &emmc {
200         clock-frequency = <150000000>;
201         clock-freq-min-max = <400000 150000000>;
202
203         supports-highspeed;
204         supports-emmc;
205         bootpart-no-access;
206
207         //supports-sd;
208         supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board.
209         caps2-mmc-hs200;
210
211         ignore-pm-notify;
212         keep-power-in-suspend;
213
214         //poll-hw-reset
215         status = "okay";
216 };
217
218 &sdmmc {
219         clock-frequency = <50000000>;
220         clock-freq-min-max = <400000 50000000>;
221         supports-highspeed;
222         supports-sd;
223         broken-cd;
224         card-detect-delay = <200>;
225
226         ignore-pm-notify;
227         keep-power-in-suspend;
228
229         vmmc-supply = <&rk818_ldo1_reg>;
230                 status = "okay";
231 };
232
233 &sdio {
234         clock-frequency = <50000000>;
235         clock-freq-min-max = <200000 50000000>;
236         supports-highspeed;
237         supports-sdio;
238         ignore-pm-notify;
239         keep-power-in-suspend;
240         //cap-sdio-irq;
241         status = "okay";
242 };
243
244 &dsihost0{
245         status = "okay";
246 };
247
248 &spi0 {
249         status = "disabled";
250 };
251
252 &spi1 {
253         status = "disabled";
254 };
255
256 &spi2 {
257         status = "disabled";
258 };
259
260 &gmac {
261         status = "disabled";
262 };
263
264 &uart_dbg {
265         status = "okay";
266 };
267
268 &uart_bt {
269         status = "okay";
270         dma-names = "!tx", "!rx";
271         pinctrl-0 = <&uart0_xfer &uart0_cts>;
272 };
273
274 &i2c0 {
275         status = "okay";
276         syr827: syr827@40 {
277                 compatible = "silergy,syr82x";
278                 reg = <0x40>;
279                 status = "okay";
280                 regulators {
281                         #address-cells = <1>;
282                         #size-cells = <0>;
283                         syr827_dc1: regulator@0 {
284                         reg = <0>;
285                         regulator-compatible = "syr82x_dcdc1";
286                         regulator-name = "vdd_arm";
287                         regulator-min-microvolt = <712500>;
288                         regulator-max-microvolt = <1500000>;
289                         regulator-always-on;
290                         regulator-boot-on;
291                         regulator-initial-mode = <0x2>;
292                         regulator-initial-state = <3>;
293                         regulator-state-mem {
294                                 regulator-state-mode = <0x2>;
295                                 regulator-state-disabled;
296                                 regulator-state-uv = <900000>;
297                         };
298                 };
299            };
300         };
301         syr828: syr828@41 {
302                 compatible = "silergy,syr82x";
303                 reg = <0x41>;
304                 status = "okay";
305                 regulators {
306                         #address-cells = <1>;
307                         #size-cells = <0>;
308                         syr828_dc1: regulator@0 {
309                         reg = <0>;
310                         regulator-compatible = "syr82x_dcdc1";
311                         regulator-name = "vdd_gpu";
312                         regulator-min-microvolt = <712500>;
313                         regulator-max-microvolt = <1500000>;
314                         regulator-always-on;
315                         regulator-boot-on;
316                         regulator-initial-mode = <0x2>;
317                         regulator-initial-state = <3>;
318                         regulator-state-mem {
319                                 regulator-state-mode = <0x2>;
320                                 regulator-state-enabled;
321                                 regulator-state-uv = <900000>;
322                         };
323                 };
324            };
325         };
326
327         rk818: rk818@1c {
328                 reg = <0x1c>;
329                 status = "okay";
330                 compatible = "rockchip,rk818";
331                 battery {
332                         ocv_table = <3400 3650 3693 3707 3731 3749 3760
333                                      3770 3782 3796 3812 3829 3852 3882
334                                      3915 3951 3981 4047 4086 4132 4182>;
335                         design_capacity = <8650>;
336                         design_qmax = <8800>;
337                         max_overcharge = <100>;
338                         bat_res = <85>;
339                         max_input_currentmA  = <2000>;
340                         max_chrg_currentmA = <1800>;
341                         max_charge_voltagemV = <4200>;
342                         max_bat_voltagemV = <4200>;
343                         sleep_enter_current = <600>;
344                         sleep_exit_current = <600>;
345                         power_off_thresd = <3400>;
346                         chrg_diff_voltagemV = <0>;
347                         virtual_power = <0>;
348                         support_usb_adp = <1>;
349                         support_dc_adp = <1>;
350                         dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>;
351                 };
352         };
353 };
354
355 &i2c1 {
356         status = "okay";
357         es8316: es8316@10 {
358                 compatible = "es8316";
359                 reg = <0x10>;
360                 spk-con-gpio = <&gpio0 GPIO_C3 GPIO_ACTIVE_HIGH>;
361                 hp-det-gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_HIGH>;
362                 status = "okay";
363         };
364 };
365
366 &i2c2 {
367         status = "okay";
368         touchscreen@14 {
369                 compatible = "goodix,gt9xx";
370                 reg = <0x14>;
371                 touch-gpio = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>;
372                 reset-gpio = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>;  
373                 max-x = <1920>;                  
374                 max-y = <1200>;
375                 tp-size = <89>;
376         };
377 };
378
379 &i2c3 {
380         status = "okay";
381 };
382
383 &i2c4 {
384         status = "okay";
385         mpu6500_acc:mpu_acc@68{
386                 compatible = "mpu6500_acc";
387                 reg = <0x68>;
388                 irq_enable = <0>;
389                 poll_delay_ms = <30>;
390                 type = <SENSOR_TYPE_ACCEL>;
391                 layout = <7>;
392         };
393 };
394
395 &i2c5 {
396         status = "disabled";
397 };
398
399 &fb {
400         status = "okay";
401         rockchip,disp-mode = <NO_DUAL>;
402         rockchip,uboot-logo-on = <0>;
403 };
404
405 &rk_screen {
406         status = "okay";
407         display-timings = <&disp_timings>;
408 };
409
410 &lcdc {
411         status = "okay";
412         backlight = <&backlight>;
413         rockchip,mirror = <NO_MIRROR>;
414         rockchip,cabc_mode = <0>;
415         rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
416         power_ctr: power_ctr {
417                 rockchip,debug = <0>;
418                 lcd_en:lcd_en {
419                         rockchip,power_type = <GPIO>;
420                         gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>;
421                         rockchip,delay = <120>;
422                 };
423
424                 lcd_cs:lcd_cs {
425                         rockchip,power_type = <GPIO>;
426                         gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>;
427                         rockchip,delay = <10>;
428                 };
429
430                 /*lcd_rst:lcd_rst {
431                         rockchip,power_type = <GPIO>;
432                         gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
433                         rockchip,delay = <5>;
434                 };*/
435         };
436 };
437
438
439 &hdmi {
440         status = "okay";
441 };
442
443 &adc {
444         status = "okay";
445
446         rockchip_headset {
447                 compatible = "rockchip_headset";
448                 headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>;
449                 pinctrl-names = "default";
450                 pinctrl-0 = <&gpio0_c7>;//gpio0_c7
451                 io-channels = <&adc 2>;
452        /*
453                hook_gpio = ;
454                hook_down_type = ; //interrupt hook key down status
455                 */
456        };
457
458         key {
459                 compatible = "rockchip,key";
460                 io-channels = <&adc 1>;
461
462                 vol-up-key {
463                         linux,code = <115>;
464                         label = "volume up";
465                         rockchip,adc_value = <1>;
466                 };
467
468                 vol-down-key {
469                         linux,code = <114>;
470                         label = "volume down";
471                         rockchip,adc_value = <170>;
472                 };
473
474                 power-key {
475                         gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
476                         linux,code = <116>;
477                         label = "power";
478                         gpio-key,wakeup;
479                 };
480         };
481 };
482
483 &pwm0 {
484         status = "okay";
485 };
486
487 &pwm1 {
488         status = "disabled";
489 };
490
491 &clk_core_b_dvfs_table {
492         operating-points = <
493                 /* KHz    uV */
494                 216000 950000
495                 312000 950000
496                 408000 950000
497                 600000 950000
498                 696000 950000
499                 816000 975000
500                 1008000 1050000
501                 1200000 1150000
502                 1296000 1200000
503                 >;
504         status = "okay";
505 };
506
507 &clk_core_l_dvfs_table {
508         operating-points = <
509                 /* KHz    uV */
510                 216000 950000
511                 312000 950000
512                 408000 950000
513                 600000 950000
514                 696000 975000
515                 816000 1025000
516                 1008000 1125000
517                 >;
518         status = "okay";
519 };
520
521 &clk_gpu_dvfs_table {
522         operating-points = <
523                 /* KHz    uV */
524                 200000 950000
525                 288000 1025000
526                 400000 1050000
527                 576000 1200000
528                 >;
529 };
530
531 &clk_ddr_dvfs_table {
532         operating-points = <
533                 /* KHz    uV */
534                 96000  950000
535                 192000 950000
536                 300000 1025000
537                 324000 1025000
538                 396000 1050000
539                 528000 1100000
540                 600000 1125000
541                 696000 1150000
542                 792000 1175000
543                 >;
544
545         freq-table = <
546                 /*status                freq(KHz)*/
547                 SYS_STATUS_NORMAL       528000
548                 SYS_STATUS_SUSPEND      192000
549                 SYS_STATUS_VIDEO_1080P  300000
550                 SYS_STATUS_VIDEO_4K     600000
551                 SYS_STATUS_PERFORMANCE  792000
552                 SYS_STATUS_DUALVIEW     600000
553                 SYS_STATUS_BOOST        400000
554                 SYS_STATUS_ISP          533000
555                 >;
556         auto-freq-table = <
557                 240000
558                 324000
559                 396000
560                 528000
561                 >;
562         auto-freq=<0>;
563         status="okay";
564 };
565
566 &dwc_control_usb {
567         host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>;
568         otg_drv_gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>;
569         rockchip,remote_wakeup;
570         rockchip,usb_irq_wakeup;
571 };
572
573 /include/ "../../../arm/boot/dts/rk818.dtsi"
574 &rk818 {
575         gpios =<&gpio0 GPIO_A1 GPIO_ACTIVE_HIGH>,<&gpio0 GPIO_A0 GPIO_ACTIVE_LOW>;
576         rk818,system-power-controller;
577         pinctrl-names = "default";
578         pinctrl-0 = <&gpio0_c1>;
579         regulators {
580
581                 rk818_dcdc1_reg: regulator@0{
582                         regulator-name= "vdd_arm";/*vcc arm*/
583                         regulator-min-microvolt = <700000>;/*<725000>;*/
584                         regulator-max-microvolt = <1500000>;
585                         regulator-initial-mode = <0x2>;
586                         regulator-initial-state = <3>;
587                         regulator-state-mem {
588                                 regulator-state-mode = <0x2>;
589                                 regulator-state-disabled;
590                                 regulator-state-uv =<900000>;
591                         };
592                 };
593
594                 rk818_dcdc2_reg: regulator@1 {
595                         regulator-name= "vdd_logic";/*vcc gpu*/
596                         regulator-min-microvolt = <700000>;
597                         regulator-max-microvolt = <1200000>;
598                         regulator-initial-mode = <0x2>;
599                         regulator-initial-state = <3>;
600                         regulator-state-mem {
601                                 regulator-state-mode = <0x2>;
602                                 regulator-state-enabled;
603                                 regulator-state-uv = <1200000>;
604                         };
605                 };
606
607                 rk818_dcdc3_reg: regulator@2 {
608                         regulator-name= "vcc_ddr";
609                         regulator-min-microvolt = <1200000>;
610                         regulator-max-microvolt = <1200000>;
611                         regulator-initial-mode = <0x2>;
612                         regulator-initial-state = <3>;
613                         regulator-state-mem {
614                                 regulator-state-mode = <0x2>;
615                                 regulator-state-enabled;
616                                 regulator-state-uv = <1200000>;
617                         };
618                 };
619
620                 rk818_dcdc4_reg: regulator@3 {
621                         regulator-name= "vccio";
622                         regulator-min-microvolt = <3300000>;
623                         regulator-max-microvolt = <3300000>;
624                         regulator-initial-mode = <0x2>;
625                         regulator-initial-state = <3>;
626                         regulator-state-mem {
627                                 regulator-state-mode = <0x2>;
628                                 regulator-state-enabled;
629                                 regulator-state-uv = <3000000>;
630                         };
631                 };
632
633                 rk818_ldo1_reg: regulator@4 {
634                         regulator-name= "vcc_codec";
635                         regulator-min-microvolt = <3300000>;
636                         regulator-max-microvolt = <3300000>;
637                         regulator-initial-state = <3>;
638                         regulator-state-mem {
639                                 regulator-state-enabled;
640                                 regulator-state-uv = <3300000>;
641                         };
642                 };
643
644                 rk818_ldo2_reg: regulator@5 {
645                         regulator-name= "vcc_tp";
646                         regulator-min-microvolt = <3300000>;
647                         regulator-max-microvolt = <3300000>;
648                         regulator-initial-state = <3>;
649                         regulator-state-mem {
650                                 regulator-state-enabled;
651                                 regulator-state-uv = <3300000>;
652                         };
653                 };
654
655                 rk818_ldo3_reg: regulator@6 {
656                         regulator-name= "vdd_10";
657                         regulator-min-microvolt = <1000000>;
658                         regulator-max-microvolt = <1000000>;
659                         regulator-initial-state = <3>;
660                         regulator-state-mem {
661                                 regulator-state-enabled;
662                                 regulator-state-uv = <1000000>;
663                         };
664                 };
665
666                 rk818_ldo4_reg:regulator@7 {
667                         regulator-name= "vcc18_lcd";
668                         regulator-min-microvolt = <1800000>;
669                         regulator-max-microvolt = <1800000>;
670                         regulator-initial-state = <3>;
671                         regulator-state-mem {
672                                 regulator-state-disabled;
673                                 regulator-state-uv = <1800000>;
674                         };
675                 };
676
677                 rk818_ldo5_reg: regulator@8 {
678                         regulator-name= "vccio_pmu";
679                         regulator-min-microvolt = <1800000>;
680                         regulator-max-microvolt = <1800000>;
681                         regulator-initial-state = <3>;
682                         regulator-state-mem {
683                                 regulator-state-enabled;
684                                 regulator-state-uv = <1800000>;
685                         };
686                 };
687
688                 rk818_ldo6_reg: regulator@9 {
689                         regulator-name= "vdd10_lcd";
690                         regulator-min-microvolt = <1000000>;
691                         regulator-max-microvolt = <1000000>;
692                         regulator-initial-state = <3>;
693                         regulator-state-mem {
694                                 regulator-state-disabled;
695                                 regulator-state-uv = <1000000>;
696                         };
697                 };
698
699                 rk818_ldo7_reg: regulator@10 {
700                         regulator-name= "vcc_18";
701                         regulator-min-microvolt = <1800000>;
702                         regulator-max-microvolt = <1800000>;
703                         regulator-initial-state = <3>;
704                         regulator-state-mem {
705                                 regulator-state-enabled;
706                                 regulator-state-uv = <1800000>;
707                         };
708                 };
709
710                 rk818_ldo8_reg: regulator@11 {
711                         regulator-name= "vccio_wl";
712                         regulator-min-microvolt = <1800000>;
713                         regulator-max-microvolt = <1800000>;
714                         regulator-initial-state = <3>;
715                         regulator-state-mem {
716                                 regulator-state-enabled;
717                                 regulator-state-uv = <1800000>;
718                         };
719                 };
720
721                 rk818_ldo9_reg: regulator@12 {
722                         regulator-name= "vcc_sd";
723                         regulator-min-microvolt = <1800000>;
724                         regulator-max-microvolt = <3300000>;
725                         regulator-initial-state = <3>;
726                         regulator-state-mem {
727                                 regulator-state-enabled;
728                                 regulator-state-uv = <3300000>;
729                         };
730                 };
731
732                 rk818_ldo10_reg: regulator@13 {
733                         regulator-name= "rk818_ldo10";
734                         regulator-state-mem {
735                                 regulator-state-disabled;
736                         };
737                 };
738         };
739 };
740
741 &ion_cma {
742        reg = <0x00000000 0x00000000>; /* 0MB */
743 };
744