rk3368-p9: dts: add property of rk818 battery node
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rk3368-p9_818.dts
1 /dts-v1/;
2
3 #include <dt-bindings/interrupt-controller/arm-gic.h>
4 #include <dt-bindings/rkfb/rk_fb.h>
5 #include "rk3368.dtsi"
6 #include "../../../arm/boot/dts/lcd-ld089wu1-mipi.dtsi"
7 / {
8         chosen {
9                 bootargs = "earlyprintk=uart8250-32bit,0xff690000";
10         };
11
12         wireless-wlan {
13                 compatible = "wlan-platdata";
14
15                 rockchip,grf = <&grf>;
16
17                 /* wifi_chip_type - wifi chip define
18                  * ap6210, ap6330, ap6335
19                  * rtl8188eu, rtl8723bs, rtl8723bu
20                  * esp8089
21                 */
22                 wifi_chip_type = "ap6210";              
23
24                 sdio_vref = <1800>; //1800mv or 3300mv
25                 power_pmu_regulator = "rk818_ldo8_reg";
26                 power_pmu_enable_level = <1>; //1->HIGH, 0->LOW
27                 vref_pmu_regulator = "rk818_ldo8_reg";
28                 vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW
29
30                 WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>;
31                 WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>;
32
33                 status = "okay";
34         };
35
36         wireless-bluetooth {
37                 compatible = "bluetooth-platdata";
38                 uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>;
39                 pinctrl-names = "default","rts_gpio";
40                 pinctrl-0 = <&uart0_rts>;
41                 pinctrl-1 = <&uart0_rts_gpio>;
42
43                 BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>;
44                 BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>;
45                 BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>;
46                 BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>;
47
48                 status = "okay";
49         };
50
51         hallsensor {
52                compatible = "hall_och165t";
53                type = <SENSOR_TYPE_HALL>;
54                irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>;
55         };
56
57         backlight: backlight {
58                 compatible = "pwm-backlight";
59                 pwms = <&pwm0 0 25000>;
60                 brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
61                 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41
62                 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
63                 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87
64                 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109
65                 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128
66                 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147
67                 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166
68                 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185
69                 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204
70                 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223
71                 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242
72                 243 244 245 246 247 248 249 250 251 252 253 254 255>;
73                 default-brightness-level = <128>;
74                 enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>;
75         };
76
77         pwm_regulator {
78                 compatible = "rockchip_pwm_regulator";
79                 pwms = <&pwm1 0 2000>;
80                 rockchip,pwm_id= <1>;
81                 rockchip,pwm_voltage_map= <925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>;
82                 rockchip,pwm_voltage= <1000000>;
83                 rockchip,pwm_min_voltage= <925000>;
84                 rockchip,pwm_max_voltage= <1400000>;
85                 rockchip,pwm_suspend_voltage= <950000>;
86                 rockchip,pwm_coefficient= <475>;
87                 regulators {
88                         #address-cells = <1>;
89                         #size-cells = <0>;
90                         pwm_reg0: regulator@0 {
91                                 regulator-compatible = "pwm_dcdc1";
92                                 regulator-name= "vdd_logic";
93                                 regulator-min-microvolt = <925000>;
94                                 regulator-max-microvolt = <1400000>;
95                                 regulator-always-on;
96                                 regulator-boot-on;
97                         };
98                 };
99         };
100
101         codec_hdmi_i2s: codec-hdmi-i2s {
102                 compatible = "hdmi-i2s";
103         };
104
105         codec_hdmi_spdif: codec-hdmi-spdif {
106                 compatible = "hdmi-spdif";
107         };
108
109         rockchip-hdmi-i2s {
110                 compatible = "rockchip-hdmi-i2s";
111                 dais {
112                         dai0 {
113                                 audio-codec = <&codec_hdmi_i2s>;
114                                 i2s-controller = <&i2s0>;
115                                 format = "i2s";
116                         };
117                 };
118         };
119
120         rockchip-hdmi-spdif {
121                 compatible = "rockchip-hdmi-spdif";
122                 dais {
123                         dai0 {
124                                 audio-codec = <&codec_hdmi_spdif>;
125                                 i2s-controller = <&spdif>;
126                         };
127                 };
128         };
129
130         rockchip-es8316 {
131                 compatible = "rockchip-es8316";
132                 dais {
133                         dai0 {
134                                 audio-codec = <&es8316>;
135                                 i2s-controller = <&i2s0>;
136                                 format = "i2s";
137                         };
138                 };
139         };
140
141         io-domains {
142                 compatible = "rockchip,rk3368-io-voltage-domain";
143                 rockchip,grf = <&grf>;
144                 rockchip,pmugrf = <&pmugrf>;
145
146                 /*GRF_IO_VSEL*/
147                 gpio30-supply = <&rk818_dcdc4_reg>;     /*APIO1_VDD*/
148                 wifi-supply = <&rk818_ldo8_reg>;     /*APIO2_VDD*/
149                 audio-supply = <&rk818_dcdc4_reg>;   /*APIO3_VDD*/
150                 gpio1830-supply = <&rk818_dcdc4_reg>;   /*ADIO4_VDD*/
151                 sdcard-supply = <&rk818_ldo9_reg>;   /*SDMMC_VDD*/
152
153                 /*PMU_GRF_IO_VSEL*/
154                 pmu-supply = <&rk818_ldo5_reg>;      /*PMUIO_VDD*/
155                 vop-supply = <&rk818_ldo5_reg>;      /*LCDC_VDD*/
156         };
157 };
158
159 &tsadc {
160        tsadc-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
161        //tsadc-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
162        status = "okay";
163 };
164
165 &pinctrl {
166         //used for init some gpio
167         init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
168
169         gpio0_gpio {
170                         gpio0_c7: gpio0-c7 {
171                                 rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>;
172                         };
173                         gpio0_a3: gpio0-a3 {
174                                 rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>;
175                         };
176                         gpio0_c2: gpio0-c2 {
177                                 rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>;
178                         };
179                         gpio0_c3: gpio0-c3{
180                                 rockchip,pins = <0 GPIO_C3 RK_FUNC_GPIO &pcfg_pull_down>;
181                         };
182
183                         gpio0_c1: gpio0-c1 {
184                                 rockchip,pins = <0 GPIO_C1 RK_FUNC_GPIO &pcfg_pull_up>;
185                         };
186                         //to add
187                 };
188
189 };
190
191 &nandc0 {
192         status = "disabled"; // used nand set "disabled" ,used emmc set "okay"
193 };
194
195 &nandc0reg {
196         status = "okay"; // used nand set "disabled" ,used emmc set "okay"
197 };
198
199 &emmc {
200         clock-frequency = <150000000>;
201         clock-freq-min-max = <400000 150000000>;
202
203         supports-highspeed;
204         supports-emmc;
205         bootpart-no-access;
206
207         //supports-tSD;
208         supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board.
209         caps2-mmc-hs200;
210
211         ignore-pm-notify;
212         keep-power-in-suspend;
213
214         //poll-hw-reset
215         status = "okay";
216 };
217
218 &sdmmc {
219         clock-frequency = <50000000>;
220         clock-freq-min-max = <400000 50000000>;
221         supports-highspeed;
222         supports-sd;
223         broken-cd;
224         card-detect-delay = <200>;
225
226         ignore-pm-notify;
227         keep-power-in-suspend;
228
229         vmmc-supply = <&rk818_ldo1_reg>;
230                 status = "okay";
231 };
232
233 &sdio {
234         clock-frequency = <50000000>;
235         clock-freq-min-max = <200000 50000000>;
236         supports-highspeed;
237         supports-sdio;
238         ignore-pm-notify;
239         keep-power-in-suspend;
240         //cap-sdio-irq;
241         status = "okay";
242 };
243
244 &dsihost0{
245         status = "okay";
246 };
247
248 &spi0 {
249         status = "disabled";
250 };
251
252 &spi1 {
253         status = "disabled";
254 };
255
256 &spi2 {
257         status = "disabled";
258 };
259
260 &gmac {
261         status = "disabled";
262 };
263
264 &uart_dbg {
265         status = "okay";
266 };
267
268 &uart_bt {
269         status = "okay";
270         dma-names = "!tx", "!rx";
271         pinctrl-0 = <&uart0_xfer &uart0_cts>;
272 };
273
274 &i2c0 {
275         status = "okay";
276         syr827: syr827@40 {
277                 compatible = "silergy,syr82x";
278                 reg = <0x40>;
279                 status = "okay";
280                 regulators {
281                         #address-cells = <1>;
282                         #size-cells = <0>;
283                         syr827_dc1: regulator@0 {
284                         reg = <0>;
285                         regulator-compatible = "syr82x_dcdc1";
286                         regulator-name = "vdd_arm";
287                         regulator-min-microvolt = <712500>;
288                         regulator-max-microvolt = <1500000>;
289                         regulator-always-on;
290                         regulator-boot-on;
291                         regulator-initial-mode = <0x2>;
292                         regulator-initial-state = <3>;
293                         regulator-state-mem {
294                                 regulator-state-mode = <0x2>;
295                                 regulator-state-disabled;
296                                 regulator-state-uv = <900000>;
297                         };
298                 };
299            };
300         };
301         syr828: syr828@41 {
302                 compatible = "silergy,syr82x";
303                 reg = <0x41>;
304                 status = "okay";
305                 regulators {
306                         #address-cells = <1>;
307                         #size-cells = <0>;
308                         syr828_dc1: regulator@0 {
309                         reg = <0>;
310                         regulator-compatible = "syr82x_dcdc1";
311                         regulator-name = "vdd_gpu";
312                         regulator-min-microvolt = <712500>;
313                         regulator-max-microvolt = <1500000>;
314                         regulator-always-on;
315                         regulator-boot-on;
316                         regulator-initial-mode = <0x2>;
317                         regulator-initial-state = <3>;
318                         regulator-state-mem {
319                                 regulator-state-mode = <0x2>;
320                                 regulator-state-enabled;
321                                 regulator-state-uv = <900000>;
322                         };
323                 };
324            };
325         };
326
327         rk818: rk818@1c {
328                 reg = <0x1c>;
329                 status = "okay";
330                 compatible = "rockchip,rk818";
331                 battery {
332                         ocv_table = <3400 3650 3693 3707 3731 3749 3760
333                                      3770 3782 3796 3812 3829 3852 3882
334                                      3915 3951 3981 4047 4086 4132 4182>;
335                         design_capacity = <8650>;
336                         design_qmax = <8800>;
337                         max_overcharge = <100>;
338                         bat_res = <85>;
339                         max_charge_ilimitmA  = <2000>;
340                         max_charge_currentmA = <1800>;
341                         max_charge_voltagemV = <4200>;
342                         max_bat_voltagemV = <4200>;
343                         sleep_enter_current = <600>;
344                         sleep_exit_current = <600>;
345                         support_uboot_chrg = <0>;
346                         support_usb_adp = <1>;
347                         support_dc_adp = <1>;
348                         dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>;
349                         dc_det_pullup_inside = <1>;
350                         test_power {
351                                 test_charge_currentmA = <1800>;
352                                 test_charge_ilimitmA  = <2000>;
353                         };
354                 };
355         };
356 };
357
358 &i2c1 {
359         status = "okay";
360         es8316: es8316@10 {
361                 compatible = "es8316";
362                 reg = <0x10>;
363                 spk-con-gpio = <&gpio0 GPIO_C3 GPIO_ACTIVE_HIGH>;
364                 hp-det-gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_HIGH>;
365                 status = "okay";
366         };
367 };
368
369 &i2c2 {
370         status = "okay";
371         touchscreen@14 {
372                 compatible = "goodix,gt9xx";
373                 reg = <0x14>;
374                 touch-gpio = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>;
375                 reset-gpio = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>;  
376                 max-x = <1920>;                  
377                 max-y = <1200>;
378                 tp-size = <89>;
379         };
380 };
381
382 &i2c3 {
383         status = "okay";
384 };
385
386 &i2c4 {
387         status = "okay";
388         mpu6500_acc:mpu_acc@68{
389                 compatible = "mpu6500_acc";
390                 reg = <0x68>;
391                 irq_enable = <0>;
392                 poll_delay_ms = <30>;
393                 type = <SENSOR_TYPE_ACCEL>;
394                 layout = <7>;
395         };
396 };
397
398 &i2c5 {
399         status = "disabled";
400 };
401
402 &fb {
403         status = "okay";
404         rockchip,disp-mode = <NO_DUAL>;
405         rockchip,uboot-logo-on = <0>;
406 };
407
408 &rk_screen {
409         status = "okay";
410         display-timings = <&disp_timings>;
411 };
412
413 &lcdc {
414         status = "okay";
415         backlight = <&backlight>;
416         rockchip,mirror = <NO_MIRROR>;
417         rockchip,cabc_mode = <0>;
418         rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
419         power_ctr: power_ctr {
420                 rockchip,debug = <0>;
421                 lcd_en:lcd_en {
422                         rockchip,power_type = <GPIO>;
423                         gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>;
424                         rockchip,delay = <120>;
425                 };
426
427                 lcd_cs:lcd_cs {
428                         rockchip,power_type = <GPIO>;
429                         gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>;
430                         rockchip,delay = <10>;
431                 };
432
433                 /*lcd_rst:lcd_rst {
434                         rockchip,power_type = <GPIO>;
435                         gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
436                         rockchip,delay = <5>;
437                 };*/
438         };
439 };
440
441
442 &hdmi {
443         status = "okay";
444 };
445
446 &adc {
447         status = "okay";
448
449         rockchip_headset {
450                 compatible = "rockchip_headset";
451                 headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>;
452                 pinctrl-names = "default";
453                 pinctrl-0 = <&gpio0_c7>;//gpio0_c7
454                 io-channels = <&adc 2>;
455        /*
456                hook_gpio = ;
457                hook_down_type = ; //interrupt hook key down status
458                 */
459        };
460
461         key {
462                 compatible = "rockchip,key";
463                 io-channels = <&adc 1>;
464
465                 vol-up-key {
466                         linux,code = <115>;
467                         label = "volume up";
468                         rockchip,adc_value = <1>;
469                 };
470
471                 vol-down-key {
472                         linux,code = <114>;
473                         label = "volume down";
474                         rockchip,adc_value = <170>;
475                 };
476
477                 power-key {
478                         gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
479                         linux,code = <116>;
480                         label = "power";
481                         gpio-key,wakeup;
482                 };
483         };
484 };
485
486 &pwm0 {
487         status = "okay";
488 };
489
490 &pwm1 {
491         status = "disabled";
492 };
493
494 &clk_core_b_dvfs_table {
495         operating-points = <
496                 /* KHz    uV */
497                 216000 1000000
498                 312000 1000000
499                 408000 1000000
500                 600000 1000000
501                 696000 1000000
502                 816000 1025000
503                 1008000 1100000
504                 //1200000 1175000
505                 //1296000 1200000
506                 //1416000 1275000
507                 //1512000 1325000
508                 >;
509         status = "okay";
510 };
511
512 &clk_core_l_dvfs_table {
513         operating-points = <
514                 /* KHz    uV */
515                 216000 1000000
516                 312000 1000000
517                 408000 1000000
518                 600000 1000000
519                 696000 1000000
520                 816000 1075000
521                 1008000 1175000
522                 //1200000 1225000
523                 >;
524         status = "okay";
525 };
526
527 &clk_gpu_dvfs_table {
528         operating-points = <
529                 /* KHz    uV */
530                 200000 1100000
531                 288000 1100000
532                 400000 1150000
533                 576000 1200000
534                 >;
535 };
536
537 &clk_ddr_dvfs_table {
538         operating-points = <
539                 /* KHz    uV */
540                 200000 1100000
541                 300000 1100000
542                 400000 1100000
543                 533000 1150000
544                 600000 1200000
545                 >;
546
547         freq-table = <
548                 /*status                freq(KHz)*/
549                 SYS_STATUS_NORMAL       600000
550                 SYS_STATUS_SUSPEND      200000
551                 SYS_STATUS_VIDEO_1080P  400000
552                 SYS_STATUS_VIDEO_4K     533000
553                 SYS_STATUS_PERFORMANCE  600000
554                 SYS_STATUS_DUALVIEW     600000
555                 SYS_STATUS_BOOST        400000
556                 SYS_STATUS_ISP          533000
557                 >;
558         auto-freq-table = <
559                 240000
560                 324000
561                 396000
562                 528000
563                 >;
564         auto-freq=<0>;
565         status="okay";
566 };
567
568 &dwc_control_usb {
569         host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>;
570         otg_drv_gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>;
571         rockchip,remote_wakeup;
572         rockchip,usb_irq_wakeup;
573 };
574
575 /include/ "../../../arm/boot/dts/rk818.dtsi"
576 &rk818 {
577         gpios =<&gpio0 GPIO_A1 GPIO_ACTIVE_HIGH>,<&gpio0 GPIO_A0 GPIO_ACTIVE_LOW>;
578         rk818,system-power-controller;
579         pinctrl-names = "default";
580         pinctrl-0 = <&gpio0_c1>;
581         regulators {
582
583                 rk818_dcdc1_reg: regulator@0{
584                         regulator-name= "vdd_arm";/*vcc arm*/
585                         regulator-min-microvolt = <700000>;/*<725000>;*/
586                         regulator-max-microvolt = <1500000>;
587                         regulator-initial-mode = <0x2>;
588                         regulator-initial-state = <3>;
589                         regulator-state-mem {
590                                 regulator-state-mode = <0x2>;
591                                 regulator-state-disabled;
592                                 regulator-state-uv =<900000>;
593                         };
594                 };
595
596                 rk818_dcdc2_reg: regulator@1 {
597                         regulator-name= "vdd_logic";/*vcc gpu*/
598                         regulator-min-microvolt = <700000>;
599                         regulator-max-microvolt = <1200000>;
600                         regulator-initial-mode = <0x2>;
601                         regulator-initial-state = <3>;
602                         regulator-state-mem {
603                                 regulator-state-mode = <0x2>;
604                                 regulator-state-enabled;
605                                 regulator-state-uv = <1200000>;
606                         };
607                 };
608
609                 rk818_dcdc3_reg: regulator@2 {
610                         regulator-name= "vcc_ddr";
611                         regulator-min-microvolt = <1200000>;
612                         regulator-max-microvolt = <1200000>;
613                         regulator-initial-mode = <0x2>;
614                         regulator-initial-state = <3>;
615                         regulator-state-mem {
616                                 regulator-state-mode = <0x2>;
617                                 regulator-state-enabled;
618                                 regulator-state-uv = <1200000>;
619                         };
620                 };
621
622                 rk818_dcdc4_reg: regulator@3 {
623                         regulator-name= "vccio";
624                         regulator-min-microvolt = <3300000>;
625                         regulator-max-microvolt = <3300000>;
626                         regulator-initial-mode = <0x2>;
627                         regulator-initial-state = <3>;
628                         regulator-state-mem {
629                                 regulator-state-mode = <0x2>;
630                                 regulator-state-enabled;
631                                 regulator-state-uv = <3000000>;
632                         };
633                 };
634
635                 rk818_ldo1_reg: regulator@4 {
636                         regulator-name= "vcc_codec";
637                         regulator-min-microvolt = <3300000>;
638                         regulator-max-microvolt = <3300000>;
639                         regulator-initial-state = <3>;
640                         regulator-state-mem {
641                                 regulator-state-enabled;
642                                 regulator-state-uv = <3300000>;
643                         };
644                 };
645
646                 rk818_ldo2_reg: regulator@5 {
647                         regulator-name= "vcc_tp";
648                         regulator-min-microvolt = <3300000>;
649                         regulator-max-microvolt = <3300000>;
650                         regulator-initial-state = <3>;
651                         regulator-state-mem {
652                                 regulator-state-enabled;
653                                 regulator-state-uv = <3300000>;
654                         };
655                 };
656
657                 rk818_ldo3_reg: regulator@6 {
658                         regulator-name= "vdd_10";
659                         regulator-min-microvolt = <1000000>;
660                         regulator-max-microvolt = <1000000>;
661                         regulator-initial-state = <3>;
662                         regulator-state-mem {
663                                 regulator-state-enabled;
664                                 regulator-state-uv = <1000000>;
665                         };
666                 };
667
668                 rk818_ldo4_reg:regulator@7 {
669                         regulator-name= "vcc18_lcd";
670                         regulator-min-microvolt = <1800000>;
671                         regulator-max-microvolt = <1800000>;
672                         regulator-initial-state = <3>;
673                         regulator-state-mem {
674                                 regulator-state-disabled;
675                                 regulator-state-uv = <1800000>;
676                         };
677                 };
678
679                 rk818_ldo5_reg: regulator@8 {
680                         regulator-name= "vccio_pmu";
681                         regulator-min-microvolt = <1800000>;
682                         regulator-max-microvolt = <1800000>;
683                         regulator-initial-state = <3>;
684                         regulator-state-mem {
685                                 regulator-state-enabled;
686                                 regulator-state-uv = <1800000>;
687                         };
688                 };
689
690                 rk818_ldo6_reg: regulator@9 {
691                         regulator-name= "vdd10_lcd";
692                         regulator-min-microvolt = <1000000>;
693                         regulator-max-microvolt = <1000000>;
694                         regulator-initial-state = <3>;
695                         regulator-state-mem {
696                                 regulator-state-disabled;
697                                 regulator-state-uv = <1000000>;
698                         };
699                 };
700
701                 rk818_ldo7_reg: regulator@10 {
702                         regulator-name= "vcc_18";
703                         regulator-min-microvolt = <1800000>;
704                         regulator-max-microvolt = <1800000>;
705                         regulator-initial-state = <3>;
706                         regulator-state-mem {
707                                 regulator-state-enabled;
708                                 regulator-state-uv = <1800000>;
709                         };
710                 };
711
712                 rk818_ldo8_reg: regulator@11 {
713                         regulator-name= "vccio_wl";
714                         regulator-min-microvolt = <1800000>;
715                         regulator-max-microvolt = <1800000>;
716                         regulator-initial-state = <3>;
717                         regulator-state-mem {
718                                 regulator-state-enabled;
719                                 regulator-state-uv = <1800000>;
720                         };
721                 };
722
723                 rk818_ldo9_reg: regulator@12 {
724                         regulator-name= "vcc_sd";
725                         regulator-min-microvolt = <1800000>;
726                         regulator-max-microvolt = <3300000>;
727                         regulator-initial-state = <3>;
728                         regulator-state-mem {
729                                 regulator-state-enabled;
730                                 regulator-state-uv = <3300000>;
731                         };
732                 };
733
734                 rk818_ldo10_reg: regulator@13 {
735                         regulator-name= "rk818_ldo10";
736                         regulator-state-mem {
737                                 regulator-state-disabled;
738                         };
739                 };
740         };
741 };
742
743 &ion_cma {
744        reg = <0x00000000 0x00000000>; /* 0MB */
745 };
746