arch/arm/mach-vexpress/v2m.c

   1 /*
   2  * Versatile Express V2M Motherboard Support
   3  */
   4 #include <linux/device.h>
   5 #include <linux/amba/bus.h>
   6 #include <linux/amba/mmci.h>
   7 #include <linux/io.h>
   8 #include <linux/init.h>
   9 #include <linux/of_address.h>
  10 #include <linux/of_fdt.h>
  11 #include <linux/of_irq.h>
  12 #include <linux/of_platform.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/ata_platform.h>
  15 #include <linux/smsc911x.h>
  16 #include <linux/spinlock.h>
  17 #include <linux/usb/isp1760.h>
  18 #include <linux/clkdev.h>
  19 #include <linux/mtd/physmap.h>
  20
  21 #include <asm/arch_timer.h>
  22 #include <asm/mach-types.h>
  23 #include <asm/sizes.h>
  24 #include <asm/smp_twd.h>
  25 #include <asm/mach/arch.h>
  26 #include <asm/mach/map.h>
  27 #include <asm/mach/time.h>
  28 #include <asm/hardware/arm_timer.h>
  29 #include <asm/hardware/cache-l2x0.h>
  30 #include <asm/hardware/gic.h>
  31 #include <asm/hardware/timer-sp.h>
  32 #include <asm/hardware/sp810.h>
  33
  34 #include <mach/ct-ca9x4.h>
  35 #include <mach/motherboard.h>
  36
  37 #include <plat/sched_clock.h>
  38
  39 #include "core.h"
  40
  41 #define V2M_PA_CS0      0x40000000
  42 #define V2M_PA_CS1      0x44000000
  43 #define V2M_PA_CS2      0x48000000
  44 #define V2M_PA_CS3      0x4c000000
  45 #define V2M_PA_CS7      0x10000000
  46
  47 static struct map_desc v2m_io_desc[] __initdata = {
  48         {
  49                 .virtual        = V2M_PERIPH,
  50                 .pfn            = __phys_to_pfn(V2M_PA_CS7),
  51                 .length         = SZ_128K,
  52                 .type           = MT_DEVICE,
  53         },
  54 };
  55
  56 static void __iomem *v2m_sysreg_base;
  57
  58 static void __init v2m_sysctl_init(void __iomem *base)
  59 {
  60         u32 scctrl;
  61
  62         if (WARN_ON(!base))
  63                 return;
  64
  65         /* Select 1MHz TIMCLK as the reference clock for SP804 timers */
  66         scctrl = readl(base + SCCTRL);
  67         scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK;
  68         scctrl |= SCCTRL_TIMEREN1SEL_TIMCLK;
  69         writel(scctrl, base + SCCTRL);
  70 }
  71
  72 static void __init v2m_sp804_init(void __iomem *base, unsigned int irq)
  73 {
  74         if (WARN_ON(!base || irq == NO_IRQ))
  75                 return;
  76
  77         writel(0, base + TIMER_1_BASE + TIMER_CTRL);
  78         writel(0, base + TIMER_2_BASE + TIMER_CTRL);
  79
  80         sp804_clocksource_init(base + TIMER_2_BASE, "v2m-timer1");
  81         sp804_clockevents_init(base + TIMER_1_BASE, irq, "v2m-timer0");
  82 }
  83
  84 static void __init v2m_timer_init(void)
  85 {
  86         v2m_sysctl_init(ioremap(V2M_SYSCTL, SZ_4K));
  87         v2m_sp804_init(ioremap(V2M_TIMER01, SZ_4K), IRQ_V2M_TIMER0);
  88 }
  89
  90 static struct sys_timer v2m_timer = {
  91         .init   = v2m_timer_init,
  92 };
  93
  94
  95 static DEFINE_SPINLOCK(v2m_cfg_lock);
  96
  97 int v2m_cfg_write(u32 devfn, u32 data)
  98 {
  99         /* Configuration interface broken? */
 100         u32 val;
 101
 102         printk("%s: writing %08x to %08x\n", __func__, data, devfn);
 103
 104         devfn |= SYS_CFG_START | SYS_CFG_WRITE;
 105
 106         spin_lock(&v2m_cfg_lock);
 107         val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
 108         writel(val & ~SYS_CFG_COMPLETE, v2m_sysreg_base + V2M_SYS_CFGSTAT);
 109
 110         writel(data, v2m_sysreg_base +  V2M_SYS_CFGDATA);
 111         writel(devfn, v2m_sysreg_base + V2M_SYS_CFGCTRL);
 112
 113         do {
 114                 val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
 115         } while (val == 0);
 116         spin_unlock(&v2m_cfg_lock);
 117
 118         return !!(val & SYS_CFG_ERR);
 119 }
 120
 121 int v2m_cfg_read(u32 devfn, u32 *data)
 122 {
 123         u32 val;
 124
 125         devfn |= SYS_CFG_START;
 126
 127         spin_lock(&v2m_cfg_lock);
 128         writel(0, v2m_sysreg_base + V2M_SYS_CFGSTAT);
 129         writel(devfn, v2m_sysreg_base + V2M_SYS_CFGCTRL);
 130
 131         mb();
 132
 133         do {
 134                 cpu_relax();
 135                 val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
 136         } while (val == 0);
 137
 138         *data = readl(v2m_sysreg_base + V2M_SYS_CFGDATA);
 139         spin_unlock(&v2m_cfg_lock);
 140
 141         return !!(val & SYS_CFG_ERR);
 142 }
 143
 144 void __init v2m_flags_set(u32 data)
 145 {
 146         writel(~0, v2m_sysreg_base + V2M_SYS_FLAGSCLR);
 147         writel(data, v2m_sysreg_base + V2M_SYS_FLAGSSET);
 148 }
 149
 150
 151 static struct resource v2m_pcie_i2c_resource = {
 152         .start  = V2M_SERIAL_BUS_PCI,
 153         .end    = V2M_SERIAL_BUS_PCI + SZ_4K - 1,
 154         .flags  = IORESOURCE_MEM,
 155 };
 156
 157 static struct platform_device v2m_pcie_i2c_device = {
 158         .name           = "versatile-i2c",
 159         .id             = 0,
 160         .num_resources  = 1,
 161         .resource       = &v2m_pcie_i2c_resource,
 162 };
 163
 164 static struct resource v2m_ddc_i2c_resource = {
 165         .start  = V2M_SERIAL_BUS_DVI,
 166         .end    = V2M_SERIAL_BUS_DVI + SZ_4K - 1,
 167         .flags  = IORESOURCE_MEM,
 168 };
 169
 170 static struct platform_device v2m_ddc_i2c_device = {
 171         .name           = "versatile-i2c",
 172         .id             = 1,
 173         .num_resources  = 1,
 174         .resource       = &v2m_ddc_i2c_resource,
 175 };
 176
 177 static struct resource v2m_eth_resources[] = {
 178         {
 179                 .start  = V2M_LAN9118,
 180                 .end    = V2M_LAN9118 + SZ_64K - 1,
 181                 .flags  = IORESOURCE_MEM,
 182         }, {
 183                 .start  = IRQ_V2M_LAN9118,
 184                 .end    = IRQ_V2M_LAN9118,
 185                 .flags  = IORESOURCE_IRQ,
 186         },
 187 };
 188
 189 static struct smsc911x_platform_config v2m_eth_config = {
 190         .flags          = SMSC911X_USE_32BIT,
 191         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
 192         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
 193         .phy_interface  = PHY_INTERFACE_MODE_MII,
 194 };
 195
 196 static struct platform_device v2m_eth_device = {
 197         .name           = "smsc911x",
 198         .id             = -1,
 199         .resource       = v2m_eth_resources,
 200         .num_resources  = ARRAY_SIZE(v2m_eth_resources),
 201         .dev.platform_data = &v2m_eth_config,
 202 };
 203
 204 static struct resource v2m_usb_resources[] = {
 205         {
 206                 .start  = V2M_ISP1761,
 207                 .end    = V2M_ISP1761 + SZ_128K - 1,
 208                 .flags  = IORESOURCE_MEM,
 209         }, {
 210                 .start  = IRQ_V2M_ISP1761,
 211                 .end    = IRQ_V2M_ISP1761,
 212                 .flags  = IORESOURCE_IRQ,
 213         },
 214 };
 215
 216 static struct isp1760_platform_data v2m_usb_config = {
 217         .is_isp1761             = true,
 218         .bus_width_16           = false,
 219         .port1_otg              = true,
 220         .analog_oc              = false,
 221         .dack_polarity_high     = false,
 222         .dreq_polarity_high     = false,
 223 };
 224
 225 static struct platform_device v2m_usb_device = {
 226         .name           = "isp1760",
 227         .id             = -1,
 228         .resource       = v2m_usb_resources,
 229         .num_resources  = ARRAY_SIZE(v2m_usb_resources),
 230         .dev.platform_data = &v2m_usb_config,
 231 };
 232
 233 static void v2m_flash_set_vpp(struct platform_device *pdev, int on)
 234 {
 235         writel(on != 0, v2m_sysreg_base + V2M_SYS_FLASH);
 236 }
 237
 238 static struct physmap_flash_data v2m_flash_data = {
 239         .width          = 4,
 240         .set_vpp        = v2m_flash_set_vpp,
 241 };
 242
 243 static struct resource v2m_flash_resources[] = {
 244         {
 245                 .start  = V2M_NOR0,
 246                 .end    = V2M_NOR0 + SZ_64M - 1,
 247                 .flags  = IORESOURCE_MEM,
 248         }, {
 249                 .start  = V2M_NOR1,
 250                 .end    = V2M_NOR1 + SZ_64M - 1,
 251                 .flags  = IORESOURCE_MEM,
 252         },
 253 };
 254
 255 static struct platform_device v2m_flash_device = {
 256         .name           = "physmap-flash",
 257         .id             = -1,
 258         .resource       = v2m_flash_resources,
 259         .num_resources  = ARRAY_SIZE(v2m_flash_resources),
 260         .dev.platform_data = &v2m_flash_data,
 261 };
 262
 263 static struct pata_platform_info v2m_pata_data = {
 264         .ioport_shift   = 2,
 265 };
 266
 267 static struct resource v2m_pata_resources[] = {
 268         {
 269                 .start  = V2M_CF,
 270                 .end    = V2M_CF + 0xff,
 271                 .flags  = IORESOURCE_MEM,
 272         }, {
 273                 .start  = V2M_CF + 0x100,
 274                 .end    = V2M_CF + SZ_4K - 1,
 275                 .flags  = IORESOURCE_MEM,
 276         },
 277 };
 278
 279 static struct platform_device v2m_cf_device = {
 280         .name           = "pata_platform",
 281         .id             = -1,
 282         .resource       = v2m_pata_resources,
 283         .num_resources  = ARRAY_SIZE(v2m_pata_resources),
 284         .dev.platform_data = &v2m_pata_data,
 285 };
 286
 287 static unsigned int v2m_mmci_status(struct device *dev)
 288 {
 289         return readl(v2m_sysreg_base + V2M_SYS_MCI) & (1 << 0);
 290 }
 291
 292 static struct mmci_platform_data v2m_mmci_data = {
 293         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
 294         .status         = v2m_mmci_status,
 295 };
 296
 297 static AMBA_APB_DEVICE(aaci,  "mb:aaci",  0, V2M_AACI, IRQ_V2M_AACI, NULL);
 298 static AMBA_APB_DEVICE(mmci,  "mb:mmci",  0, V2M_MMCI, IRQ_V2M_MMCI, &v2m_mmci_data);
 299 static AMBA_APB_DEVICE(kmi0,  "mb:kmi0",  0, V2M_KMI0, IRQ_V2M_KMI0, NULL);
 300 static AMBA_APB_DEVICE(kmi1,  "mb:kmi1",  0, V2M_KMI1, IRQ_V2M_KMI1, NULL);
 301 static AMBA_APB_DEVICE(uart0, "mb:uart0", 0, V2M_UART0, IRQ_V2M_UART0, NULL);
 302 static AMBA_APB_DEVICE(uart1, "mb:uart1", 0, V2M_UART1, IRQ_V2M_UART1, NULL);
 303 static AMBA_APB_DEVICE(uart2, "mb:uart2", 0, V2M_UART2, IRQ_V2M_UART2, NULL);
 304 static AMBA_APB_DEVICE(uart3, "mb:uart3", 0, V2M_UART3, IRQ_V2M_UART3, NULL);
 305 static AMBA_APB_DEVICE(wdt,   "mb:wdt",   0, V2M_WDT, IRQ_V2M_WDT, NULL);
 306 static AMBA_APB_DEVICE(rtc,   "mb:rtc",   0, V2M_RTC, IRQ_V2M_RTC, NULL);
 307
 308 static struct amba_device *v2m_amba_devs[] __initdata = {
 309         &aaci_device,
 310         &mmci_device,
 311         &kmi0_device,
 312         &kmi1_device,
 313         &uart0_device,
 314         &uart1_device,
 315         &uart2_device,
 316         &uart3_device,
 317         &wdt_device,
 318         &rtc_device,
 319 };
 320
 321
 322 static long v2m_osc_round(struct clk *clk, unsigned long rate)
 323 {
 324         return rate;
 325 }
 326
 327 static int v2m_osc1_set(struct clk *clk, unsigned long rate)
 328 {
 329         return v2m_cfg_write(SYS_CFG_OSC | SYS_CFG_SITE_MB | 1, rate);
 330 }
 331
 332 static const struct clk_ops osc1_clk_ops = {
 333         .round  = v2m_osc_round,
 334         .set    = v2m_osc1_set,
 335 };
 336
 337 static struct clk osc1_clk = {
 338         .ops    = &osc1_clk_ops,
 339         .rate   = 24000000,
 340 };
 341
 342 static struct clk osc2_clk = {
 343         .rate   = 24000000,
 344 };
 345
 346 static struct clk v2m_sp804_clk = {
 347         .rate   = 1000000,
 348 };
 349
 350 static struct clk v2m_ref_clk = {
 351         .rate   = 32768,
 352 };
 353
 354 static struct clk dummy_apb_pclk;
 355
 356 static struct clk_lookup v2m_lookups[] = {
 357         {       /* AMBA bus clock */
 358                 .con_id         = "apb_pclk",
 359                 .clk            = &dummy_apb_pclk,
 360         }, {    /* UART0 */
 361                 .dev_id         = "mb:uart0",
 362                 .clk            = &osc2_clk,
 363         }, {    /* UART1 */
 364                 .dev_id         = "mb:uart1",
 365                 .clk            = &osc2_clk,
 366         }, {    /* UART2 */
 367                 .dev_id         = "mb:uart2",
 368                 .clk            = &osc2_clk,
 369         }, {    /* UART3 */
 370                 .dev_id         = "mb:uart3",
 371                 .clk            = &osc2_clk,
 372         }, {    /* KMI0 */
 373                 .dev_id         = "mb:kmi0",
 374                 .clk            = &osc2_clk,
 375         }, {    /* KMI1 */
 376                 .dev_id         = "mb:kmi1",
 377                 .clk            = &osc2_clk,
 378         }, {    /* MMC0 */
 379                 .dev_id         = "mb:mmci",
 380                 .clk            = &osc2_clk,
 381         }, {    /* CLCD */
 382                 .dev_id         = "mb:clcd",
 383                 .clk            = &osc1_clk,
 384         }, {    /* SP805 WDT */
 385                 .dev_id         = "mb:wdt",
 386                 .clk            = &v2m_ref_clk,
 387         }, {    /* SP804 timers */
 388                 .dev_id         = "sp804",
 389                 .con_id         = "v2m-timer0",
 390                 .clk            = &v2m_sp804_clk,
 391         }, {    /* SP804 timers */
 392                 .dev_id         = "sp804",
 393                 .con_id         = "v2m-timer1",
 394                 .clk            = &v2m_sp804_clk,
 395         },
 396 };
 397
 398 static void __init v2m_init_early(void)
 399 {
 400         ct_desc->init_early();
 401         clkdev_add_table(v2m_lookups, ARRAY_SIZE(v2m_lookups));
 402         versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000);
 403 }
 404
 405 static void v2m_power_off(void)
 406 {
 407         if (v2m_cfg_write(SYS_CFG_SHUTDOWN | SYS_CFG_SITE_MB, 0))
 408                 printk(KERN_EMERG "Unable to shutdown\n");
 409 }
 410
 411 static void v2m_restart(char str, const char *cmd)
 412 {
 413         if (v2m_cfg_write(SYS_CFG_REBOOT | SYS_CFG_SITE_MB, 0))
 414                 printk(KERN_EMERG "Unable to reboot\n");
 415 }
 416
 417 struct ct_desc *ct_desc;
 418
 419 static struct ct_desc *ct_descs[] __initdata = {
 420 #ifdef CONFIG_ARCH_VEXPRESS_CA9X4
 421         &ct_ca9x4_desc,
 422 #endif
 423 };
 424
 425 static void __init v2m_populate_ct_desc(void)
 426 {
 427         int i;
 428         u32 current_tile_id;
 429
 430         ct_desc = NULL;
 431         current_tile_id = readl(v2m_sysreg_base + V2M_SYS_PROCID0)
 432                                 & V2M_CT_ID_MASK;
 433
 434         for (i = 0; i < ARRAY_SIZE(ct_descs) && !ct_desc; ++i)
 435                 if (ct_descs[i]->id == current_tile_id)
 436                         ct_desc = ct_descs[i];
 437
 438         if (!ct_desc)
 439                 panic("vexpress: this kernel does not support core tile ID 0x%08x when booting via ATAGs.\n"
 440                       "You may need a device tree blob or a different kernel to boot on this board.\n",
 441                       current_tile_id);
 442 }
 443
 444 static void __init v2m_map_io(void)
 445 {
 446         iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
 447         v2m_sysreg_base = ioremap(V2M_SYSREGS, SZ_4K);
 448         v2m_populate_ct_desc();
 449         ct_desc->map_io();
 450 }
 451
 452 static void __init v2m_init_irq(void)
 453 {
 454         ct_desc->init_irq();
 455 }
 456
 457 static void __init v2m_init(void)
 458 {
 459         int i;
 460
 461         platform_device_register(&v2m_pcie_i2c_device);
 462         platform_device_register(&v2m_ddc_i2c_device);
 463         platform_device_register(&v2m_flash_device);
 464         platform_device_register(&v2m_cf_device);
 465         platform_device_register(&v2m_eth_device);
 466         platform_device_register(&v2m_usb_device);
 467
 468         for (i = 0; i < ARRAY_SIZE(v2m_amba_devs); i++)
 469                 amba_device_register(v2m_amba_devs[i], &iomem_resource);
 470
 471         pm_power_off = v2m_power_off;
 472
 473         ct_desc->init_tile();
 474 }
 475
 476 MACHINE_START(VEXPRESS, "ARM-Versatile Express")
 477         .atag_offset    = 0x100,
 478         .map_io         = v2m_map_io,
 479         .init_early     = v2m_init_early,
 480         .init_irq       = v2m_init_irq,
 481         .timer          = &v2m_timer,
 482         .handle_irq     = gic_handle_irq,
 483         .init_machine   = v2m_init,
 484         .restart        = v2m_restart,
 485 MACHINE_END
 486
 487 #if defined(CONFIG_ARCH_VEXPRESS_DT)
 488
 489 static struct map_desc v2m_rs1_io_desc __initdata = {
 490         .virtual        = V2M_PERIPH,
 491         .pfn            = __phys_to_pfn(0x1c000000),
 492         .length         = SZ_2M,
 493         .type           = MT_DEVICE,
 494 };
 495
 496 static int __init v2m_dt_scan_memory_map(unsigned long node, const char *uname,
 497                 int depth, void *data)
 498 {
 499         const char **map = data;
 500
 501         if (strcmp(uname, "motherboard") != 0)
 502                 return 0;
 503
 504         *map = of_get_flat_dt_prop(node, "arm,v2m-memory-map", NULL);
 505
 506         return 1;
 507 }
 508
 509 void __init v2m_dt_map_io(void)
 510 {
 511         const char *map = NULL;
 512
 513         of_scan_flat_dt(v2m_dt_scan_memory_map, &map);
 514
 515         if (map && strcmp(map, "rs1") == 0)
 516                 iotable_init(&v2m_rs1_io_desc, 1);
 517         else
 518                 iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
 519
 520 #if defined(CONFIG_SMP)
 521         vexpress_dt_smp_map_io();
 522 #endif
 523 }
 524
 525 static struct clk_lookup v2m_dt_lookups[] = {
 526         {       /* AMBA bus clock */
 527                 .con_id         = "apb_pclk",
 528                 .clk            = &dummy_apb_pclk,
 529         }, {    /* SP804 timers */
 530                 .dev_id         = "sp804",
 531                 .con_id         = "v2m-timer0",
 532                 .clk            = &v2m_sp804_clk,
 533         }, {    /* SP804 timers */
 534                 .dev_id         = "sp804",
 535                 .con_id         = "v2m-timer1",
 536                 .clk            = &v2m_sp804_clk,
 537         }, {    /* PL180 MMCI */
 538                 .dev_id         = "mb:mmci", /* 10005000.mmci */
 539                 .clk            = &osc2_clk,
 540         }, {    /* PL050 KMI0 */
 541                 .dev_id         = "10006000.kmi",
 542                 .clk            = &osc2_clk,
 543         }, {    /* PL050 KMI1 */
 544                 .dev_id         = "10007000.kmi",
 545                 .clk            = &osc2_clk,
 546         }, {    /* PL011 UART0 */
 547                 .dev_id         = "10009000.uart",
 548                 .clk            = &osc2_clk,
 549         }, {    /* PL011 UART1 */
 550                 .dev_id         = "1000a000.uart",
 551                 .clk            = &osc2_clk,
 552         }, {    /* PL011 UART2 */
 553                 .dev_id         = "1000b000.uart",
 554                 .clk            = &osc2_clk,
 555         }, {    /* PL011 UART3 */
 556                 .dev_id         = "1000c000.uart",
 557                 .clk            = &osc2_clk,
 558         }, {    /* SP805 WDT */
 559                 .dev_id         = "1000f000.wdt",
 560                 .clk            = &v2m_ref_clk,
 561         }, {    /* PL111 CLCD */
 562                 .dev_id         = "1001f000.clcd",
 563                 .clk            = &osc1_clk,
 564         },
 565         /* RS1 memory map */
 566         {       /* PL180 MMCI */
 567                 .dev_id         = "mb:mmci", /* 1c050000.mmci */
 568                 .clk            = &osc2_clk,
 569         }, {    /* PL050 KMI0 */
 570                 .dev_id         = "1c060000.kmi",
 571                 .clk            = &osc2_clk,
 572         }, {    /* PL050 KMI1 */
 573                 .dev_id         = "1c070000.kmi",
 574                 .clk            = &osc2_clk,
 575         }, {    /* PL011 UART0 */
 576                 .dev_id         = "1c090000.uart",
 577                 .clk            = &osc2_clk,
 578         }, {    /* PL011 UART1 */
 579                 .dev_id         = "1c0a0000.uart",
 580                 .clk            = &osc2_clk,
 581         }, {    /* PL011 UART2 */
 582                 .dev_id         = "1c0b0000.uart",
 583                 .clk            = &osc2_clk,
 584         }, {    /* PL011 UART3 */
 585                 .dev_id         = "1c0c0000.uart",
 586                 .clk            = &osc2_clk,
 587         }, {    /* SP805 WDT */
 588                 .dev_id         = "1c0f0000.wdt",
 589                 .clk            = &v2m_ref_clk,
 590         }, {    /* PL111 CLCD */
 591                 .dev_id         = "1c1f0000.clcd",
 592                 .clk            = &osc1_clk,
 593         },
 594 };
 595
 596 void __init v2m_dt_init_early(void)
 597 {
 598         struct device_node *node;
 599         u32 dt_hbi;
 600
 601         node = of_find_compatible_node(NULL, NULL, "arm,vexpress-sysreg");
 602         v2m_sysreg_base = of_iomap(node, 0);
 603         if (WARN_ON(!v2m_sysreg_base))
 604                 return;
 605
 606         /* Confirm board type against DT property, if available */
 607         if (of_property_read_u32(allnodes, "arm,hbi", &dt_hbi) == 0) {
 608                 u32 misc = readl(v2m_sysreg_base + V2M_SYS_MISC);
 609                 u32 id = readl(v2m_sysreg_base + (misc & SYS_MISC_MASTERSITE ?
 610                                 V2M_SYS_PROCID1 : V2M_SYS_PROCID0));
 611                 u32 hbi = id & SYS_PROCIDx_HBI_MASK;
 612
 613                 if (WARN_ON(dt_hbi != hbi))
 614                         pr_warning("vexpress: DT HBI (%x) is not matching "
 615                                         "hardware (%x)!\n", dt_hbi, hbi);
 616         }
 617
 618         clkdev_add_table(v2m_dt_lookups, ARRAY_SIZE(v2m_dt_lookups));
 619 }
 620
 621 static  struct of_device_id vexpress_irq_match[] __initdata = {
 622         { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
 623         {}
 624 };
 625
 626 static void __init v2m_dt_init_irq(void)
 627 {
 628         of_irq_init(vexpress_irq_match);
 629 }
 630
 631 static void __init v2m_dt_timer_init(void)
 632 {
 633         struct device_node *node;
 634         const char *path;
 635         int err;
 636
 637         node = of_find_compatible_node(NULL, NULL, "arm,sp810");
 638         v2m_sysctl_init(of_iomap(node, 0));
 639
 640         err = of_property_read_string(of_aliases, "arm,v2m_timer", &path);
 641         if (WARN_ON(err))
 642                 return;
 643         node = of_find_node_by_path(path);
 644         v2m_sp804_init(of_iomap(node, 0), irq_of_parse_and_map(node, 0));
 645         if (arch_timer_of_register() != 0)
 646                 twd_local_timer_of_register();
 647
 648         if (arch_timer_sched_clock_init() != 0)
 649                 versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000);
 650 }
 651
 652 static struct sys_timer v2m_dt_timer = {
 653         .init = v2m_dt_timer_init,
 654 };
 655
 656 static struct of_dev_auxdata v2m_dt_auxdata_lookup[] __initdata = {
 657         OF_DEV_AUXDATA("arm,vexpress-flash", V2M_NOR0, "physmap-flash",
 658                         &v2m_flash_data),
 659         OF_DEV_AUXDATA("arm,primecell", V2M_MMCI, "mb:mmci", &v2m_mmci_data),
 660         /* RS1 memory map */
 661         OF_DEV_AUXDATA("arm,vexpress-flash", 0x08000000, "physmap-flash",
 662                         &v2m_flash_data),
 663         OF_DEV_AUXDATA("arm,primecell", 0x1c050000, "mb:mmci", &v2m_mmci_data),
 664         {}
 665 };
 666
 667 static void __init v2m_dt_init(void)
 668 {
 669         l2x0_of_init(0x00400000, 0xfe0fffff);
 670         of_platform_populate(NULL, of_default_bus_match_table,
 671                         v2m_dt_auxdata_lookup, NULL);
 672         pm_power_off = v2m_power_off;
 673 }
 674
 675 const static char *v2m_dt_match[] __initconst = {
 676         "arm,vexpress",
 677         NULL,
 678 };
 679
 680 DT_MACHINE_START(VEXPRESS_DT, "ARM-Versatile Express")
 681         .dt_compat      = v2m_dt_match,
 682         .map_io         = v2m_dt_map_io,
 683         .init_early     = v2m_dt_init_early,
 684         .init_irq       = v2m_dt_init_irq,
 685         .timer          = &v2m_dt_timer,
 686         .init_machine   = v2m_dt_init,
 687         .handle_irq     = gic_handle_irq,
 688         .restart        = v2m_restart,
 689 MACHINE_END
 690
 691 #endif