1b52d4782782a89b3b482deee830029a11f2ed81
[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-rockchip / dvfs.c
1 /* arch/arm/mach-rk30/rk30_dvfs.c
2  *
3  * Copyright (C) 2012 ROCKCHIP, Inc.
4  *
5  * This software is licensed under the terms of the GNU General Public
6  * License version 2, as published by the Free Software Foundation, and
7  * may be copied, distributed, and modified under those terms.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  */
15 #include <linux/slab.h>
16 #include <linux/clk.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/delay.h>
19 #include <linux/stat.h>
20 #include <linux/of.h>
21 #include <linux/opp.h>
22 #include <linux/rockchip/dvfs.h>
23 #include <linux/rockchip/common.h>
24
25 extern int rockchip_tsadc_get_temp(int chn);
26
27 #define MHz     (1000 * 1000)
28 static LIST_HEAD(rk_dvfs_tree);
29 static DEFINE_MUTEX(rk_dvfs_mutex);
30 static struct workqueue_struct *dvfs_wq;
31 static struct dvfs_node *clk_cpu_dvfs_node;
32 static unsigned int target_temp = 80;
33 static int temp_limit_enable = 1;
34
35 static void dvfs_volt_up_delay(struct vd_node *vd, int new_volt, int old_volt)
36 {
37         int u_time;
38         
39         if(new_volt <= old_volt)
40                 return;
41         if(vd->volt_time_flag > 0)      
42                 u_time = regulator_set_voltage_time(vd->regulator, old_volt, new_volt);
43         else
44                 u_time = -1;            
45         if(u_time < 0) {// regulator is not suported time,useing default time
46                 DVFS_DBG("%s:vd %s is not suported getting delay time,so we use default\n",
47                                 __func__, vd->name);
48                 u_time = ((new_volt) - (old_volt)) >> 9;
49         }
50         
51         DVFS_DBG("%s: vd %s volt %d to %d delay %d us\n", 
52                 __func__, vd->name, old_volt, new_volt, u_time);
53         
54         if (u_time >= 1000) {
55                 mdelay(u_time / 1000);
56                 udelay(u_time % 1000);
57                 DVFS_WARNING("%s: regulator set vol delay is larger 1ms,old is %d,new is %d\n",
58                         __func__, old_volt, new_volt);
59         } else if (u_time) {
60                 udelay(u_time);
61         }                       
62 }
63
64 static int dvfs_regulator_set_voltage_readback(struct regulator *regulator, int min_uV, int max_uV)
65 {
66         int ret = 0, read_back = 0;
67         
68         ret = dvfs_regulator_set_voltage(regulator, max_uV, max_uV);
69         if (ret < 0) {
70                 DVFS_ERR("%s: now read back to check voltage\n", __func__);
71
72                 /* read back to judge if it is already effect */
73                 mdelay(2);
74                 read_back = dvfs_regulator_get_voltage(regulator);
75                 if (read_back == max_uV) {
76                         DVFS_ERR("%s: set ERROR but already effected, volt=%d\n", __func__, read_back);
77                         ret = 0;
78                 } else {
79                         DVFS_ERR("%s: set ERROR AND NOT effected, volt=%d\n", __func__, read_back);
80                 }
81         }
82         
83         return ret;
84 }
85
86 static int dvfs_scale_volt_direct(struct vd_node *vd_clk, int volt_new)
87 {
88         int ret = 0;
89         
90         DVFS_DBG("%s: volt=%d(old=%d)\n", __func__, volt_new, vd_clk->cur_volt);
91         
92         if (IS_ERR_OR_NULL(vd_clk)) {
93                 DVFS_ERR("%s: vd_node error\n", __func__);
94                 return -EINVAL;
95         }
96
97         if (!IS_ERR_OR_NULL(vd_clk->regulator)) {
98                 ret = dvfs_regulator_set_voltage_readback(vd_clk->regulator, volt_new, volt_new);
99                 dvfs_volt_up_delay(vd_clk,volt_new, vd_clk->cur_volt);
100                 if (ret < 0) {
101                         vd_clk->volt_set_flag = DVFS_SET_VOLT_FAILURE;
102                         DVFS_ERR("%s: %s set voltage up err ret = %d, Vnew = %d(was %d)mV\n",
103                                         __func__, vd_clk->name, ret, volt_new, vd_clk->cur_volt);
104                         return -EAGAIN;
105                 }
106
107         } else {
108                 DVFS_ERR("%s: invalid regulator\n", __func__);
109                 return -EINVAL;
110         }
111
112         vd_clk->volt_set_flag = DVFS_SET_VOLT_SUCCESS;
113         vd_clk->cur_volt = volt_new;
114
115         return 0;
116
117 }
118
119 static int dvfs_reset_volt(struct vd_node *dvfs_vd)
120 {
121         int flag_set_volt_correct = 0;
122         if (!IS_ERR_OR_NULL(dvfs_vd->regulator))
123                 flag_set_volt_correct = dvfs_regulator_get_voltage(dvfs_vd->regulator);
124         else {
125                 DVFS_ERR("%s: invalid regulator\n", __func__);
126                 return -EINVAL;
127         }
128         if (flag_set_volt_correct <= 0) {
129                 DVFS_ERR("%s (vd:%s), try to reload volt ,by it is error again(%d)!!! stop scaling\n",
130                                 __func__, dvfs_vd->name, flag_set_volt_correct);
131                 return -EAGAIN;
132         }
133         dvfs_vd->volt_set_flag = DVFS_SET_VOLT_SUCCESS;
134         DVFS_WARNING("%s:vd(%s) try to reload volt = %d\n",
135                         __func__, dvfs_vd->name, flag_set_volt_correct);
136
137         /* Reset vd's voltage */
138         dvfs_vd->cur_volt = flag_set_volt_correct;
139
140         return dvfs_vd->cur_volt;
141 }
142
143
144 // for clk enable case to get vd regulator info
145 static void clk_enable_dvfs_regulator_check(struct vd_node *vd)
146 {
147         vd->cur_volt = dvfs_regulator_get_voltage(vd->regulator);
148         if(vd->cur_volt <= 0){
149                 vd->volt_set_flag = DVFS_SET_VOLT_FAILURE;
150         }
151         vd->volt_set_flag = DVFS_SET_VOLT_SUCCESS;
152 }
153
154 static void dvfs_get_vd_regulator_volt_list(struct vd_node *vd)
155 {
156         unsigned int i, selector = dvfs_regulator_count_voltages(vd->regulator);
157         int n = 0, sel_volt = 0;
158         
159         if(selector > VD_VOL_LIST_CNT)
160                 selector = VD_VOL_LIST_CNT;
161
162         for (i = 0; i < selector; i++) {
163                 sel_volt = dvfs_regulator_list_voltage(vd->regulator, i);
164                 if(sel_volt <= 0){      
165                         //DVFS_WARNING("%s: vd(%s) list volt selector=%u, but volt(%d) <=0\n",
166                         //      __func__, vd->name, i, sel_volt);
167                         continue;
168                 }
169                 vd->volt_list[n++] = sel_volt;  
170                 DVFS_DBG("%s: vd(%s) list volt selector=%u, n=%d, volt=%d\n", 
171                         __func__, vd->name, i, n, sel_volt);
172         }
173         
174         vd->n_voltages = n;
175 }
176
177 // >= volt
178 static int vd_regulator_round_volt_max(struct vd_node *vd, int volt)
179 {
180         int sel_volt;
181         int i;
182         
183         for (i = 0; i < vd->n_voltages; i++) {
184                 sel_volt = vd->volt_list[i];
185                 if(sel_volt <= 0){      
186                         DVFS_WARNING("%s: selector=%u, but volt <=0\n", 
187                                 __func__, i);
188                         continue;
189                 }
190                 if(sel_volt >= volt)
191                         return sel_volt;        
192         }
193         return -EINVAL;
194 }
195
196 // >=volt
197 static int vd_regulator_round_volt_min(struct vd_node *vd, int volt)
198 {
199         int sel_volt;
200         int i;
201         
202         for (i = 0; i < vd->n_voltages; i++) {
203                 sel_volt = vd->volt_list[i];
204                 if(sel_volt <= 0){      
205                         DVFS_WARNING("%s: selector=%u, but volt <=0\n", 
206                                 __func__, i);
207                         continue;
208                 }
209                 if(sel_volt > volt){
210                         if(i > 0)
211                                 return vd->volt_list[i-1];
212                         else
213                                 return -EINVAL;
214                 }       
215         }
216         
217         return -EINVAL;
218 }
219
220 // >=volt
221 static int vd_regulator_round_volt(struct vd_node *vd, int volt, int flags)
222 {
223         if(!vd->n_voltages)
224                 return -EINVAL;
225         if(flags == VD_LIST_RELATION_L)
226                 return vd_regulator_round_volt_min(vd, volt);
227         else
228                 return vd_regulator_round_volt_max(vd, volt);   
229 }
230
231 static void dvfs_table_round_volt(struct dvfs_node *clk_dvfs_node)
232 {
233         int i, test_volt;
234
235         if(!clk_dvfs_node->dvfs_table || !clk_dvfs_node->vd || 
236                 IS_ERR_OR_NULL(clk_dvfs_node->vd->regulator))
237                 return;
238
239         for (i = 0; (clk_dvfs_node->dvfs_table[i].frequency != CPUFREQ_TABLE_END); i++) {
240
241                 test_volt = vd_regulator_round_volt(clk_dvfs_node->vd, clk_dvfs_node->dvfs_table[i].index, VD_LIST_RELATION_H);
242                 if(test_volt <= 0)
243                 {       
244                         DVFS_WARNING("%s: clk(%s) round volt(%d) but list <=0\n",
245                                 __func__, clk_dvfs_node->name, clk_dvfs_node->dvfs_table[i].index);
246                         break;
247                 }
248                 DVFS_DBG("clk %s:round_volt %d to %d\n",
249                         clk_dvfs_node->name, clk_dvfs_node->dvfs_table[i].index, test_volt);
250                 
251                 clk_dvfs_node->dvfs_table[i].index=test_volt;           
252         }
253 }
254
255 static void dvfs_vd_get_regulator_volt_time_info(struct vd_node *vd)
256 {
257         if(vd->volt_time_flag <= 0){// check regulator support get uping vol timer
258                 vd->volt_time_flag = dvfs_regulator_set_voltage_time(vd->regulator, vd->cur_volt, vd->cur_volt+200*1000);
259                 if(vd->volt_time_flag < 0){
260                         DVFS_DBG("%s,vd %s volt_time is no support\n",
261                                 __func__, vd->name);
262                 }
263                 else{
264                         DVFS_DBG("%s,vd %s volt_time is support,up 200mv need delay %d us\n",
265                                 __func__, vd->name, vd->volt_time_flag);
266                 }       
267         }
268 }
269 #if 0
270 static void dvfs_vd_get_regulator_mode_info(struct vd_node *vd)
271 {
272         //REGULATOR_MODE_FAST
273         if(vd->mode_flag <= 0){// check regulator support get uping vol timer{
274                 vd->mode_flag = dvfs_regulator_get_mode(vd->regulator);
275                 if(vd->mode_flag==REGULATOR_MODE_FAST || vd->mode_flag==REGULATOR_MODE_NORMAL
276                         || vd->mode_flag == REGULATOR_MODE_IDLE || vd->mode_flag==REGULATOR_MODE_STANDBY){
277                         
278                         if(dvfs_regulator_set_mode(vd->regulator, vd->mode_flag) < 0){
279                                 vd->mode_flag = 0;// check again
280                         }
281                 }
282                 if(vd->mode_flag > 0){
283                         DVFS_DBG("%s,vd %s mode(now is %d) support\n",
284                                 __func__, vd->name, vd->mode_flag);
285                 }
286                 else{
287                         DVFS_DBG("%s,vd %s mode is not support now check\n",
288                                 __func__, vd->name);
289                 }
290         }
291 }
292 #endif
293
294 struct regulator *dvfs_get_regulator(char *regulator_name) 
295 {
296         struct vd_node *vd;
297
298         mutex_lock(&rk_dvfs_mutex);
299         list_for_each_entry(vd, &rk_dvfs_tree, node) {
300                 if (strcmp(regulator_name, vd->regulator_name) == 0) {
301                         mutex_unlock(&rk_dvfs_mutex);
302                         return vd->regulator;
303                 }
304         }
305         mutex_unlock(&rk_dvfs_mutex);
306         return NULL;
307 }
308
309 static int dvfs_get_rate_range(struct dvfs_node *clk_dvfs_node)
310 {
311         struct cpufreq_frequency_table *table;
312         int i = 0;
313
314         if (!clk_dvfs_node)
315                 return -1;
316
317         clk_dvfs_node->min_rate = 0;
318         clk_dvfs_node->max_rate = 0;
319
320         table = clk_dvfs_node->dvfs_table;
321         for (i = 0; table[i].frequency != CPUFREQ_TABLE_END; i++) {
322                 clk_dvfs_node->max_rate = table[i].frequency / 1000 * 1000 * 1000;
323                 if (i == 0)
324                         clk_dvfs_node->min_rate = table[i].frequency / 1000 * 1000 * 1000;
325         }
326
327         DVFS_DBG("%s: clk %s, limit rate [min, max] = [%u, %u]\n",
328                         __func__, clk_dvfs_node->name, clk_dvfs_node->min_rate, clk_dvfs_node->max_rate);
329
330         return 0;
331 }
332
333 static void dvfs_table_round_clk_rate(struct dvfs_node  *clk_dvfs_node)
334 {
335         int i, rate, temp_rate, flags;
336         
337         if(!clk_dvfs_node || !clk_dvfs_node->dvfs_table || !clk_dvfs_node->clk)
338                 return;
339
340         for (i = 0; (clk_dvfs_node->dvfs_table[i].frequency != CPUFREQ_TABLE_END); i++) {
341                 //ddr rate = real rate+flags
342                 flags = clk_dvfs_node->dvfs_table[i].frequency%1000;
343                 rate = (clk_dvfs_node->dvfs_table[i].frequency/1000)*1000;
344                 temp_rate = clk_round_rate(clk_dvfs_node->clk, rate*1000);
345                 if(temp_rate <= 0){     
346                         DVFS_WARNING("%s: clk(%s) rate %d round return %d\n",
347                                 __func__, clk_dvfs_node->name, clk_dvfs_node->dvfs_table[i].frequency, temp_rate);
348                         continue;
349                 }
350                 
351                 /* Set rate unit as MHZ */
352                 if (temp_rate % MHz != 0)
353                         temp_rate = (temp_rate / MHz + 1) * MHz;
354
355                 temp_rate = (temp_rate / 1000) + flags;
356                 
357                 DVFS_DBG("clk %s round_clk_rate %d to %d\n",
358                         clk_dvfs_node->name,clk_dvfs_node->dvfs_table[i].frequency, temp_rate);
359                 
360                 clk_dvfs_node->dvfs_table[i].frequency = temp_rate;             
361         }
362 }
363
364 static int clk_dvfs_node_get_ref_volt(struct dvfs_node *clk_dvfs_node, int rate_khz,
365                 struct cpufreq_frequency_table *clk_fv)
366 {
367         int i = 0;
368         
369         if (rate_khz == 0 || !clk_dvfs_node || !clk_dvfs_node->dvfs_table) {
370                 /* since no need */
371                 return -EINVAL;
372         }
373         clk_fv->frequency = rate_khz;
374         clk_fv->index = 0;
375
376         for (i = 0; (clk_dvfs_node->dvfs_table[i].frequency != CPUFREQ_TABLE_END); i++) {
377                 if (clk_dvfs_node->dvfs_table[i].frequency >= rate_khz) {
378                         clk_fv->frequency = clk_dvfs_node->dvfs_table[i].frequency;
379                         clk_fv->index = clk_dvfs_node->dvfs_table[i].index;
380                          //printk("%s,%s rate=%ukhz(vol=%d)\n",__func__,clk_dvfs_node->name,
381                          //clk_fv->frequency, clk_fv->index);
382                         return 0;
383                 }
384         }
385         clk_fv->frequency = 0;
386         clk_fv->index = 0;
387         //DVFS_DBG("%s get corresponding voltage error! out of bound\n", clk_dvfs_node->name);
388         return -1;
389 }
390
391 static int dvfs_pd_get_newvolt_byclk(struct pd_node *pd, struct dvfs_node *clk_dvfs_node)
392 {
393         int volt_max = 0;
394
395         if (!pd || !clk_dvfs_node)
396                 return 0;
397
398         if (clk_dvfs_node->set_volt >= pd->cur_volt) {
399                 return clk_dvfs_node->set_volt;
400         }
401
402         list_for_each_entry(clk_dvfs_node, &pd->clk_list, node) {
403                 // DVFS_DBG("%s ,pd(%s),dvfs(%s),volt(%u)\n",__func__,pd->name,
404                 // clk_dvfs_node->name,clk_dvfs_node->set_volt);
405                 volt_max = max(volt_max, clk_dvfs_node->set_volt);
406         }
407         return volt_max;
408 }
409
410 static void dvfs_update_clk_pds_volt(struct dvfs_node *clk_dvfs_node)
411 {
412         struct pd_node *pd;
413         
414         if (!clk_dvfs_node)
415                 return;
416         
417         pd = clk_dvfs_node->pd;
418         if (!pd)
419                 return ;
420         
421         pd->cur_volt = dvfs_pd_get_newvolt_byclk(pd, clk_dvfs_node);
422 }
423
424 static int dvfs_vd_get_newvolt_bypd(struct vd_node *vd)
425 {
426         int volt_max_vd = 0;
427         struct pd_node *pd;
428         //struct depend_list    *depend;
429
430         if (!vd)
431                 return -EINVAL;
432         
433         list_for_each_entry(pd, &vd->pd_list, node) {
434                 // DVFS_DBG("%s pd(%s,%u)\n",__func__,pd->name,pd->cur_volt);
435                 volt_max_vd = max(volt_max_vd, pd->cur_volt);
436         }
437
438         /* some clks depend on this voltage domain */
439 /*      if (!list_empty(&vd->req_volt_list)) {
440                 list_for_each_entry(depend, &vd->req_volt_list, node2vd) {
441                         volt_max_vd = max(volt_max_vd, depend->req_volt);
442                 }
443         }*/
444         return volt_max_vd;
445 }
446
447 static int dvfs_vd_get_newvolt_byclk(struct dvfs_node *clk_dvfs_node)
448 {
449         if (!clk_dvfs_node)
450                 return -1;
451         dvfs_update_clk_pds_volt(clk_dvfs_node);
452         return  dvfs_vd_get_newvolt_bypd(clk_dvfs_node->vd);
453 }
454 #if 0
455 static void dvfs_temp_limit_work_func(struct work_struct *work)
456 {
457         unsigned long delay = HZ / 10; // 100ms
458         struct vd_node *vd;
459         struct pd_node *pd;
460         struct dvfs_node *clk_dvfs_node;
461
462         queue_delayed_work_on(0, dvfs_wq, to_delayed_work(work), delay);
463
464         mutex_lock(&rk_dvfs_mutex);
465         list_for_each_entry(vd, &rk_dvfs_tree, node) {
466                 mutex_lock(&vd->mutex);
467                 list_for_each_entry(pd, &vd->pd_list, node) {
468                         list_for_each_entry(clk_dvfs_node, &pd->clk_list, node) {
469                                 if (clk_dvfs_node->temp_limit_table) {
470                                         clk_dvfs_node->temp = rockchip_tsadc_get_temp(clk_dvfs_node->temp_channel);
471                                         clk_dvfs_node->vd->vd_dvfs_target(clk_dvfs_node, clk_dvfs_node->last_set_rate);
472                                 }
473                         }
474                 }
475                 mutex_unlock(&vd->mutex);
476         }
477         mutex_unlock(&rk_dvfs_mutex);
478 }
479 #endif
480
481 static void dvfs_temp_limit_work_func(struct work_struct *work)
482 {
483         int temp=0, delta_temp=0;
484         unsigned long delay = HZ/10;
485         unsigned long arm_rate_step=0;
486         static int old_temp=0;
487         int i;
488
489         queue_delayed_work_on(0, dvfs_wq, to_delayed_work(work), delay);
490
491         temp = rockchip_tsadc_get_temp(1);
492
493         //debounce
494         delta_temp = (old_temp>temp) ? (old_temp-temp) : (temp-old_temp);
495         if (delta_temp <= 1)
496                 return;
497
498         if (ROCKCHIP_PM_POLICY_PERFORMANCE == rockchip_pm_get_policy()) {
499                 if (!clk_cpu_dvfs_node->per_temp_limit_table) {
500                         return;
501                 }
502
503                 clk_cpu_dvfs_node->temp_limit_rate = clk_cpu_dvfs_node->max_rate;
504                 for (i=0; clk_cpu_dvfs_node->per_temp_limit_table[i].frequency != CPUFREQ_TABLE_END; i++) {
505                         if (temp > clk_cpu_dvfs_node->per_temp_limit_table[i].index) {
506                                 clk_cpu_dvfs_node->temp_limit_rate = clk_cpu_dvfs_node->per_temp_limit_table[i].frequency;
507                         }
508                 }
509                 dvfs_clk_set_rate(clk_cpu_dvfs_node, clk_cpu_dvfs_node->last_set_rate);
510         } else if (ROCKCHIP_PM_POLICY_NORMAL == rockchip_pm_get_policy()){
511                 if (!clk_cpu_dvfs_node->nor_temp_limit_table) {
512                         return;
513                 }
514
515                 if (temp > target_temp) {
516                         if (temp > old_temp) {
517                                 delta_temp = temp - target_temp;
518                                 for (i=0; clk_cpu_dvfs_node->nor_temp_limit_table[i].frequency != CPUFREQ_TABLE_END; i++) {
519                                         if (delta_temp > clk_cpu_dvfs_node->nor_temp_limit_table[i].index) {
520                                                 arm_rate_step = clk_cpu_dvfs_node->nor_temp_limit_table[i].frequency;
521                                         }
522                                 }
523                                 if (arm_rate_step && (clk_cpu_dvfs_node->temp_limit_rate > arm_rate_step)) {
524                                         clk_cpu_dvfs_node->temp_limit_rate -= arm_rate_step;
525                                         dvfs_clk_set_rate(clk_cpu_dvfs_node, clk_cpu_dvfs_node->last_set_rate);
526                                 }
527                         }
528                 } else {
529                         if (clk_cpu_dvfs_node->temp_limit_rate < clk_cpu_dvfs_node->max_rate) {
530                                 delta_temp = target_temp - temp;
531                                 for (i=0; clk_cpu_dvfs_node->nor_temp_limit_table[i].frequency != CPUFREQ_TABLE_END; i++) {
532                                         if (delta_temp > clk_cpu_dvfs_node->nor_temp_limit_table[i].index) {
533                                                 arm_rate_step = clk_cpu_dvfs_node->nor_temp_limit_table[i].frequency;
534                                         }
535                                 }
536
537                                 if (arm_rate_step) {
538                                         clk_cpu_dvfs_node->temp_limit_rate += arm_rate_step;
539                                         if (clk_cpu_dvfs_node->temp_limit_rate > clk_cpu_dvfs_node->max_rate) {
540                                                 clk_cpu_dvfs_node->temp_limit_rate = clk_cpu_dvfs_node->max_rate;
541                                         }
542                                         dvfs_clk_set_rate(clk_cpu_dvfs_node, clk_cpu_dvfs_node->last_set_rate);
543                                 }
544                         }
545                 }
546         }
547
548         DVFS_DBG("cur temp: %d, temp_limit_core_rate: %lu\n", temp, clk_cpu_dvfs_node->temp_limit_rate);
549
550         old_temp = temp;
551 }
552 static DECLARE_DELAYED_WORK(dvfs_temp_limit_work, dvfs_temp_limit_work_func);
553
554
555 int dvfs_clk_enable_limit(struct dvfs_node *clk_dvfs_node, unsigned int min_rate, unsigned int max_rate)
556 {
557         u32 rate = 0, ret = 0;
558
559         if (!clk_dvfs_node || (min_rate > max_rate))
560                 return -EINVAL;
561         
562         if (clk_dvfs_node->vd && clk_dvfs_node->vd->vd_dvfs_target){
563                 mutex_lock(&clk_dvfs_node->vd->mutex);
564                 
565                 /* To reset clk_dvfs_node->min_rate/max_rate */
566                 dvfs_get_rate_range(clk_dvfs_node);
567                 clk_dvfs_node->freq_limit_en = 1;
568
569                 if ((min_rate >= clk_dvfs_node->min_rate) && (min_rate <= clk_dvfs_node->max_rate)) {
570                         clk_dvfs_node->min_rate = min_rate;
571                 }
572                 
573                 if ((max_rate >= clk_dvfs_node->min_rate) && (max_rate <= clk_dvfs_node->max_rate)) {
574                         clk_dvfs_node->max_rate = max_rate;
575                 }
576
577                 if (clk_dvfs_node->last_set_rate == 0)
578                         rate = clk_get_rate(clk_dvfs_node->clk);
579                 else
580                         rate = clk_dvfs_node->last_set_rate;
581                 ret = clk_dvfs_node->vd->vd_dvfs_target(clk_dvfs_node, rate);
582
583                 mutex_unlock(&clk_dvfs_node->vd->mutex);
584
585         }
586
587         DVFS_DBG("%s:clk(%s) last_set_rate=%u; [min_rate, max_rate]=[%u, %u]\n",
588                         __func__, __clk_get_name(clk_dvfs_node->clk), clk_dvfs_node->last_set_rate, 
589                         clk_dvfs_node->min_rate, clk_dvfs_node->max_rate);
590
591         return 0;
592 }
593 EXPORT_SYMBOL(dvfs_clk_enable_limit);
594
595 int dvfs_clk_disable_limit(struct dvfs_node *clk_dvfs_node)
596 {
597         u32 ret = 0;
598
599         if (!clk_dvfs_node)
600                 return -EINVAL;
601         
602         if (clk_dvfs_node->vd && clk_dvfs_node->vd->vd_dvfs_target){
603                 mutex_lock(&clk_dvfs_node->vd->mutex);
604                 
605                 /* To reset clk_dvfs_node->min_rate/max_rate */
606                 dvfs_get_rate_range(clk_dvfs_node);
607                 clk_dvfs_node->freq_limit_en = 0;
608                 ret = clk_dvfs_node->vd->vd_dvfs_target(clk_dvfs_node, clk_dvfs_node->last_set_rate);
609
610                 mutex_unlock(&clk_dvfs_node->vd->mutex);
611         }
612
613         DVFS_DBG("%s: clk(%s) last_set_rate=%u; [min_rate, max_rate]=[%u, %u]\n",
614                         __func__, __clk_get_name(clk_dvfs_node->clk), clk_dvfs_node->last_set_rate, clk_dvfs_node->min_rate, clk_dvfs_node->max_rate);
615         return 0;
616 }
617 EXPORT_SYMBOL(dvfs_clk_disable_limit);
618
619 int dvfs_clk_get_limit(struct dvfs_node *clk_dvfs_node, unsigned int *min_rate, unsigned int *max_rate) 
620 {
621         int freq_limit_en;
622
623         if (!clk_dvfs_node)
624                 return -EINVAL;
625
626         mutex_lock(&clk_dvfs_node->vd->mutex);
627
628         *min_rate = clk_dvfs_node->min_rate;
629         *max_rate = clk_dvfs_node->max_rate;
630         freq_limit_en = clk_dvfs_node->freq_limit_en;
631
632         mutex_unlock(&clk_dvfs_node->vd->mutex);
633
634         return freq_limit_en;
635 }
636 EXPORT_SYMBOL(dvfs_clk_get_limit);
637
638 int dvfs_clk_register_set_rate_callback(struct dvfs_node *clk_dvfs_node, clk_set_rate_callback clk_dvfs_target)
639 {
640         if (!clk_dvfs_node)
641                 return -EINVAL;
642                         
643         mutex_lock(&clk_dvfs_node->vd->mutex);
644         clk_dvfs_node->clk_dvfs_target = clk_dvfs_target;
645         mutex_unlock(&clk_dvfs_node->vd->mutex);
646
647         return 0;
648 }
649 EXPORT_SYMBOL(dvfs_clk_register_set_rate_callback);
650
651 struct cpufreq_frequency_table *dvfs_get_freq_volt_table(struct dvfs_node *clk_dvfs_node) 
652 {
653         struct cpufreq_frequency_table *table;
654
655         if (!clk_dvfs_node)
656                 return NULL;
657
658         mutex_lock(&clk_dvfs_node->vd->mutex);
659         table = clk_dvfs_node->dvfs_table;
660         mutex_unlock(&clk_dvfs_node->vd->mutex);
661         
662         return table;
663 }
664 EXPORT_SYMBOL(dvfs_get_freq_volt_table);
665
666 int dvfs_set_freq_volt_table(struct dvfs_node *clk_dvfs_node, struct cpufreq_frequency_table *table)
667 {
668         if (!clk_dvfs_node)
669                 return -EINVAL;
670
671         if (IS_ERR_OR_NULL(table)){
672                 DVFS_ERR("%s:invalid table!\n", __func__);
673                 return -EINVAL;
674         }
675         
676         mutex_lock(&clk_dvfs_node->vd->mutex);
677         clk_dvfs_node->dvfs_table = table;
678         dvfs_get_rate_range(clk_dvfs_node);
679         dvfs_table_round_clk_rate(clk_dvfs_node);
680         dvfs_table_round_volt(clk_dvfs_node);
681         mutex_unlock(&clk_dvfs_node->vd->mutex);
682
683         return 0;
684 }
685 EXPORT_SYMBOL(dvfs_set_freq_volt_table);
686
687 int clk_enable_dvfs(struct dvfs_node *clk_dvfs_node)
688 {
689         struct cpufreq_frequency_table clk_fv;
690
691         if (!clk_dvfs_node)
692                 return -EINVAL;
693         
694         DVFS_DBG("%s: dvfs clk(%s) enable dvfs!\n", 
695                 __func__, __clk_get_name(clk_dvfs_node->clk));
696
697         if (!clk_dvfs_node->vd) {
698                 DVFS_ERR("%s: dvfs node(%s) has no vd node!\n", 
699                         __func__, clk_dvfs_node->name);
700                 return -EINVAL;
701         }
702         mutex_lock(&clk_dvfs_node->vd->mutex);
703         if (clk_dvfs_node->enable_count == 0) {
704                 if (IS_ERR_OR_NULL(clk_dvfs_node->vd->regulator)) {
705                         if (clk_dvfs_node->vd->regulator_name)
706                                 clk_dvfs_node->vd->regulator = dvfs_regulator_get(NULL, clk_dvfs_node->vd->regulator_name);
707                         if (!IS_ERR_OR_NULL(clk_dvfs_node->vd->regulator)) {
708                                 DVFS_DBG("%s: vd(%s) get regulator(%s) ok\n",
709                                         __func__, clk_dvfs_node->vd->name, clk_dvfs_node->vd->regulator_name);
710                                 clk_enable_dvfs_regulator_check(clk_dvfs_node->vd);
711                                 dvfs_get_vd_regulator_volt_list(clk_dvfs_node->vd);
712                                 dvfs_vd_get_regulator_volt_time_info(clk_dvfs_node->vd);
713                         } else {
714                                 clk_dvfs_node->enable_count = 0;
715                                 DVFS_ERR("%s: vd(%s) can't get regulator(%s)!\n", 
716                                         __func__, clk_dvfs_node->vd->name, clk_dvfs_node->vd->regulator_name);
717                                 mutex_unlock(&clk_dvfs_node->vd->mutex);
718                                 return -ENXIO;
719                         }
720                 } else {
721                         clk_enable_dvfs_regulator_check(clk_dvfs_node->vd);
722                 }
723                 
724                 DVFS_DBG("%s: vd(%s) cur volt=%d\n",
725                         __func__, clk_dvfs_node->name, clk_dvfs_node->vd->cur_volt);
726
727                 dvfs_table_round_clk_rate(clk_dvfs_node);
728                 dvfs_get_rate_range(clk_dvfs_node);
729                 clk_dvfs_node->freq_limit_en = 1;
730                 dvfs_table_round_volt(clk_dvfs_node);
731                 clk_dvfs_node->set_freq = clk_dvfs_node_get_rate_kz(clk_dvfs_node->clk);
732                 clk_dvfs_node->last_set_rate = clk_dvfs_node->set_freq*1000;
733                 
734                 DVFS_DBG("%s: %s get freq %u!\n", 
735                         __func__, clk_dvfs_node->name, clk_dvfs_node->set_freq);
736
737                 if (clk_dvfs_node_get_ref_volt(clk_dvfs_node, clk_dvfs_node->set_freq, &clk_fv)) {
738                         if (clk_dvfs_node->dvfs_table[0].frequency == CPUFREQ_TABLE_END) {
739                                 DVFS_ERR("%s: table empty\n", __func__);
740                                 clk_dvfs_node->enable_count = 0;
741                                 mutex_unlock(&clk_dvfs_node->vd->mutex);
742                                 return -EINVAL;
743                         } else {
744                                 DVFS_WARNING("%s: clk(%s) freq table all value are smaller than default(%d), use default, just enable dvfs\n", 
745                                         __func__, clk_dvfs_node->name, clk_dvfs_node->set_freq);
746                                 clk_dvfs_node->enable_count++;
747                                 mutex_unlock(&clk_dvfs_node->vd->mutex);
748                                 return 0;
749                         }
750                 }
751
752                 clk_dvfs_node->set_volt = clk_fv.index;
753                 dvfs_vd_get_newvolt_byclk(clk_dvfs_node);
754                 DVFS_DBG("%s: %s, freq %u(ref vol %u)\n",
755                         __func__, clk_dvfs_node->name, clk_dvfs_node->set_freq, clk_dvfs_node->set_volt);
756 #if 0
757                 if (clk_dvfs_node->dvfs_nb) {
758                         // must unregister when clk disable
759                         clk_notifier_register(clk, clk_dvfs_node->dvfs_nb);
760                 }
761 #endif
762                 if(clk_dvfs_node->vd->cur_volt < clk_dvfs_node->set_volt) {
763                         int ret;
764                         ret = dvfs_regulator_set_voltage_readback(clk_dvfs_node->vd->regulator, clk_dvfs_node->set_volt, clk_dvfs_node->set_volt);
765                         if (ret < 0) {
766                                 clk_dvfs_node->vd->volt_set_flag = DVFS_SET_VOLT_FAILURE;
767                                 clk_dvfs_node->enable_count = 0;
768                                 DVFS_ERR("dvfs enable clk %s,set volt error \n", clk_dvfs_node->name);
769                                 mutex_unlock(&clk_dvfs_node->vd->mutex);
770                                 return -EAGAIN;
771                         }
772                         clk_dvfs_node->vd->cur_volt = clk_dvfs_node->set_volt;
773                         clk_dvfs_node->vd->volt_set_flag = DVFS_SET_VOLT_SUCCESS;
774                 }
775
776                 clk_dvfs_node->enable_count++;
777         } else {
778                 DVFS_DBG("%s: dvfs already enable clk enable = %d!\n",
779                         __func__, clk_dvfs_node->enable_count);
780                 clk_dvfs_node->enable_count++;
781         }
782
783         mutex_unlock(&clk_dvfs_node->vd->mutex);
784         
785         return 0;
786 }
787 EXPORT_SYMBOL(clk_enable_dvfs);
788
789 int clk_disable_dvfs(struct dvfs_node *clk_dvfs_node)
790 {
791         if (!clk_dvfs_node)
792                 return -EINVAL;
793
794         DVFS_DBG("%s:dvfs clk(%s) disable dvfs!\n", 
795                 __func__, __clk_get_name(clk_dvfs_node->clk));
796
797         mutex_lock(&clk_dvfs_node->vd->mutex);
798         if (!clk_dvfs_node->enable_count) {
799                 DVFS_WARNING("%s:clk(%s) is already closed!\n", 
800                         __func__, __clk_get_name(clk_dvfs_node->clk));
801                 return 0;
802         } else {
803                 clk_dvfs_node->enable_count--;
804                 if (0 == clk_dvfs_node->enable_count) {
805                         DVFS_DBG("%s:dvfs clk(%s) disable dvfs ok!\n",
806                                 __func__, __clk_get_name(clk_dvfs_node->clk));
807 #if 0
808                         clk_notifier_unregister(clk, clk_dvfs_node->dvfs_nb);
809                         DVFS_DBG("clk unregister nb!\n");
810 #endif
811                 }
812         }
813         mutex_unlock(&clk_dvfs_node->vd->mutex);
814         return 0;
815 }
816 EXPORT_SYMBOL(clk_disable_dvfs);
817
818
819
820
821 static unsigned long dvfs_get_limit_rate(struct dvfs_node *clk_dvfs_node, unsigned long rate)
822 {
823         unsigned long limit_rate;
824
825         limit_rate = rate;
826         if (clk_dvfs_node->freq_limit_en) {
827                 //dvfs table limit
828                 if (rate < clk_dvfs_node->min_rate) {
829                         limit_rate = clk_dvfs_node->min_rate;
830                 } else if (rate > clk_dvfs_node->max_rate) {
831                         limit_rate = clk_dvfs_node->max_rate;
832                 }
833
834                 if (limit_rate > clk_dvfs_node->temp_limit_rate) {
835                         limit_rate = clk_dvfs_node->temp_limit_rate;
836                 }
837         }
838
839         DVFS_DBG("%s: rate:%ld, limit_rate:%ld,\n", __func__, rate, limit_rate);
840
841         return limit_rate;
842 }
843
844 static int dvfs_target(struct dvfs_node *clk_dvfs_node, unsigned long rate)
845 {
846         struct cpufreq_frequency_table clk_fv;
847         unsigned long old_rate = 0, new_rate = 0, volt_new = 0, clk_volt_store = 0;
848         struct clk *clk = clk_dvfs_node->clk;
849         int ret;
850
851         if (!clk)
852                 return -EINVAL;
853
854         if (!clk_dvfs_node->enable_count){
855                 DVFS_WARNING("%s:dvfs(%s) is disable\n", 
856                         __func__, clk_dvfs_node->name);
857                 return 0;
858         }
859         
860         if (clk_dvfs_node->vd->volt_set_flag == DVFS_SET_VOLT_FAILURE) {
861                 /* It means the last time set voltage error */
862                 ret = dvfs_reset_volt(clk_dvfs_node->vd);
863                 if (ret < 0) {
864                         return -EAGAIN;
865                 }
866         }
867
868         rate = dvfs_get_limit_rate(clk_dvfs_node, rate);
869         new_rate = clk_round_rate(clk, rate);
870         old_rate = clk_get_rate(clk);
871         if (new_rate == old_rate)
872                 return 0;
873
874         DVFS_DBG("enter %s: clk(%s) new_rate = %lu Hz, old_rate =  %lu Hz\n", 
875                 __func__, clk_dvfs_node->name, rate, old_rate); 
876
877         /* find the clk corresponding voltage */
878         ret = clk_dvfs_node_get_ref_volt(clk_dvfs_node, new_rate / 1000, &clk_fv);
879         if (ret) {
880                 DVFS_ERR("%s:dvfs clk(%s) rate %luhz is not support\n",
881                         __func__, clk_dvfs_node->name, new_rate);
882                 return ret;
883         }
884         clk_volt_store = clk_dvfs_node->set_volt;
885         clk_dvfs_node->set_volt = clk_fv.index;
886         volt_new = dvfs_vd_get_newvolt_byclk(clk_dvfs_node);
887         DVFS_DBG("%s:%s new rate=%lu(was=%lu),new volt=%lu,(was=%d)\n",
888                 __func__, clk_dvfs_node->name, new_rate, old_rate, volt_new,clk_dvfs_node->vd->cur_volt);
889
890         /* if up the rate */
891         if (new_rate > old_rate) {
892                 ret = dvfs_scale_volt_direct(clk_dvfs_node->vd, volt_new);
893                 if (ret)
894                         goto fail_roll_back;
895         }
896
897         /* scale rate */
898         if (clk_dvfs_node->clk_dvfs_target) {
899                 ret = clk_dvfs_node->clk_dvfs_target(clk, new_rate);
900         } else {
901                 ret = clk_set_rate(clk, new_rate);
902         }
903
904         if (ret) {
905                 DVFS_ERR("%s:clk(%s) set rate err\n", 
906                         __func__, __clk_get_name(clk));
907                 goto fail_roll_back;
908         }
909         clk_dvfs_node->set_freq = new_rate / 1000;
910
911         DVFS_DBG("%s:dvfs clk(%s) set rate %lu ok\n", 
912                 __func__, clk_dvfs_node->name, clk_get_rate(clk));
913
914         /* if down the rate */
915         if (new_rate < old_rate) {
916                 ret = dvfs_scale_volt_direct(clk_dvfs_node->vd, volt_new);
917                 if (ret)
918                         goto out;
919         }
920
921         return 0;
922 fail_roll_back:
923         clk_dvfs_node->set_volt = clk_volt_store;
924 out:
925         return ret;
926 }
927
928 unsigned long dvfs_clk_get_rate(struct dvfs_node *clk_dvfs_node)
929 {
930         return clk_get_rate(clk_dvfs_node->clk);
931 }
932 EXPORT_SYMBOL_GPL(dvfs_clk_get_rate);
933
934 int dvfs_clk_enable(struct dvfs_node *clk_dvfs_node)
935 {
936         return clk_enable(clk_dvfs_node->clk);
937 }
938 EXPORT_SYMBOL_GPL(dvfs_clk_enable);
939
940 void dvfs_clk_disable(struct dvfs_node *clk_dvfs_node)
941 {
942         return clk_disable(clk_dvfs_node->clk);
943 }
944 EXPORT_SYMBOL_GPL(dvfs_clk_disable);
945
946 struct dvfs_node *clk_get_dvfs_node(char *clk_name)
947 {
948         struct vd_node *vd;
949         struct pd_node *pd;
950         struct dvfs_node *clk_dvfs_node;
951
952         mutex_lock(&rk_dvfs_mutex);
953         list_for_each_entry(vd, &rk_dvfs_tree, node) {
954                 mutex_lock(&vd->mutex);
955                 list_for_each_entry(pd, &vd->pd_list, node) {
956                         list_for_each_entry(clk_dvfs_node, &pd->clk_list, node) {
957                                 if (0 == strcmp(clk_dvfs_node->name, clk_name)) {
958                                         mutex_unlock(&vd->mutex);
959                                         mutex_unlock(&rk_dvfs_mutex);
960                                         return clk_dvfs_node;
961                                 }
962                         }
963                 }
964                 mutex_unlock(&vd->mutex);
965         }
966         mutex_unlock(&rk_dvfs_mutex);
967         
968         return NULL;    
969 }
970 EXPORT_SYMBOL_GPL(clk_get_dvfs_node);
971
972 void clk_put_dvfs_node(struct dvfs_node *clk_dvfs_node)
973 {
974         return;
975 }
976 EXPORT_SYMBOL_GPL(clk_put_dvfs_node);
977
978 int dvfs_clk_prepare_enable(struct dvfs_node *clk_dvfs_node)
979 {
980         return clk_prepare_enable(clk_dvfs_node->clk);
981 }
982 EXPORT_SYMBOL_GPL(dvfs_clk_prepare_enable);
983
984
985 void dvfs_clk_disable_unprepare(struct dvfs_node *clk_dvfs_node)
986 {
987         clk_disable_unprepare(clk_dvfs_node->clk);
988 }
989 EXPORT_SYMBOL_GPL(dvfs_clk_disable_unprepare);
990
991 int dvfs_clk_set_rate(struct dvfs_node *clk_dvfs_node, unsigned long rate)
992 {
993         int ret = -EINVAL;
994         
995         if (!clk_dvfs_node)
996                 return -EINVAL;
997         
998         DVFS_DBG("%s:dvfs node(%s) set rate(%lu)\n", 
999                 __func__, clk_dvfs_node->name, rate);
1000         
1001         #if 0 // judge by reference func in rk
1002         if (dvfs_support_clk_set_rate(dvfs_info)==false) {
1003                 DVFS_ERR("dvfs func:%s is not support!\n", __func__);
1004                 return ret;
1005         }
1006         #endif
1007
1008         if (clk_dvfs_node->vd && clk_dvfs_node->vd->vd_dvfs_target) {
1009                 mutex_lock(&clk_dvfs_node->vd->mutex);
1010                 ret = clk_dvfs_node->vd->vd_dvfs_target(clk_dvfs_node, rate);
1011                 clk_dvfs_node->last_set_rate = rate;
1012                 mutex_unlock(&clk_dvfs_node->vd->mutex);
1013         } else {
1014                 DVFS_ERR("%s:dvfs node(%s) has no vd node or target callback!\n", 
1015                         __func__, clk_dvfs_node->name);
1016         }
1017                 
1018         return ret;     
1019 }
1020 EXPORT_SYMBOL_GPL(dvfs_clk_set_rate);
1021
1022
1023 int rk_regist_vd(struct vd_node *vd)
1024 {
1025         if (!vd)
1026                 return -EINVAL;
1027
1028         vd->mode_flag=0;
1029         vd->volt_time_flag=0;
1030         vd->n_voltages=0;
1031         INIT_LIST_HEAD(&vd->pd_list);
1032         mutex_lock(&rk_dvfs_mutex);
1033         list_add(&vd->node, &rk_dvfs_tree);
1034         mutex_unlock(&rk_dvfs_mutex);
1035
1036         return 0;
1037 }
1038 EXPORT_SYMBOL_GPL(rk_regist_vd);
1039
1040 int rk_regist_pd(struct pd_node *pd)
1041 {
1042         struct vd_node  *vd;
1043
1044         if (!pd)
1045                 return -EINVAL;
1046
1047         vd = pd->vd;
1048         if (!vd)
1049                 return -EINVAL;
1050
1051         INIT_LIST_HEAD(&pd->clk_list);
1052         mutex_lock(&vd->mutex);
1053         list_add(&pd->node, &vd->pd_list);
1054         mutex_unlock(&vd->mutex);
1055         
1056         return 0;
1057 }
1058 EXPORT_SYMBOL_GPL(rk_regist_pd);
1059
1060 int rk_regist_clk(struct dvfs_node *clk_dvfs_node)
1061 {
1062         struct vd_node  *vd;
1063         struct pd_node  *pd;
1064
1065         if (!clk_dvfs_node)
1066                 return -EINVAL;
1067
1068         vd = clk_dvfs_node->vd;
1069         pd = clk_dvfs_node->pd;
1070         if (!vd || !pd)
1071                 return -EINVAL;
1072
1073         mutex_lock(&vd->mutex);
1074         list_add(&clk_dvfs_node->node, &pd->clk_list);
1075         mutex_unlock(&vd->mutex);
1076         
1077         return 0;
1078 }
1079 EXPORT_SYMBOL_GPL(rk_regist_clk);
1080
1081 static int rk_convert_cpufreq_table(struct dvfs_node *dvfs_node)
1082 {
1083         struct opp *opp;
1084         struct device *dev;
1085         struct cpufreq_frequency_table *table;
1086         int i;
1087
1088         table = dvfs_node->dvfs_table;
1089         dev = &dvfs_node->dev;
1090
1091         for (i = 0; table[i].frequency!= CPUFREQ_TABLE_END; i++){
1092                 opp = opp_find_freq_exact(dev, table[i].frequency * 1000, true);
1093                 if (IS_ERR(opp))
1094                         return PTR_ERR(opp);
1095                 table[i].index = opp_get_voltage(opp);
1096         }
1097         return 0;
1098 }
1099
1100 static struct cpufreq_frequency_table *of_get_temp_limit_table(struct device_node *dev_node, const char *propname)
1101 {
1102         struct cpufreq_frequency_table *temp_limt_table = NULL;
1103         const struct property *prop;
1104         const __be32 *val;
1105         int nr, i;
1106
1107         prop = of_find_property(dev_node, propname, NULL);
1108         if (!prop)
1109                 return NULL;
1110         if (!prop->value)
1111                 return NULL;
1112
1113         nr = prop->length / sizeof(u32);
1114         if (nr % 2) {
1115                 pr_err("%s: Invalid freq list\n", __func__);
1116                 return NULL;
1117         }
1118
1119         temp_limt_table = kzalloc(sizeof(struct cpufreq_frequency_table) *
1120                              (nr/2 + 1), GFP_KERNEL);
1121
1122         val = prop->value;
1123
1124         for (i=0; i<nr/2; i++){
1125                 temp_limt_table[i].index = be32_to_cpup(val++);
1126                 temp_limt_table[i].frequency = be32_to_cpup(val++) * 1000;
1127         }
1128
1129         temp_limt_table[i].index = 0;
1130         temp_limt_table[i].frequency = CPUFREQ_TABLE_END;
1131
1132         return temp_limt_table;
1133
1134 }
1135
1136 int of_dvfs_init(void)
1137 {
1138         struct vd_node *vd;
1139         struct pd_node *pd;
1140         struct device_node *dvfs_dev_node, *clk_dev_node, *vd_dev_node, *pd_dev_node;
1141         struct dvfs_node *dvfs_node;
1142         struct clk *clk;
1143         const __be32 *val;
1144         int ret;
1145
1146         DVFS_DBG("%s\n", __func__);
1147
1148         dvfs_dev_node = of_find_node_by_name(NULL, "dvfs");
1149         if (IS_ERR_OR_NULL(dvfs_dev_node)) {
1150                 DVFS_ERR("%s get dvfs dev node err\n", __func__);
1151                 return PTR_ERR(dvfs_dev_node);
1152         }
1153
1154         val = of_get_property(dvfs_dev_node, "target-temp", NULL);
1155         if (val) {
1156                 target_temp = be32_to_cpup(val);
1157         }
1158
1159         val = of_get_property(dvfs_dev_node, "temp-limit-enable", NULL);
1160         if (val) {
1161                 temp_limit_enable = be32_to_cpup(val);
1162         }
1163
1164         for_each_available_child_of_node(dvfs_dev_node, vd_dev_node) {
1165                 vd = kzalloc(sizeof(struct vd_node), GFP_KERNEL);
1166                 if (!vd)
1167                         return -ENOMEM;
1168
1169                 mutex_init(&vd->mutex);
1170                 vd->name = vd_dev_node->name;
1171                 ret = of_property_read_string(vd_dev_node, "regulator_name", &vd->regulator_name);
1172                 if (ret) {
1173                         DVFS_ERR("%s:vd(%s) get regulator_name err, ret:%d\n", 
1174                                 __func__, vd_dev_node->name, ret);
1175                         kfree(vd);
1176                         continue;
1177                 }
1178                 
1179                 vd->suspend_volt = 0;
1180                 
1181                 vd->volt_set_flag = DVFS_SET_VOLT_FAILURE;
1182                 vd->vd_dvfs_target = dvfs_target;
1183                 ret = rk_regist_vd(vd);
1184                 if (ret){
1185                         DVFS_ERR("%s:vd(%s) register err:%d\n", __func__, vd->name, ret);
1186                         kfree(vd);
1187                         continue;
1188                 }
1189
1190                 DVFS_DBG("%s:vd(%s) register ok, regulator name:%s,suspend volt:%d\n", 
1191                         __func__, vd->name, vd->regulator_name, vd->suspend_volt);
1192                 
1193                 for_each_available_child_of_node(vd_dev_node, pd_dev_node) {            
1194                         pd = kzalloc(sizeof(struct pd_node), GFP_KERNEL);
1195                         if (!pd)
1196                                 return -ENOMEM;
1197
1198                         pd->vd = vd;
1199                         pd->name = pd_dev_node->name;
1200                         
1201                         ret = rk_regist_pd(pd);
1202                         if (ret){
1203                                 DVFS_ERR("%s:pd(%s) register err:%d\n", __func__, pd->name, ret);
1204                                 kfree(pd);
1205                                 continue;
1206                         }
1207                         DVFS_DBG("%s:pd(%s) register ok, parent vd:%s\n", 
1208                                 __func__, pd->name, vd->name);                  
1209                         for_each_available_child_of_node(pd_dev_node, clk_dev_node) {
1210                                 if (!of_device_is_available(clk_dev_node))
1211                                         continue;
1212                                 
1213                                 dvfs_node = kzalloc(sizeof(struct dvfs_node), GFP_KERNEL);
1214                                 if (!dvfs_node)
1215                                         return -ENOMEM;
1216                                 
1217                                 dvfs_node->name = clk_dev_node->name;
1218                                 dvfs_node->pd = pd;
1219                                 dvfs_node->vd = vd;
1220                                 if (temp_limit_enable) {
1221                                         val = of_get_property(clk_dev_node, "temp-channel", NULL);
1222                                         if (val) {
1223                                                 dvfs_node->temp_channel = be32_to_cpup(val);
1224                                         }
1225                                         dvfs_node->nor_temp_limit_table = of_get_temp_limit_table(clk_dev_node, "normal-temp-limit");
1226                                         dvfs_node->per_temp_limit_table = of_get_temp_limit_table(clk_dev_node, "performance-temp-limit");
1227                                 }
1228                                 dvfs_node->temp_limit_rate = -1;
1229                                 dvfs_node->dev.of_node = clk_dev_node;
1230                                 ret = of_init_opp_table(&dvfs_node->dev);
1231                                 if (ret) {
1232                                         DVFS_ERR("%s:clk(%s) get opp table err:%d\n", __func__, dvfs_node->name, ret);
1233                                         kfree(dvfs_node);
1234                                         continue;
1235                                 }
1236                                 
1237                                 ret = opp_init_cpufreq_table(&dvfs_node->dev, &dvfs_node->dvfs_table);
1238                                 if (ret) {
1239                                         DVFS_ERR("%s:clk(%s) get cpufreq table err:%d\n", __func__, dvfs_node->name, ret);
1240                                         kfree(dvfs_node);
1241                                         continue;
1242                                 }
1243                                 ret = rk_convert_cpufreq_table(dvfs_node);
1244                                 if (ret) {
1245                                         kfree(dvfs_node);
1246                                         continue;
1247                                 }
1248                                 
1249                                 clk = clk_get(NULL, clk_dev_node->name);
1250                                 if (IS_ERR(clk)){
1251                                         DVFS_ERR("%s:get clk(%s) err:%ld\n", __func__, dvfs_node->name, PTR_ERR(clk));
1252                                         kfree(dvfs_node);
1253                                         continue;
1254                                         
1255                                 }
1256                                 
1257                                 dvfs_node->clk = clk;
1258                                 ret = rk_regist_clk(dvfs_node);
1259                                 if (ret){
1260                                         DVFS_ERR("%s:dvfs_node(%s) register err:%d\n", __func__, dvfs_node->name, ret);
1261                                         return ret;
1262                                 }
1263
1264                                 DVFS_DBG("%s:dvfs_node(%s) register ok, parent pd:%s\n", 
1265                                         __func__, clk_dev_node->name, pd->name);        
1266
1267                         }
1268                 }       
1269         }
1270         return 0;
1271 }
1272
1273 /*********************************************************************************/
1274 /**
1275  * dump_dbg_map() : Draw all informations of dvfs while debug
1276  */
1277 static int dump_dbg_map(char *buf)
1278 {
1279         int i;
1280         struct vd_node  *vd;
1281         struct pd_node  *pd;
1282         struct dvfs_node        *clk_dvfs_node;
1283         char *s = buf;
1284         
1285         mutex_lock(&rk_dvfs_mutex);
1286         printk( "-------------DVFS TREE-----------\n\n\n");
1287         printk( "DVFS TREE:\n");
1288
1289         list_for_each_entry(vd, &rk_dvfs_tree, node) {
1290                 mutex_lock(&vd->mutex);
1291                 printk( "|\n|- voltage domain:%s\n", vd->name);
1292                 printk( "|- current voltage:%d\n", vd->cur_volt);
1293
1294                 list_for_each_entry(pd, &vd->pd_list, node) {
1295                         printk( "|  |\n|  |- power domain:%s, status = %s, current volt = %d\n",
1296                                         pd->name, (pd->pd_status == 1) ? "ON" : "OFF", pd->cur_volt);
1297
1298                         list_for_each_entry(clk_dvfs_node, &pd->clk_list, node) {
1299                                 printk( "|  |  |\n|  |  |- clock: %s current: rate %d, volt = %d,"
1300                                                 " enable_dvfs = %s\n",
1301                                                 clk_dvfs_node->name, clk_dvfs_node->set_freq, clk_dvfs_node->set_volt,
1302                                                 clk_dvfs_node->enable_count == 0 ? "DISABLE" : "ENABLE");
1303                                 printk( "|  |  |- clk limit(%s):[%u, %u]; last set rate = %u\n",
1304                                                 clk_dvfs_node->freq_limit_en ? "enable" : "disable",
1305                                                 clk_dvfs_node->min_rate, clk_dvfs_node->max_rate,
1306                                                 clk_dvfs_node->last_set_rate/1000);
1307
1308                                 for (i = 0; (clk_dvfs_node->dvfs_table[i].frequency != CPUFREQ_TABLE_END); i++) {
1309                                         printk( "|  |  |  |- freq = %d, volt = %d\n",
1310                                                         clk_dvfs_node->dvfs_table[i].frequency,
1311                                                         clk_dvfs_node->dvfs_table[i].index);
1312
1313                                 }
1314                         }
1315                 }
1316                 mutex_unlock(&vd->mutex);
1317         }
1318         
1319         printk( "-------------DVFS TREE END------------\n");
1320         mutex_unlock(&rk_dvfs_mutex);
1321         
1322         return s - buf;
1323 }
1324
1325 /*********************************************************************************/
1326 static struct kobject *dvfs_kobj;
1327 struct dvfs_attribute {
1328         struct attribute        attr;
1329         ssize_t (*show)(struct kobject *kobj, struct kobj_attribute *attr,
1330                         char *buf);
1331         ssize_t (*store)(struct kobject *kobj, struct kobj_attribute *attr,
1332                         const char *buf, size_t n);
1333 };
1334
1335 static ssize_t dvfs_tree_store(struct kobject *kobj, struct kobj_attribute *attr,
1336                const char *buf, size_t n)
1337 {
1338        return n;
1339 }
1340 static ssize_t dvfs_tree_show(struct kobject *kobj, struct kobj_attribute *attr,
1341                char *buf)
1342 {
1343        return dump_dbg_map(buf);
1344 }
1345
1346
1347 static struct dvfs_attribute dvfs_attrs[] = {
1348         /*     node_name        permision               show_func       store_func */
1349 //#ifdef CONFIG_RK_CLOCK_PROC
1350         __ATTR(dvfs_tree,       S_IRUSR | S_IRGRP | S_IWUSR,    dvfs_tree_show, dvfs_tree_store),
1351 //#endif
1352 };
1353
1354 static int __init dvfs_init(void)
1355 {
1356         int i, ret = 0;
1357
1358         dvfs_kobj = kobject_create_and_add("dvfs", NULL);
1359         if (!dvfs_kobj)
1360                 return -ENOMEM;
1361         for (i = 0; i < ARRAY_SIZE(dvfs_attrs); i++) {
1362                 ret = sysfs_create_file(dvfs_kobj, &dvfs_attrs[i].attr);
1363                 if (ret != 0) {
1364                         DVFS_ERR("create index %d error\n", i);
1365                         return ret;
1366                 }
1367         }
1368
1369         if (temp_limit_enable) {
1370                 clk_cpu_dvfs_node = clk_get_dvfs_node("clk_core");
1371                 if (!clk_cpu_dvfs_node){
1372                         return -EINVAL;
1373                 }
1374
1375                 clk_cpu_dvfs_node->temp_limit_rate = clk_cpu_dvfs_node->max_rate;
1376                 dvfs_wq = alloc_workqueue("dvfs", WQ_NON_REENTRANT | WQ_MEM_RECLAIM | WQ_HIGHPRI | WQ_FREEZABLE, 1);
1377                 queue_delayed_work_on(0, dvfs_wq, &dvfs_temp_limit_work, 0*HZ);
1378         }
1379
1380         return ret;
1381 }
1382
1383 late_initcall(dvfs_init);