1 /* arch/arm/mach-rk30/rk30_dvfs.c
3 * Copyright (C) 2012 ROCKCHIP, Inc.
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <linux/slab.h>
16 #include <linux/clk.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/delay.h>
19 #include <linux/stat.h>
21 #include <linux/opp.h>
22 #include <linux/rockchip/dvfs.h>
23 #include <linux/rockchip/common.h>
25 extern int rockchip_tsadc_get_temp(int chn);
27 #define MHz (1000 * 1000)
28 static LIST_HEAD(rk_dvfs_tree);
29 static DEFINE_MUTEX(rk_dvfs_mutex);
30 static struct workqueue_struct *dvfs_wq;
31 static struct dvfs_node *clk_cpu_dvfs_node;
32 static unsigned int target_temp = 80;
33 static int temp_limit_enable = 1;
35 static void dvfs_volt_up_delay(struct vd_node *vd, int new_volt, int old_volt)
39 if(new_volt <= old_volt)
41 if(vd->volt_time_flag > 0)
42 u_time = regulator_set_voltage_time(vd->regulator, old_volt, new_volt);
45 if(u_time < 0) {// regulator is not suported time,useing default time
46 DVFS_DBG("%s:vd %s is not suported getting delay time,so we use default\n",
48 u_time = ((new_volt) - (old_volt)) >> 9;
51 DVFS_DBG("%s: vd %s volt %d to %d delay %d us\n",
52 __func__, vd->name, old_volt, new_volt, u_time);
55 mdelay(u_time / 1000);
56 udelay(u_time % 1000);
57 DVFS_WARNING("%s: regulator set vol delay is larger 1ms,old is %d,new is %d\n",
58 __func__, old_volt, new_volt);
64 static int dvfs_regulator_set_voltage_readback(struct regulator *regulator, int min_uV, int max_uV)
66 int ret = 0, read_back = 0;
68 ret = dvfs_regulator_set_voltage(regulator, max_uV, max_uV);
70 DVFS_ERR("%s: now read back to check voltage\n", __func__);
72 /* read back to judge if it is already effect */
74 read_back = dvfs_regulator_get_voltage(regulator);
75 if (read_back == max_uV) {
76 DVFS_ERR("%s: set ERROR but already effected, volt=%d\n", __func__, read_back);
79 DVFS_ERR("%s: set ERROR AND NOT effected, volt=%d\n", __func__, read_back);
86 static int dvfs_scale_volt_direct(struct vd_node *vd_clk, int volt_new)
90 DVFS_DBG("%s: volt=%d(old=%d)\n", __func__, volt_new, vd_clk->cur_volt);
92 if (IS_ERR_OR_NULL(vd_clk)) {
93 DVFS_ERR("%s: vd_node error\n", __func__);
97 if (!IS_ERR_OR_NULL(vd_clk->regulator)) {
98 ret = dvfs_regulator_set_voltage_readback(vd_clk->regulator, volt_new, volt_new);
99 dvfs_volt_up_delay(vd_clk,volt_new, vd_clk->cur_volt);
101 vd_clk->volt_set_flag = DVFS_SET_VOLT_FAILURE;
102 DVFS_ERR("%s: %s set voltage up err ret = %d, Vnew = %d(was %d)mV\n",
103 __func__, vd_clk->name, ret, volt_new, vd_clk->cur_volt);
108 DVFS_ERR("%s: invalid regulator\n", __func__);
112 vd_clk->volt_set_flag = DVFS_SET_VOLT_SUCCESS;
113 vd_clk->cur_volt = volt_new;
119 static int dvfs_reset_volt(struct vd_node *dvfs_vd)
121 int flag_set_volt_correct = 0;
122 if (!IS_ERR_OR_NULL(dvfs_vd->regulator))
123 flag_set_volt_correct = dvfs_regulator_get_voltage(dvfs_vd->regulator);
125 DVFS_ERR("%s: invalid regulator\n", __func__);
128 if (flag_set_volt_correct <= 0) {
129 DVFS_ERR("%s (vd:%s), try to reload volt ,by it is error again(%d)!!! stop scaling\n",
130 __func__, dvfs_vd->name, flag_set_volt_correct);
133 dvfs_vd->volt_set_flag = DVFS_SET_VOLT_SUCCESS;
134 DVFS_WARNING("%s:vd(%s) try to reload volt = %d\n",
135 __func__, dvfs_vd->name, flag_set_volt_correct);
137 /* Reset vd's voltage */
138 dvfs_vd->cur_volt = flag_set_volt_correct;
140 return dvfs_vd->cur_volt;
144 // for clk enable case to get vd regulator info
145 static void clk_enable_dvfs_regulator_check(struct vd_node *vd)
147 vd->cur_volt = dvfs_regulator_get_voltage(vd->regulator);
148 if(vd->cur_volt <= 0){
149 vd->volt_set_flag = DVFS_SET_VOLT_FAILURE;
151 vd->volt_set_flag = DVFS_SET_VOLT_SUCCESS;
154 static void dvfs_get_vd_regulator_volt_list(struct vd_node *vd)
156 unsigned int i, selector = dvfs_regulator_count_voltages(vd->regulator);
157 int n = 0, sel_volt = 0;
159 if(selector > VD_VOL_LIST_CNT)
160 selector = VD_VOL_LIST_CNT;
162 for (i = 0; i < selector; i++) {
163 sel_volt = dvfs_regulator_list_voltage(vd->regulator, i);
165 //DVFS_WARNING("%s: vd(%s) list volt selector=%u, but volt(%d) <=0\n",
166 // __func__, vd->name, i, sel_volt);
169 vd->volt_list[n++] = sel_volt;
170 DVFS_DBG("%s: vd(%s) list volt selector=%u, n=%d, volt=%d\n",
171 __func__, vd->name, i, n, sel_volt);
178 static int vd_regulator_round_volt_max(struct vd_node *vd, int volt)
183 for (i = 0; i < vd->n_voltages; i++) {
184 sel_volt = vd->volt_list[i];
186 DVFS_WARNING("%s: selector=%u, but volt <=0\n",
197 static int vd_regulator_round_volt_min(struct vd_node *vd, int volt)
202 for (i = 0; i < vd->n_voltages; i++) {
203 sel_volt = vd->volt_list[i];
205 DVFS_WARNING("%s: selector=%u, but volt <=0\n",
211 return vd->volt_list[i-1];
221 static int vd_regulator_round_volt(struct vd_node *vd, int volt, int flags)
225 if(flags == VD_LIST_RELATION_L)
226 return vd_regulator_round_volt_min(vd, volt);
228 return vd_regulator_round_volt_max(vd, volt);
231 static void dvfs_table_round_volt(struct dvfs_node *clk_dvfs_node)
235 if(!clk_dvfs_node->dvfs_table || !clk_dvfs_node->vd ||
236 IS_ERR_OR_NULL(clk_dvfs_node->vd->regulator))
239 for (i = 0; (clk_dvfs_node->dvfs_table[i].frequency != CPUFREQ_TABLE_END); i++) {
241 test_volt = vd_regulator_round_volt(clk_dvfs_node->vd, clk_dvfs_node->dvfs_table[i].index, VD_LIST_RELATION_H);
244 DVFS_WARNING("%s: clk(%s) round volt(%d) but list <=0\n",
245 __func__, clk_dvfs_node->name, clk_dvfs_node->dvfs_table[i].index);
248 DVFS_DBG("clk %s:round_volt %d to %d\n",
249 clk_dvfs_node->name, clk_dvfs_node->dvfs_table[i].index, test_volt);
251 clk_dvfs_node->dvfs_table[i].index=test_volt;
255 static void dvfs_vd_get_regulator_volt_time_info(struct vd_node *vd)
257 if(vd->volt_time_flag <= 0){// check regulator support get uping vol timer
258 vd->volt_time_flag = dvfs_regulator_set_voltage_time(vd->regulator, vd->cur_volt, vd->cur_volt+200*1000);
259 if(vd->volt_time_flag < 0){
260 DVFS_DBG("%s,vd %s volt_time is no support\n",
264 DVFS_DBG("%s,vd %s volt_time is support,up 200mv need delay %d us\n",
265 __func__, vd->name, vd->volt_time_flag);
270 static void dvfs_vd_get_regulator_mode_info(struct vd_node *vd)
272 //REGULATOR_MODE_FAST
273 if(vd->mode_flag <= 0){// check regulator support get uping vol timer{
274 vd->mode_flag = dvfs_regulator_get_mode(vd->regulator);
275 if(vd->mode_flag==REGULATOR_MODE_FAST || vd->mode_flag==REGULATOR_MODE_NORMAL
276 || vd->mode_flag == REGULATOR_MODE_IDLE || vd->mode_flag==REGULATOR_MODE_STANDBY){
278 if(dvfs_regulator_set_mode(vd->regulator, vd->mode_flag) < 0){
279 vd->mode_flag = 0;// check again
282 if(vd->mode_flag > 0){
283 DVFS_DBG("%s,vd %s mode(now is %d) support\n",
284 __func__, vd->name, vd->mode_flag);
287 DVFS_DBG("%s,vd %s mode is not support now check\n",
294 struct regulator *dvfs_get_regulator(char *regulator_name)
298 mutex_lock(&rk_dvfs_mutex);
299 list_for_each_entry(vd, &rk_dvfs_tree, node) {
300 if (strcmp(regulator_name, vd->regulator_name) == 0) {
301 mutex_unlock(&rk_dvfs_mutex);
302 return vd->regulator;
305 mutex_unlock(&rk_dvfs_mutex);
309 static int dvfs_get_rate_range(struct dvfs_node *clk_dvfs_node)
311 struct cpufreq_frequency_table *table;
317 clk_dvfs_node->min_rate = 0;
318 clk_dvfs_node->max_rate = 0;
320 table = clk_dvfs_node->dvfs_table;
321 for (i = 0; table[i].frequency != CPUFREQ_TABLE_END; i++) {
322 clk_dvfs_node->max_rate = table[i].frequency / 1000 * 1000 * 1000;
324 clk_dvfs_node->min_rate = table[i].frequency / 1000 * 1000 * 1000;
327 DVFS_DBG("%s: clk %s, limit rate [min, max] = [%u, %u]\n",
328 __func__, clk_dvfs_node->name, clk_dvfs_node->min_rate, clk_dvfs_node->max_rate);
333 static void dvfs_table_round_clk_rate(struct dvfs_node *clk_dvfs_node)
335 int i, rate, temp_rate, flags;
337 if(!clk_dvfs_node || !clk_dvfs_node->dvfs_table || !clk_dvfs_node->clk)
340 for (i = 0; (clk_dvfs_node->dvfs_table[i].frequency != CPUFREQ_TABLE_END); i++) {
341 //ddr rate = real rate+flags
342 flags = clk_dvfs_node->dvfs_table[i].frequency%1000;
343 rate = (clk_dvfs_node->dvfs_table[i].frequency/1000)*1000;
344 temp_rate = clk_round_rate(clk_dvfs_node->clk, rate*1000);
346 DVFS_WARNING("%s: clk(%s) rate %d round return %d\n",
347 __func__, clk_dvfs_node->name, clk_dvfs_node->dvfs_table[i].frequency, temp_rate);
351 /* Set rate unit as MHZ */
352 if (temp_rate % MHz != 0)
353 temp_rate = (temp_rate / MHz + 1) * MHz;
355 temp_rate = (temp_rate / 1000) + flags;
357 DVFS_DBG("clk %s round_clk_rate %d to %d\n",
358 clk_dvfs_node->name,clk_dvfs_node->dvfs_table[i].frequency, temp_rate);
360 clk_dvfs_node->dvfs_table[i].frequency = temp_rate;
364 static int clk_dvfs_node_get_ref_volt(struct dvfs_node *clk_dvfs_node, int rate_khz,
365 struct cpufreq_frequency_table *clk_fv)
369 if (rate_khz == 0 || !clk_dvfs_node || !clk_dvfs_node->dvfs_table) {
373 clk_fv->frequency = rate_khz;
376 for (i = 0; (clk_dvfs_node->dvfs_table[i].frequency != CPUFREQ_TABLE_END); i++) {
377 if (clk_dvfs_node->dvfs_table[i].frequency >= rate_khz) {
378 clk_fv->frequency = clk_dvfs_node->dvfs_table[i].frequency;
379 clk_fv->index = clk_dvfs_node->dvfs_table[i].index;
380 //printk("%s,%s rate=%ukhz(vol=%d)\n",__func__,clk_dvfs_node->name,
381 //clk_fv->frequency, clk_fv->index);
385 clk_fv->frequency = 0;
387 //DVFS_DBG("%s get corresponding voltage error! out of bound\n", clk_dvfs_node->name);
391 static int dvfs_pd_get_newvolt_byclk(struct pd_node *pd, struct dvfs_node *clk_dvfs_node)
395 if (!pd || !clk_dvfs_node)
398 if (clk_dvfs_node->set_volt >= pd->cur_volt) {
399 return clk_dvfs_node->set_volt;
402 list_for_each_entry(clk_dvfs_node, &pd->clk_list, node) {
403 // DVFS_DBG("%s ,pd(%s),dvfs(%s),volt(%u)\n",__func__,pd->name,
404 // clk_dvfs_node->name,clk_dvfs_node->set_volt);
405 volt_max = max(volt_max, clk_dvfs_node->set_volt);
410 static void dvfs_update_clk_pds_volt(struct dvfs_node *clk_dvfs_node)
417 pd = clk_dvfs_node->pd;
421 pd->cur_volt = dvfs_pd_get_newvolt_byclk(pd, clk_dvfs_node);
424 static int dvfs_vd_get_newvolt_bypd(struct vd_node *vd)
428 //struct depend_list *depend;
433 list_for_each_entry(pd, &vd->pd_list, node) {
434 // DVFS_DBG("%s pd(%s,%u)\n",__func__,pd->name,pd->cur_volt);
435 volt_max_vd = max(volt_max_vd, pd->cur_volt);
438 /* some clks depend on this voltage domain */
439 /* if (!list_empty(&vd->req_volt_list)) {
440 list_for_each_entry(depend, &vd->req_volt_list, node2vd) {
441 volt_max_vd = max(volt_max_vd, depend->req_volt);
447 static int dvfs_vd_get_newvolt_byclk(struct dvfs_node *clk_dvfs_node)
451 dvfs_update_clk_pds_volt(clk_dvfs_node);
452 return dvfs_vd_get_newvolt_bypd(clk_dvfs_node->vd);
455 static void dvfs_temp_limit_work_func(struct work_struct *work)
457 unsigned long delay = HZ / 10; // 100ms
460 struct dvfs_node *clk_dvfs_node;
462 queue_delayed_work_on(0, dvfs_wq, to_delayed_work(work), delay);
464 mutex_lock(&rk_dvfs_mutex);
465 list_for_each_entry(vd, &rk_dvfs_tree, node) {
466 mutex_lock(&vd->mutex);
467 list_for_each_entry(pd, &vd->pd_list, node) {
468 list_for_each_entry(clk_dvfs_node, &pd->clk_list, node) {
469 if (clk_dvfs_node->temp_limit_table) {
470 clk_dvfs_node->temp = rockchip_tsadc_get_temp(clk_dvfs_node->temp_channel);
471 clk_dvfs_node->vd->vd_dvfs_target(clk_dvfs_node, clk_dvfs_node->last_set_rate);
475 mutex_unlock(&vd->mutex);
477 mutex_unlock(&rk_dvfs_mutex);
481 static void dvfs_temp_limit_work_func(struct work_struct *work)
483 int temp=0, delta_temp=0;
484 unsigned long delay = HZ/10;
485 unsigned long arm_rate_step=0;
486 static int old_temp=0;
489 queue_delayed_work_on(0, dvfs_wq, to_delayed_work(work), delay);
491 temp = rockchip_tsadc_get_temp(1);
494 delta_temp = (old_temp>temp) ? (old_temp-temp) : (temp-old_temp);
498 if (ROCKCHIP_PM_POLICY_PERFORMANCE == rockchip_pm_get_policy()) {
499 if (!clk_cpu_dvfs_node->per_temp_limit_table) {
503 clk_cpu_dvfs_node->temp_limit_rate = clk_cpu_dvfs_node->max_rate;
504 for (i=0; clk_cpu_dvfs_node->per_temp_limit_table[i].frequency != CPUFREQ_TABLE_END; i++) {
505 if (temp > clk_cpu_dvfs_node->per_temp_limit_table[i].index) {
506 clk_cpu_dvfs_node->temp_limit_rate = clk_cpu_dvfs_node->per_temp_limit_table[i].frequency;
509 dvfs_clk_set_rate(clk_cpu_dvfs_node, clk_cpu_dvfs_node->last_set_rate);
510 } else if (ROCKCHIP_PM_POLICY_NORMAL == rockchip_pm_get_policy()){
511 if (!clk_cpu_dvfs_node->nor_temp_limit_table) {
515 if (temp > target_temp) {
516 if (temp > old_temp) {
517 delta_temp = temp - target_temp;
518 for (i=0; clk_cpu_dvfs_node->nor_temp_limit_table[i].frequency != CPUFREQ_TABLE_END; i++) {
519 if (delta_temp > clk_cpu_dvfs_node->nor_temp_limit_table[i].index) {
520 arm_rate_step = clk_cpu_dvfs_node->nor_temp_limit_table[i].frequency;
523 if (arm_rate_step && (clk_cpu_dvfs_node->temp_limit_rate > arm_rate_step)) {
524 clk_cpu_dvfs_node->temp_limit_rate -= arm_rate_step;
525 dvfs_clk_set_rate(clk_cpu_dvfs_node, clk_cpu_dvfs_node->last_set_rate);
529 if (clk_cpu_dvfs_node->temp_limit_rate < clk_cpu_dvfs_node->max_rate) {
530 delta_temp = target_temp - temp;
531 for (i=0; clk_cpu_dvfs_node->nor_temp_limit_table[i].frequency != CPUFREQ_TABLE_END; i++) {
532 if (delta_temp > clk_cpu_dvfs_node->nor_temp_limit_table[i].index) {
533 arm_rate_step = clk_cpu_dvfs_node->nor_temp_limit_table[i].frequency;
538 clk_cpu_dvfs_node->temp_limit_rate += arm_rate_step;
539 if (clk_cpu_dvfs_node->temp_limit_rate > clk_cpu_dvfs_node->max_rate) {
540 clk_cpu_dvfs_node->temp_limit_rate = clk_cpu_dvfs_node->max_rate;
542 dvfs_clk_set_rate(clk_cpu_dvfs_node, clk_cpu_dvfs_node->last_set_rate);
548 DVFS_DBG("cur temp: %d, temp_limit_core_rate: %lu\n", temp, clk_cpu_dvfs_node->temp_limit_rate);
552 static DECLARE_DELAYED_WORK(dvfs_temp_limit_work, dvfs_temp_limit_work_func);
555 int dvfs_clk_enable_limit(struct dvfs_node *clk_dvfs_node, unsigned int min_rate, unsigned int max_rate)
557 u32 rate = 0, ret = 0;
559 if (!clk_dvfs_node || (min_rate > max_rate))
562 if (clk_dvfs_node->vd && clk_dvfs_node->vd->vd_dvfs_target){
563 mutex_lock(&clk_dvfs_node->vd->mutex);
565 /* To reset clk_dvfs_node->min_rate/max_rate */
566 dvfs_get_rate_range(clk_dvfs_node);
567 clk_dvfs_node->freq_limit_en = 1;
569 if ((min_rate >= clk_dvfs_node->min_rate) && (min_rate <= clk_dvfs_node->max_rate)) {
570 clk_dvfs_node->min_rate = min_rate;
573 if ((max_rate >= clk_dvfs_node->min_rate) && (max_rate <= clk_dvfs_node->max_rate)) {
574 clk_dvfs_node->max_rate = max_rate;
577 if (clk_dvfs_node->last_set_rate == 0)
578 rate = clk_get_rate(clk_dvfs_node->clk);
580 rate = clk_dvfs_node->last_set_rate;
581 ret = clk_dvfs_node->vd->vd_dvfs_target(clk_dvfs_node, rate);
583 mutex_unlock(&clk_dvfs_node->vd->mutex);
587 DVFS_DBG("%s:clk(%s) last_set_rate=%u; [min_rate, max_rate]=[%u, %u]\n",
588 __func__, __clk_get_name(clk_dvfs_node->clk), clk_dvfs_node->last_set_rate,
589 clk_dvfs_node->min_rate, clk_dvfs_node->max_rate);
593 EXPORT_SYMBOL(dvfs_clk_enable_limit);
595 int dvfs_clk_disable_limit(struct dvfs_node *clk_dvfs_node)
602 if (clk_dvfs_node->vd && clk_dvfs_node->vd->vd_dvfs_target){
603 mutex_lock(&clk_dvfs_node->vd->mutex);
605 /* To reset clk_dvfs_node->min_rate/max_rate */
606 dvfs_get_rate_range(clk_dvfs_node);
607 clk_dvfs_node->freq_limit_en = 0;
608 ret = clk_dvfs_node->vd->vd_dvfs_target(clk_dvfs_node, clk_dvfs_node->last_set_rate);
610 mutex_unlock(&clk_dvfs_node->vd->mutex);
613 DVFS_DBG("%s: clk(%s) last_set_rate=%u; [min_rate, max_rate]=[%u, %u]\n",
614 __func__, __clk_get_name(clk_dvfs_node->clk), clk_dvfs_node->last_set_rate, clk_dvfs_node->min_rate, clk_dvfs_node->max_rate);
617 EXPORT_SYMBOL(dvfs_clk_disable_limit);
619 int dvfs_clk_get_limit(struct dvfs_node *clk_dvfs_node, unsigned int *min_rate, unsigned int *max_rate)
626 mutex_lock(&clk_dvfs_node->vd->mutex);
628 *min_rate = clk_dvfs_node->min_rate;
629 *max_rate = clk_dvfs_node->max_rate;
630 freq_limit_en = clk_dvfs_node->freq_limit_en;
632 mutex_unlock(&clk_dvfs_node->vd->mutex);
634 return freq_limit_en;
636 EXPORT_SYMBOL(dvfs_clk_get_limit);
638 int dvfs_clk_register_set_rate_callback(struct dvfs_node *clk_dvfs_node, clk_set_rate_callback clk_dvfs_target)
643 mutex_lock(&clk_dvfs_node->vd->mutex);
644 clk_dvfs_node->clk_dvfs_target = clk_dvfs_target;
645 mutex_unlock(&clk_dvfs_node->vd->mutex);
649 EXPORT_SYMBOL(dvfs_clk_register_set_rate_callback);
651 struct cpufreq_frequency_table *dvfs_get_freq_volt_table(struct dvfs_node *clk_dvfs_node)
653 struct cpufreq_frequency_table *table;
658 mutex_lock(&clk_dvfs_node->vd->mutex);
659 table = clk_dvfs_node->dvfs_table;
660 mutex_unlock(&clk_dvfs_node->vd->mutex);
664 EXPORT_SYMBOL(dvfs_get_freq_volt_table);
666 int dvfs_set_freq_volt_table(struct dvfs_node *clk_dvfs_node, struct cpufreq_frequency_table *table)
671 if (IS_ERR_OR_NULL(table)){
672 DVFS_ERR("%s:invalid table!\n", __func__);
676 mutex_lock(&clk_dvfs_node->vd->mutex);
677 clk_dvfs_node->dvfs_table = table;
678 dvfs_get_rate_range(clk_dvfs_node);
679 dvfs_table_round_clk_rate(clk_dvfs_node);
680 dvfs_table_round_volt(clk_dvfs_node);
681 mutex_unlock(&clk_dvfs_node->vd->mutex);
685 EXPORT_SYMBOL(dvfs_set_freq_volt_table);
687 int clk_enable_dvfs(struct dvfs_node *clk_dvfs_node)
689 struct cpufreq_frequency_table clk_fv;
694 DVFS_DBG("%s: dvfs clk(%s) enable dvfs!\n",
695 __func__, __clk_get_name(clk_dvfs_node->clk));
697 if (!clk_dvfs_node->vd) {
698 DVFS_ERR("%s: dvfs node(%s) has no vd node!\n",
699 __func__, clk_dvfs_node->name);
702 mutex_lock(&clk_dvfs_node->vd->mutex);
703 if (clk_dvfs_node->enable_count == 0) {
704 if (IS_ERR_OR_NULL(clk_dvfs_node->vd->regulator)) {
705 if (clk_dvfs_node->vd->regulator_name)
706 clk_dvfs_node->vd->regulator = dvfs_regulator_get(NULL, clk_dvfs_node->vd->regulator_name);
707 if (!IS_ERR_OR_NULL(clk_dvfs_node->vd->regulator)) {
708 DVFS_DBG("%s: vd(%s) get regulator(%s) ok\n",
709 __func__, clk_dvfs_node->vd->name, clk_dvfs_node->vd->regulator_name);
710 clk_enable_dvfs_regulator_check(clk_dvfs_node->vd);
711 dvfs_get_vd_regulator_volt_list(clk_dvfs_node->vd);
712 dvfs_vd_get_regulator_volt_time_info(clk_dvfs_node->vd);
714 clk_dvfs_node->enable_count = 0;
715 DVFS_ERR("%s: vd(%s) can't get regulator(%s)!\n",
716 __func__, clk_dvfs_node->vd->name, clk_dvfs_node->vd->regulator_name);
717 mutex_unlock(&clk_dvfs_node->vd->mutex);
721 clk_enable_dvfs_regulator_check(clk_dvfs_node->vd);
724 DVFS_DBG("%s: vd(%s) cur volt=%d\n",
725 __func__, clk_dvfs_node->name, clk_dvfs_node->vd->cur_volt);
727 dvfs_table_round_clk_rate(clk_dvfs_node);
728 dvfs_get_rate_range(clk_dvfs_node);
729 clk_dvfs_node->freq_limit_en = 1;
730 dvfs_table_round_volt(clk_dvfs_node);
731 clk_dvfs_node->set_freq = clk_dvfs_node_get_rate_kz(clk_dvfs_node->clk);
732 clk_dvfs_node->last_set_rate = clk_dvfs_node->set_freq*1000;
734 DVFS_DBG("%s: %s get freq %u!\n",
735 __func__, clk_dvfs_node->name, clk_dvfs_node->set_freq);
737 if (clk_dvfs_node_get_ref_volt(clk_dvfs_node, clk_dvfs_node->set_freq, &clk_fv)) {
738 if (clk_dvfs_node->dvfs_table[0].frequency == CPUFREQ_TABLE_END) {
739 DVFS_ERR("%s: table empty\n", __func__);
740 clk_dvfs_node->enable_count = 0;
741 mutex_unlock(&clk_dvfs_node->vd->mutex);
744 DVFS_WARNING("%s: clk(%s) freq table all value are smaller than default(%d), use default, just enable dvfs\n",
745 __func__, clk_dvfs_node->name, clk_dvfs_node->set_freq);
746 clk_dvfs_node->enable_count++;
747 mutex_unlock(&clk_dvfs_node->vd->mutex);
752 clk_dvfs_node->set_volt = clk_fv.index;
753 dvfs_vd_get_newvolt_byclk(clk_dvfs_node);
754 DVFS_DBG("%s: %s, freq %u(ref vol %u)\n",
755 __func__, clk_dvfs_node->name, clk_dvfs_node->set_freq, clk_dvfs_node->set_volt);
757 if (clk_dvfs_node->dvfs_nb) {
758 // must unregister when clk disable
759 clk_notifier_register(clk, clk_dvfs_node->dvfs_nb);
762 if(clk_dvfs_node->vd->cur_volt < clk_dvfs_node->set_volt) {
764 ret = dvfs_regulator_set_voltage_readback(clk_dvfs_node->vd->regulator, clk_dvfs_node->set_volt, clk_dvfs_node->set_volt);
766 clk_dvfs_node->vd->volt_set_flag = DVFS_SET_VOLT_FAILURE;
767 clk_dvfs_node->enable_count = 0;
768 DVFS_ERR("dvfs enable clk %s,set volt error \n", clk_dvfs_node->name);
769 mutex_unlock(&clk_dvfs_node->vd->mutex);
772 clk_dvfs_node->vd->cur_volt = clk_dvfs_node->set_volt;
773 clk_dvfs_node->vd->volt_set_flag = DVFS_SET_VOLT_SUCCESS;
776 clk_dvfs_node->enable_count++;
778 DVFS_DBG("%s: dvfs already enable clk enable = %d!\n",
779 __func__, clk_dvfs_node->enable_count);
780 clk_dvfs_node->enable_count++;
783 mutex_unlock(&clk_dvfs_node->vd->mutex);
787 EXPORT_SYMBOL(clk_enable_dvfs);
789 int clk_disable_dvfs(struct dvfs_node *clk_dvfs_node)
794 DVFS_DBG("%s:dvfs clk(%s) disable dvfs!\n",
795 __func__, __clk_get_name(clk_dvfs_node->clk));
797 mutex_lock(&clk_dvfs_node->vd->mutex);
798 if (!clk_dvfs_node->enable_count) {
799 DVFS_WARNING("%s:clk(%s) is already closed!\n",
800 __func__, __clk_get_name(clk_dvfs_node->clk));
803 clk_dvfs_node->enable_count--;
804 if (0 == clk_dvfs_node->enable_count) {
805 DVFS_DBG("%s:dvfs clk(%s) disable dvfs ok!\n",
806 __func__, __clk_get_name(clk_dvfs_node->clk));
808 clk_notifier_unregister(clk, clk_dvfs_node->dvfs_nb);
809 DVFS_DBG("clk unregister nb!\n");
813 mutex_unlock(&clk_dvfs_node->vd->mutex);
816 EXPORT_SYMBOL(clk_disable_dvfs);
821 static unsigned long dvfs_get_limit_rate(struct dvfs_node *clk_dvfs_node, unsigned long rate)
823 unsigned long limit_rate;
826 if (clk_dvfs_node->freq_limit_en) {
828 if (rate < clk_dvfs_node->min_rate) {
829 limit_rate = clk_dvfs_node->min_rate;
830 } else if (rate > clk_dvfs_node->max_rate) {
831 limit_rate = clk_dvfs_node->max_rate;
834 if (limit_rate > clk_dvfs_node->temp_limit_rate) {
835 limit_rate = clk_dvfs_node->temp_limit_rate;
839 DVFS_DBG("%s: rate:%ld, limit_rate:%ld,\n", __func__, rate, limit_rate);
844 static int dvfs_target(struct dvfs_node *clk_dvfs_node, unsigned long rate)
846 struct cpufreq_frequency_table clk_fv;
847 unsigned long old_rate = 0, new_rate = 0, volt_new = 0, clk_volt_store = 0;
848 struct clk *clk = clk_dvfs_node->clk;
854 if (!clk_dvfs_node->enable_count){
855 DVFS_WARNING("%s:dvfs(%s) is disable\n",
856 __func__, clk_dvfs_node->name);
860 if (clk_dvfs_node->vd->volt_set_flag == DVFS_SET_VOLT_FAILURE) {
861 /* It means the last time set voltage error */
862 ret = dvfs_reset_volt(clk_dvfs_node->vd);
868 rate = dvfs_get_limit_rate(clk_dvfs_node, rate);
869 new_rate = clk_round_rate(clk, rate);
870 old_rate = clk_get_rate(clk);
871 if (new_rate == old_rate)
874 DVFS_DBG("enter %s: clk(%s) new_rate = %lu Hz, old_rate = %lu Hz\n",
875 __func__, clk_dvfs_node->name, rate, old_rate);
877 /* find the clk corresponding voltage */
878 ret = clk_dvfs_node_get_ref_volt(clk_dvfs_node, new_rate / 1000, &clk_fv);
880 DVFS_ERR("%s:dvfs clk(%s) rate %luhz is not support\n",
881 __func__, clk_dvfs_node->name, new_rate);
884 clk_volt_store = clk_dvfs_node->set_volt;
885 clk_dvfs_node->set_volt = clk_fv.index;
886 volt_new = dvfs_vd_get_newvolt_byclk(clk_dvfs_node);
887 DVFS_DBG("%s:%s new rate=%lu(was=%lu),new volt=%lu,(was=%d)\n",
888 __func__, clk_dvfs_node->name, new_rate, old_rate, volt_new,clk_dvfs_node->vd->cur_volt);
891 if (new_rate > old_rate) {
892 ret = dvfs_scale_volt_direct(clk_dvfs_node->vd, volt_new);
898 if (clk_dvfs_node->clk_dvfs_target) {
899 ret = clk_dvfs_node->clk_dvfs_target(clk, new_rate);
901 ret = clk_set_rate(clk, new_rate);
905 DVFS_ERR("%s:clk(%s) set rate err\n",
906 __func__, __clk_get_name(clk));
909 clk_dvfs_node->set_freq = new_rate / 1000;
911 DVFS_DBG("%s:dvfs clk(%s) set rate %lu ok\n",
912 __func__, clk_dvfs_node->name, clk_get_rate(clk));
914 /* if down the rate */
915 if (new_rate < old_rate) {
916 ret = dvfs_scale_volt_direct(clk_dvfs_node->vd, volt_new);
923 clk_dvfs_node->set_volt = clk_volt_store;
928 unsigned long dvfs_clk_get_rate(struct dvfs_node *clk_dvfs_node)
930 return clk_get_rate(clk_dvfs_node->clk);
932 EXPORT_SYMBOL_GPL(dvfs_clk_get_rate);
934 int dvfs_clk_enable(struct dvfs_node *clk_dvfs_node)
936 return clk_enable(clk_dvfs_node->clk);
938 EXPORT_SYMBOL_GPL(dvfs_clk_enable);
940 void dvfs_clk_disable(struct dvfs_node *clk_dvfs_node)
942 return clk_disable(clk_dvfs_node->clk);
944 EXPORT_SYMBOL_GPL(dvfs_clk_disable);
946 struct dvfs_node *clk_get_dvfs_node(char *clk_name)
950 struct dvfs_node *clk_dvfs_node;
952 mutex_lock(&rk_dvfs_mutex);
953 list_for_each_entry(vd, &rk_dvfs_tree, node) {
954 mutex_lock(&vd->mutex);
955 list_for_each_entry(pd, &vd->pd_list, node) {
956 list_for_each_entry(clk_dvfs_node, &pd->clk_list, node) {
957 if (0 == strcmp(clk_dvfs_node->name, clk_name)) {
958 mutex_unlock(&vd->mutex);
959 mutex_unlock(&rk_dvfs_mutex);
960 return clk_dvfs_node;
964 mutex_unlock(&vd->mutex);
966 mutex_unlock(&rk_dvfs_mutex);
970 EXPORT_SYMBOL_GPL(clk_get_dvfs_node);
972 void clk_put_dvfs_node(struct dvfs_node *clk_dvfs_node)
976 EXPORT_SYMBOL_GPL(clk_put_dvfs_node);
978 int dvfs_clk_prepare_enable(struct dvfs_node *clk_dvfs_node)
980 return clk_prepare_enable(clk_dvfs_node->clk);
982 EXPORT_SYMBOL_GPL(dvfs_clk_prepare_enable);
985 void dvfs_clk_disable_unprepare(struct dvfs_node *clk_dvfs_node)
987 clk_disable_unprepare(clk_dvfs_node->clk);
989 EXPORT_SYMBOL_GPL(dvfs_clk_disable_unprepare);
991 int dvfs_clk_set_rate(struct dvfs_node *clk_dvfs_node, unsigned long rate)
998 DVFS_DBG("%s:dvfs node(%s) set rate(%lu)\n",
999 __func__, clk_dvfs_node->name, rate);
1001 #if 0 // judge by reference func in rk
1002 if (dvfs_support_clk_set_rate(dvfs_info)==false) {
1003 DVFS_ERR("dvfs func:%s is not support!\n", __func__);
1008 if (clk_dvfs_node->vd && clk_dvfs_node->vd->vd_dvfs_target) {
1009 mutex_lock(&clk_dvfs_node->vd->mutex);
1010 ret = clk_dvfs_node->vd->vd_dvfs_target(clk_dvfs_node, rate);
1011 clk_dvfs_node->last_set_rate = rate;
1012 mutex_unlock(&clk_dvfs_node->vd->mutex);
1014 DVFS_ERR("%s:dvfs node(%s) has no vd node or target callback!\n",
1015 __func__, clk_dvfs_node->name);
1020 EXPORT_SYMBOL_GPL(dvfs_clk_set_rate);
1023 int rk_regist_vd(struct vd_node *vd)
1029 vd->volt_time_flag=0;
1031 INIT_LIST_HEAD(&vd->pd_list);
1032 mutex_lock(&rk_dvfs_mutex);
1033 list_add(&vd->node, &rk_dvfs_tree);
1034 mutex_unlock(&rk_dvfs_mutex);
1038 EXPORT_SYMBOL_GPL(rk_regist_vd);
1040 int rk_regist_pd(struct pd_node *pd)
1051 INIT_LIST_HEAD(&pd->clk_list);
1052 mutex_lock(&vd->mutex);
1053 list_add(&pd->node, &vd->pd_list);
1054 mutex_unlock(&vd->mutex);
1058 EXPORT_SYMBOL_GPL(rk_regist_pd);
1060 int rk_regist_clk(struct dvfs_node *clk_dvfs_node)
1068 vd = clk_dvfs_node->vd;
1069 pd = clk_dvfs_node->pd;
1073 mutex_lock(&vd->mutex);
1074 list_add(&clk_dvfs_node->node, &pd->clk_list);
1075 mutex_unlock(&vd->mutex);
1079 EXPORT_SYMBOL_GPL(rk_regist_clk);
1081 static int rk_convert_cpufreq_table(struct dvfs_node *dvfs_node)
1085 struct cpufreq_frequency_table *table;
1088 table = dvfs_node->dvfs_table;
1089 dev = &dvfs_node->dev;
1091 for (i = 0; table[i].frequency!= CPUFREQ_TABLE_END; i++){
1092 opp = opp_find_freq_exact(dev, table[i].frequency * 1000, true);
1094 return PTR_ERR(opp);
1095 table[i].index = opp_get_voltage(opp);
1100 static struct cpufreq_frequency_table *of_get_temp_limit_table(struct device_node *dev_node, const char *propname)
1102 struct cpufreq_frequency_table *temp_limt_table = NULL;
1103 const struct property *prop;
1107 prop = of_find_property(dev_node, propname, NULL);
1113 nr = prop->length / sizeof(u32);
1115 pr_err("%s: Invalid freq list\n", __func__);
1119 temp_limt_table = kzalloc(sizeof(struct cpufreq_frequency_table) *
1120 (nr/2 + 1), GFP_KERNEL);
1124 for (i=0; i<nr/2; i++){
1125 temp_limt_table[i].index = be32_to_cpup(val++);
1126 temp_limt_table[i].frequency = be32_to_cpup(val++) * 1000;
1129 temp_limt_table[i].index = 0;
1130 temp_limt_table[i].frequency = CPUFREQ_TABLE_END;
1132 return temp_limt_table;
1136 int of_dvfs_init(void)
1140 struct device_node *dvfs_dev_node, *clk_dev_node, *vd_dev_node, *pd_dev_node;
1141 struct dvfs_node *dvfs_node;
1146 DVFS_DBG("%s\n", __func__);
1148 dvfs_dev_node = of_find_node_by_name(NULL, "dvfs");
1149 if (IS_ERR_OR_NULL(dvfs_dev_node)) {
1150 DVFS_ERR("%s get dvfs dev node err\n", __func__);
1151 return PTR_ERR(dvfs_dev_node);
1154 val = of_get_property(dvfs_dev_node, "target-temp", NULL);
1156 target_temp = be32_to_cpup(val);
1159 val = of_get_property(dvfs_dev_node, "temp-limit-enable", NULL);
1161 temp_limit_enable = be32_to_cpup(val);
1164 for_each_available_child_of_node(dvfs_dev_node, vd_dev_node) {
1165 vd = kzalloc(sizeof(struct vd_node), GFP_KERNEL);
1169 mutex_init(&vd->mutex);
1170 vd->name = vd_dev_node->name;
1171 ret = of_property_read_string(vd_dev_node, "regulator_name", &vd->regulator_name);
1173 DVFS_ERR("%s:vd(%s) get regulator_name err, ret:%d\n",
1174 __func__, vd_dev_node->name, ret);
1179 vd->suspend_volt = 0;
1181 vd->volt_set_flag = DVFS_SET_VOLT_FAILURE;
1182 vd->vd_dvfs_target = dvfs_target;
1183 ret = rk_regist_vd(vd);
1185 DVFS_ERR("%s:vd(%s) register err:%d\n", __func__, vd->name, ret);
1190 DVFS_DBG("%s:vd(%s) register ok, regulator name:%s,suspend volt:%d\n",
1191 __func__, vd->name, vd->regulator_name, vd->suspend_volt);
1193 for_each_available_child_of_node(vd_dev_node, pd_dev_node) {
1194 pd = kzalloc(sizeof(struct pd_node), GFP_KERNEL);
1199 pd->name = pd_dev_node->name;
1201 ret = rk_regist_pd(pd);
1203 DVFS_ERR("%s:pd(%s) register err:%d\n", __func__, pd->name, ret);
1207 DVFS_DBG("%s:pd(%s) register ok, parent vd:%s\n",
1208 __func__, pd->name, vd->name);
1209 for_each_available_child_of_node(pd_dev_node, clk_dev_node) {
1210 if (!of_device_is_available(clk_dev_node))
1213 dvfs_node = kzalloc(sizeof(struct dvfs_node), GFP_KERNEL);
1217 dvfs_node->name = clk_dev_node->name;
1220 if (temp_limit_enable) {
1221 val = of_get_property(clk_dev_node, "temp-channel", NULL);
1223 dvfs_node->temp_channel = be32_to_cpup(val);
1225 dvfs_node->nor_temp_limit_table = of_get_temp_limit_table(clk_dev_node, "normal-temp-limit");
1226 dvfs_node->per_temp_limit_table = of_get_temp_limit_table(clk_dev_node, "performance-temp-limit");
1228 dvfs_node->temp_limit_rate = -1;
1229 dvfs_node->dev.of_node = clk_dev_node;
1230 ret = of_init_opp_table(&dvfs_node->dev);
1232 DVFS_ERR("%s:clk(%s) get opp table err:%d\n", __func__, dvfs_node->name, ret);
1237 ret = opp_init_cpufreq_table(&dvfs_node->dev, &dvfs_node->dvfs_table);
1239 DVFS_ERR("%s:clk(%s) get cpufreq table err:%d\n", __func__, dvfs_node->name, ret);
1243 ret = rk_convert_cpufreq_table(dvfs_node);
1249 clk = clk_get(NULL, clk_dev_node->name);
1251 DVFS_ERR("%s:get clk(%s) err:%ld\n", __func__, dvfs_node->name, PTR_ERR(clk));
1257 dvfs_node->clk = clk;
1258 ret = rk_regist_clk(dvfs_node);
1260 DVFS_ERR("%s:dvfs_node(%s) register err:%d\n", __func__, dvfs_node->name, ret);
1264 DVFS_DBG("%s:dvfs_node(%s) register ok, parent pd:%s\n",
1265 __func__, clk_dev_node->name, pd->name);
1273 /*********************************************************************************/
1275 * dump_dbg_map() : Draw all informations of dvfs while debug
1277 static int dump_dbg_map(char *buf)
1282 struct dvfs_node *clk_dvfs_node;
1285 mutex_lock(&rk_dvfs_mutex);
1286 printk( "-------------DVFS TREE-----------\n\n\n");
1287 printk( "DVFS TREE:\n");
1289 list_for_each_entry(vd, &rk_dvfs_tree, node) {
1290 mutex_lock(&vd->mutex);
1291 printk( "|\n|- voltage domain:%s\n", vd->name);
1292 printk( "|- current voltage:%d\n", vd->cur_volt);
1294 list_for_each_entry(pd, &vd->pd_list, node) {
1295 printk( "| |\n| |- power domain:%s, status = %s, current volt = %d\n",
1296 pd->name, (pd->pd_status == 1) ? "ON" : "OFF", pd->cur_volt);
1298 list_for_each_entry(clk_dvfs_node, &pd->clk_list, node) {
1299 printk( "| | |\n| | |- clock: %s current: rate %d, volt = %d,"
1300 " enable_dvfs = %s\n",
1301 clk_dvfs_node->name, clk_dvfs_node->set_freq, clk_dvfs_node->set_volt,
1302 clk_dvfs_node->enable_count == 0 ? "DISABLE" : "ENABLE");
1303 printk( "| | |- clk limit(%s):[%u, %u]; last set rate = %u\n",
1304 clk_dvfs_node->freq_limit_en ? "enable" : "disable",
1305 clk_dvfs_node->min_rate, clk_dvfs_node->max_rate,
1306 clk_dvfs_node->last_set_rate/1000);
1308 for (i = 0; (clk_dvfs_node->dvfs_table[i].frequency != CPUFREQ_TABLE_END); i++) {
1309 printk( "| | | |- freq = %d, volt = %d\n",
1310 clk_dvfs_node->dvfs_table[i].frequency,
1311 clk_dvfs_node->dvfs_table[i].index);
1316 mutex_unlock(&vd->mutex);
1319 printk( "-------------DVFS TREE END------------\n");
1320 mutex_unlock(&rk_dvfs_mutex);
1325 /*********************************************************************************/
1326 static struct kobject *dvfs_kobj;
1327 struct dvfs_attribute {
1328 struct attribute attr;
1329 ssize_t (*show)(struct kobject *kobj, struct kobj_attribute *attr,
1331 ssize_t (*store)(struct kobject *kobj, struct kobj_attribute *attr,
1332 const char *buf, size_t n);
1335 static ssize_t dvfs_tree_store(struct kobject *kobj, struct kobj_attribute *attr,
1336 const char *buf, size_t n)
1340 static ssize_t dvfs_tree_show(struct kobject *kobj, struct kobj_attribute *attr,
1343 return dump_dbg_map(buf);
1347 static struct dvfs_attribute dvfs_attrs[] = {
1348 /* node_name permision show_func store_func */
1349 //#ifdef CONFIG_RK_CLOCK_PROC
1350 __ATTR(dvfs_tree, S_IRUSR | S_IRGRP | S_IWUSR, dvfs_tree_show, dvfs_tree_store),
1354 static int __init dvfs_init(void)
1358 dvfs_kobj = kobject_create_and_add("dvfs", NULL);
1361 for (i = 0; i < ARRAY_SIZE(dvfs_attrs); i++) {
1362 ret = sysfs_create_file(dvfs_kobj, &dvfs_attrs[i].attr);
1364 DVFS_ERR("create index %d error\n", i);
1369 if (temp_limit_enable) {
1370 clk_cpu_dvfs_node = clk_get_dvfs_node("clk_core");
1371 if (!clk_cpu_dvfs_node){
1375 clk_cpu_dvfs_node->temp_limit_rate = clk_cpu_dvfs_node->max_rate;
1376 dvfs_wq = alloc_workqueue("dvfs", WQ_NON_REENTRANT | WQ_MEM_RECLAIM | WQ_HIGHPRI | WQ_FREEZABLE, 1);
1377 queue_delayed_work_on(0, dvfs_wq, &dvfs_temp_limit_work, 0*HZ);
1383 late_initcall(dvfs_init);