arch/arm/mach-omap2/cpuidle44xx.c

   1 /*
   2  * OMAP4+ CPU idle Routines
   3  *
   4  * Copyright (C) 2011-2013 Texas Instruments, Inc.
   5  * Santosh Shilimkar <santosh.shilimkar@ti.com>
   6  * Rajendra Nayak <rnayak@ti.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/sched.h>
  14 #include <linux/cpuidle.h>
  15 #include <linux/cpu_pm.h>
  16 #include <linux/export.h>
  17 #include <linux/clockchips.h>
  18
  19 #include <asm/cpuidle.h>
  20 #include <asm/proc-fns.h>
  21
  22 #include "common.h"
  23 #include "pm.h"
  24 #include "prm.h"
  25 #include "clockdomain.h"
  26
  27 /* Machine specific information */
  28 struct idle_statedata {
  29         u32 cpu_state;
  30         u32 mpu_logic_state;
  31         u32 mpu_state;
  32 };
  33
  34 static struct idle_statedata omap4_idle_data[] = {
  35         {
  36                 .cpu_state = PWRDM_POWER_ON,
  37                 .mpu_state = PWRDM_POWER_ON,
  38                 .mpu_logic_state = PWRDM_POWER_RET,
  39         },
  40         {
  41                 .cpu_state = PWRDM_POWER_OFF,
  42                 .mpu_state = PWRDM_POWER_RET,
  43                 .mpu_logic_state = PWRDM_POWER_RET,
  44         },
  45         {
  46                 .cpu_state = PWRDM_POWER_OFF,
  47                 .mpu_state = PWRDM_POWER_RET,
  48                 .mpu_logic_state = PWRDM_POWER_OFF,
  49         },
  50 };
  51
  52 static struct powerdomain *mpu_pd, *cpu_pd[NR_CPUS];
  53 static struct clockdomain *cpu_clkdm[NR_CPUS];
  54
  55 static atomic_t abort_barrier;
  56 static bool cpu_done[NR_CPUS];
  57 static struct idle_statedata *state_ptr = &omap4_idle_data[0];
  58
  59 /* Private functions */
  60
  61 /**
  62  * omap_enter_idle_[simple/coupled] - OMAP4PLUS cpuidle entry functions
  63  * @dev: cpuidle device
  64  * @drv: cpuidle driver
  65  * @index: the index of state to be entered
  66  *
  67  * Called from the CPUidle framework to program the device to the
  68  * specified low power state selected by the governor.
  69  * Returns the amount of time spent in the low power state.
  70  */
  71 static int omap_enter_idle_simple(struct cpuidle_device *dev,
  72                         struct cpuidle_driver *drv,
  73                         int index)
  74 {
  75         omap_do_wfi();
  76         return index;
  77 }
  78
  79 static int omap_enter_idle_coupled(struct cpuidle_device *dev,
  80                         struct cpuidle_driver *drv,
  81                         int index)
  82 {
  83         struct idle_statedata *cx = state_ptr + index;
  84         int cpu_id = smp_processor_id();
  85
  86         /*
  87          * CPU0 has to wait and stay ON until CPU1 is OFF state.
  88          * This is necessary to honour hardware recommondation
  89          * of triggeing all the possible low power modes once CPU1 is
  90          * out of coherency and in OFF mode.
  91          */
  92         if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
  93                 while (pwrdm_read_pwrst(cpu_pd[1]) != PWRDM_POWER_OFF) {
  94                         cpu_relax();
  95
  96                         /*
  97                          * CPU1 could have already entered & exited idle
  98                          * without hitting off because of a wakeup
  99                          * or a failed attempt to hit off mode.  Check for
 100                          * that here, otherwise we could spin forever
 101                          * waiting for CPU1 off.
 102                          */
 103                         if (cpu_done[1])
 104                             goto fail;
 105
 106                 }
 107         }
 108
 109         clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu_id);
 110
 111         /*
 112          * Call idle CPU PM enter notifier chain so that
 113          * VFP and per CPU interrupt context is saved.
 114          */
 115         cpu_pm_enter();
 116
 117         if (dev->cpu == 0) {
 118                 pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
 119                 omap_set_pwrdm_state(mpu_pd, cx->mpu_state);
 120
 121                 /*
 122                  * Call idle CPU cluster PM enter notifier chain
 123                  * to save GIC and wakeupgen context.
 124                  */
 125                 if ((cx->mpu_state == PWRDM_POWER_RET) &&
 126                         (cx->mpu_logic_state == PWRDM_POWER_OFF))
 127                                 cpu_cluster_pm_enter();
 128         }
 129
 130         omap4_enter_lowpower(dev->cpu, cx->cpu_state);
 131         cpu_done[dev->cpu] = true;
 132
 133         /* Wakeup CPU1 only if it is not offlined */
 134         if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
 135                 clkdm_wakeup(cpu_clkdm[1]);
 136                 omap_set_pwrdm_state(cpu_pd[1], PWRDM_POWER_ON);
 137                 clkdm_allow_idle(cpu_clkdm[1]);
 138         }
 139
 140         /*
 141          * Call idle CPU PM exit notifier chain to restore
 142          * VFP and per CPU IRQ context.
 143          */
 144         cpu_pm_exit();
 145
 146         /*
 147          * Call idle CPU cluster PM exit notifier chain
 148          * to restore GIC and wakeupgen context.
 149          */
 150         if ((cx->mpu_state == PWRDM_POWER_RET) &&
 151                 (cx->mpu_logic_state == PWRDM_POWER_OFF))
 152                 cpu_cluster_pm_exit();
 153
 154         clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu_id);
 155
 156 fail:
 157         cpuidle_coupled_parallel_barrier(dev, &abort_barrier);
 158         cpu_done[dev->cpu] = false;
 159
 160         return index;
 161 }
 162
 163 /*
 164  * For each cpu, setup the broadcast timer because local timers
 165  * stops for the states above C1.
 166  */
 167 static void omap_setup_broadcast_timer(void *arg)
 168 {
 169         int cpu = smp_processor_id();
 170         clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ON, &cpu);
 171 }
 172
 173 static struct cpuidle_driver omap4_idle_driver = {
 174         .name                           = "omap4_idle",
 175         .owner                          = THIS_MODULE,
 176         .states = {
 177                 {
 178                         /* C1 - CPU0 ON + CPU1 ON + MPU ON */
 179                         .exit_latency = 2 + 2,
 180                         .target_residency = 5,
 181                         .flags = CPUIDLE_FLAG_TIME_VALID,
 182                         .enter = omap_enter_idle_simple,
 183                         .name = "C1",
 184                         .desc = "CPUx ON, MPUSS ON"
 185                 },
 186                 {
 187                         /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */
 188                         .exit_latency = 328 + 440,
 189                         .target_residency = 960,
 190                         .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED,
 191                         .enter = omap_enter_idle_coupled,
 192                         .name = "C2",
 193                         .desc = "CPUx OFF, MPUSS CSWR",
 194                 },
 195                 {
 196                         /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
 197                         .exit_latency = 460 + 518,
 198                         .target_residency = 1100,
 199                         .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED,
 200                         .enter = omap_enter_idle_coupled,
 201                         .name = "C3",
 202                         .desc = "CPUx OFF, MPUSS OSWR",
 203                 },
 204         },
 205         .state_count = ARRAY_SIZE(omap4_idle_data),
 206         .safe_state_index = 0,
 207 };
 208
 209 /* Public functions */
 210
 211 /**
 212  * omap4_idle_init - Init routine for OMAP4+ idle
 213  *
 214  * Registers the OMAP4+ specific cpuidle driver to the cpuidle
 215  * framework with the valid set of states.
 216  */
 217 int __init omap4_idle_init(void)
 218 {
 219         mpu_pd = pwrdm_lookup("mpu_pwrdm");
 220         cpu_pd[0] = pwrdm_lookup("cpu0_pwrdm");
 221         cpu_pd[1] = pwrdm_lookup("cpu1_pwrdm");
 222         if ((!mpu_pd) || (!cpu_pd[0]) || (!cpu_pd[1]))
 223                 return -ENODEV;
 224
 225         cpu_clkdm[0] = clkdm_lookup("mpu0_clkdm");
 226         cpu_clkdm[1] = clkdm_lookup("mpu1_clkdm");
 227         if (!cpu_clkdm[0] || !cpu_clkdm[1])
 228                 return -ENODEV;
 229
 230         /* Configure the broadcast timer on each cpu */
 231         on_each_cpu(omap_setup_broadcast_timer, NULL, 1);
 232
 233         return cpuidle_register(&omap4_idle_driver, cpu_online_mask);
 234 }