Merge branch 'linux-linaro-lsk-v4.4-android' of git://git.linaro.org/kernel/linux...
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / tegra20-trimslice.dts
1 /dts-v1/;
2
3 #include <dt-bindings/input/input.h>
4 #include "tegra20.dtsi"
5
6 / {
7         model = "Compulab TrimSlice board";
8         compatible = "compulab,trimslice", "nvidia,tegra20";
9
10         aliases {
11                 rtc0 = "/i2c@7000c500/rtc@56";
12                 rtc1 = "/rtc@7000e000";
13                 serial0 = &uarta;
14         };
15
16         memory {
17                 reg = <0x00000000 0x40000000>;
18         };
19
20         host1x@50000000 {
21                 hdmi@54280000 {
22                         status = "okay";
23
24                         vdd-supply = <&hdmi_vdd_reg>;
25                         pll-supply = <&hdmi_pll_reg>;
26
27                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
28                         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
29                                 GPIO_ACTIVE_HIGH>;
30                 };
31         };
32
33         pinmux@70000014 {
34                 pinctrl-names = "default";
35                 pinctrl-0 = <&state_default>;
36
37                 state_default: pinmux {
38                         ata {
39                                 nvidia,pins = "ata";
40                                 nvidia,function = "ide";
41                         };
42                         atb {
43                                 nvidia,pins = "atb", "gma";
44                                 nvidia,function = "sdio4";
45                         };
46                         atc {
47                                 nvidia,pins = "atc", "gmb";
48                                 nvidia,function = "nand";
49                         };
50                         atd {
51                                 nvidia,pins = "atd", "ate", "gme", "pta";
52                                 nvidia,function = "gmi";
53                         };
54                         cdev1 {
55                                 nvidia,pins = "cdev1";
56                                 nvidia,function = "plla_out";
57                         };
58                         cdev2 {
59                                 nvidia,pins = "cdev2";
60                                 nvidia,function = "pllp_out4";
61                         };
62                         crtp {
63                                 nvidia,pins = "crtp";
64                                 nvidia,function = "crt";
65                         };
66                         csus {
67                                 nvidia,pins = "csus";
68                                 nvidia,function = "vi_sensor_clk";
69                         };
70                         dap1 {
71                                 nvidia,pins = "dap1";
72                                 nvidia,function = "dap1";
73                         };
74                         dap2 {
75                                 nvidia,pins = "dap2";
76                                 nvidia,function = "dap2";
77                         };
78                         dap3 {
79                                 nvidia,pins = "dap3";
80                                 nvidia,function = "dap3";
81                         };
82                         dap4 {
83                                 nvidia,pins = "dap4";
84                                 nvidia,function = "dap4";
85                         };
86                         ddc {
87                                 nvidia,pins = "ddc";
88                                 nvidia,function = "i2c2";
89                         };
90                         dta {
91                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
92                                 nvidia,function = "vi";
93                         };
94                         dtf {
95                                 nvidia,pins = "dtf";
96                                 nvidia,function = "i2c3";
97                         };
98                         gmc {
99                                 nvidia,pins = "gmc", "gmd";
100                                 nvidia,function = "sflash";
101                         };
102                         gpu {
103                                 nvidia,pins = "gpu";
104                                 nvidia,function = "uarta";
105                         };
106                         gpu7 {
107                                 nvidia,pins = "gpu7";
108                                 nvidia,function = "rtck";
109                         };
110                         gpv {
111                                 nvidia,pins = "gpv", "slxa", "slxk";
112                                 nvidia,function = "pcie";
113                         };
114                         hdint {
115                                 nvidia,pins = "hdint";
116                                 nvidia,function = "hdmi";
117                         };
118                         i2cp {
119                                 nvidia,pins = "i2cp";
120                                 nvidia,function = "i2cp";
121                         };
122                         irrx {
123                                 nvidia,pins = "irrx", "irtx";
124                                 nvidia,function = "uartb";
125                         };
126                         kbca {
127                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
128                                         "kbce", "kbcf";
129                                 nvidia,function = "kbc";
130                         };
131                         lcsn {
132                                 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
133                                         "ld3", "ld4", "ld5", "ld6", "ld7",
134                                         "ld8", "ld9", "ld10", "ld11", "ld12",
135                                         "ld13", "ld14", "ld15", "ld16", "ld17",
136                                         "ldc", "ldi", "lhp0", "lhp1", "lhp2",
137                                         "lhs", "lm0", "lm1", "lpp", "lpw0",
138                                         "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
139                                         "lsda", "lsdi", "lspi", "lvp0", "lvp1",
140                                         "lvs";
141                                 nvidia,function = "displaya";
142                         };
143                         owc {
144                                 nvidia,pins = "owc", "uac";
145                                 nvidia,function = "rsvd2";
146                         };
147                         pmc {
148                                 nvidia,pins = "pmc";
149                                 nvidia,function = "pwr_on";
150                         };
151                         rm {
152                                 nvidia,pins = "rm";
153                                 nvidia,function = "i2c1";
154                         };
155                         sdb {
156                                 nvidia,pins = "sdb", "sdc", "sdd";
157                                 nvidia,function = "pwm";
158                         };
159                         sdio1 {
160                                 nvidia,pins = "sdio1";
161                                 nvidia,function = "sdio1";
162                         };
163                         slxc {
164                                 nvidia,pins = "slxc", "slxd";
165                                 nvidia,function = "sdio3";
166                         };
167                         spdi {
168                                 nvidia,pins = "spdi", "spdo";
169                                 nvidia,function = "spdif";
170                         };
171                         spia {
172                                 nvidia,pins = "spia", "spib", "spic";
173                                 nvidia,function = "spi2";
174                         };
175                         spid {
176                                 nvidia,pins = "spid", "spie", "spif";
177                                 nvidia,function = "spi1";
178                         };
179                         spig {
180                                 nvidia,pins = "spig", "spih";
181                                 nvidia,function = "spi2_alt";
182                         };
183                         uaa {
184                                 nvidia,pins = "uaa", "uab", "uda";
185                                 nvidia,function = "ulpi";
186                         };
187                         uad {
188                                 nvidia,pins = "uad";
189                                 nvidia,function = "irda";
190                         };
191                         uca {
192                                 nvidia,pins = "uca", "ucb";
193                                 nvidia,function = "uartc";
194                         };
195                         conf_ata {
196                                 nvidia,pins = "ata", "atc", "atd", "ate",
197                                         "crtp", "dap2", "dap3", "dap4", "dta",
198                                         "dtb", "dtc", "dtd", "dte", "gmb",
199                                         "gme", "i2cp", "pta", "slxc", "slxd",
200                                         "spdi", "spdo", "uda";
201                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
202                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
203                         };
204                         conf_atb {
205                                 nvidia,pins = "atb", "cdev1", "cdev2", "dap1",
206                                         "gma", "gmc", "gmd", "gpu", "gpu7",
207                                         "gpv", "sdio1", "slxa", "slxk", "uac";
208                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
209                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
210                         };
211                         conf_ck32 {
212                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
213                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
214                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
215                         };
216                         conf_csus {
217                                 nvidia,pins = "csus", "spia", "spib",
218                                         "spid", "spif";
219                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
220                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
221                         };
222                         conf_ddc {
223                                 nvidia,pins = "ddc", "dtf", "rm", "sdc", "sdd";
224                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
225                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
226                         };
227                         conf_hdint {
228                                 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
229                                         "lpw1", "lsc1", "lsck", "lsda", "lsdi",
230                                         "lvp0", "pmc";
231                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
232                         };
233                         conf_irrx {
234                                 nvidia,pins = "irrx", "irtx", "kbca", "kbcb",
235                                         "kbcc", "kbcd", "kbce", "kbcf", "owc",
236                                         "spic", "spie", "spig", "spih", "uaa",
237                                         "uab", "uad", "uca", "ucb";
238                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
239                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
240                         };
241                         conf_lc {
242                                 nvidia,pins = "lc", "ls";
243                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
244                         };
245                         conf_ld0 {
246                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
247                                         "ld5", "ld6", "ld7", "ld8", "ld9",
248                                         "ld10", "ld11", "ld12", "ld13", "ld14",
249                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
250                                         "lhp1", "lhp2", "lhs", "lm0", "lpp",
251                                         "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
252                                         "lvs", "sdb";
253                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
254                         };
255                         conf_ld17_0 {
256                                 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
257                                         "ld23_22";
258                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
259                         };
260                         conf_spif {
261                                 nvidia,pins = "spif";
262                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
263                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
264                         };
265                 };
266         };
267
268         i2s@70002800 {
269                 status = "okay";
270         };
271
272         serial@70006000 {
273                 status = "okay";
274         };
275
276         dvi_ddc: i2c@7000c000 {
277                 status = "okay";
278                 clock-frequency = <100000>;
279         };
280
281         spi@7000c380 {
282                 status = "okay";
283                 spi-max-frequency = <48000000>;
284                 spi-flash@0 {
285                         compatible = "winbond,w25q80bl";
286                         reg = <0>;
287                         spi-max-frequency = <48000000>;
288                 };
289         };
290
291         hdmi_ddc: i2c@7000c400 {
292                 status = "okay";
293                 clock-frequency = <100000>;
294         };
295
296         i2c@7000c500 {
297                 status = "okay";
298                 clock-frequency = <400000>;
299
300                 codec: codec@1a {
301                         compatible = "ti,tlv320aic23";
302                         reg = <0x1a>;
303                 };
304
305                 rtc@56 {
306                         compatible = "emmicro,em3027";
307                         reg = <0x56>;
308                 };
309         };
310
311         pmc@7000e400 {
312                 nvidia,suspend-mode = <1>;
313                 nvidia,cpu-pwr-good-time = <5000>;
314                 nvidia,cpu-pwr-off-time = <5000>;
315                 nvidia,core-pwr-good-time = <3845 3845>;
316                 nvidia,core-pwr-off-time = <3875>;
317                 nvidia,sys-clock-req-active-high;
318         };
319
320         pcie-controller@80003000 {
321                 status = "okay";
322
323                 avdd-pex-supply = <&pci_vdd_reg>;
324                 vdd-pex-supply = <&pci_vdd_reg>;
325                 avdd-pex-pll-supply = <&pci_vdd_reg>;
326                 avdd-plle-supply = <&pci_vdd_reg>;
327                 vddio-pex-clk-supply = <&pci_clk_reg>;
328
329                 pci@1,0 {
330                         status = "okay";
331                 };
332         };
333
334         usb@c5000000 {
335                 status = "okay";
336         };
337
338         usb-phy@c5000000 {
339                 status = "okay";
340                 vbus-supply = <&vbus_reg>;
341         };
342
343         usb@c5004000 {
344                 status = "okay";
345                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
346                         GPIO_ACTIVE_LOW>;
347         };
348
349         usb-phy@c5004000 {
350                 status = "okay";
351                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
352                         GPIO_ACTIVE_LOW>;
353         };
354
355         usb@c5008000 {
356                 status = "okay";
357         };
358
359         usb-phy@c5008000 {
360                 status = "okay";
361         };
362
363         sdhci@c8000000 {
364                 status = "okay";
365                 bus-width = <4>;
366         };
367
368         sdhci@c8000600 {
369                 status = "okay";
370                 cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>;
371                 wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
372                 bus-width = <4>;
373         };
374
375         clocks {
376                 compatible = "simple-bus";
377                 #address-cells = <1>;
378                 #size-cells = <0>;
379
380                 clk32k_in: clock@0 {
381                         compatible = "fixed-clock";
382                         reg=<0>;
383                         #clock-cells = <0>;
384                         clock-frequency = <32768>;
385                 };
386         };
387
388         gpio-keys {
389                 compatible = "gpio-keys";
390
391                 power {
392                         label = "Power";
393                         gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>;
394                         linux,code = <KEY_POWER>;
395                         gpio-key,wakeup;
396                 };
397         };
398
399         poweroff {
400                 compatible = "gpio-poweroff";
401                 gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
402         };
403
404         regulators {
405                 compatible = "simple-bus";
406                 #address-cells = <1>;
407                 #size-cells = <0>;
408
409                 hdmi_vdd_reg: regulator@0 {
410                         compatible = "regulator-fixed";
411                         reg = <0>;
412                         regulator-name = "avdd_hdmi";
413                         regulator-min-microvolt = <3300000>;
414                         regulator-max-microvolt = <3300000>;
415                         regulator-always-on;
416                 };
417
418                 hdmi_pll_reg: regulator@1 {
419                         compatible = "regulator-fixed";
420                         reg = <1>;
421                         regulator-name = "avdd_hdmi_pll";
422                         regulator-min-microvolt = <1800000>;
423                         regulator-max-microvolt = <1800000>;
424                         regulator-always-on;
425                 };
426
427                 vbus_reg: regulator@2 {
428                         compatible = "regulator-fixed";
429                         reg = <2>;
430                         regulator-name = "usb1_vbus";
431                         regulator-min-microvolt = <5000000>;
432                         regulator-max-microvolt = <5000000>;
433                         enable-active-high;
434                         gpio = <&gpio TEGRA_GPIO(V, 2) 0>;
435                         regulator-always-on;
436                         regulator-boot-on;
437                 };
438
439                 pci_clk_reg: regulator@3 {
440                         compatible = "regulator-fixed";
441                         reg = <3>;
442                         regulator-name = "pci_clk";
443                         regulator-min-microvolt = <3300000>;
444                         regulator-max-microvolt = <3300000>;
445                         regulator-always-on;
446                 };
447
448                 pci_vdd_reg: regulator@4 {
449                         compatible = "regulator-fixed";
450                         reg = <4>;
451                         regulator-name = "pci_vdd";
452                         regulator-min-microvolt = <1050000>;
453                         regulator-max-microvolt = <1050000>;
454                         regulator-always-on;
455                 };
456         };
457
458         sound {
459                 compatible = "nvidia,tegra-audio-trimslice";
460                 nvidia,i2s-controller = <&tegra_i2s1>;
461                 nvidia,audio-codec = <&codec>;
462
463                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
464                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
465                          <&tegra_car TEGRA20_CLK_CDEV1>;
466                 clock-names = "pll_a", "pll_a_out0", "mclk";
467         };
468 };