ethernet: adjust gmac code
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / rk3288-pinctrl.dtsi
1 #include <dt-bindings/interrupt-controller/arm-gic.h>
2 #include <dt-bindings/gpio/gpio.h>
3 #include <dt-bindings/pinctrl/rockchip.h>
4 #include <dt-bindings/pinctrl/rockchip-rk3288.h>
5
6 / { 
7         pinctrl@ff770000 {
8                 compatible = "rockchip,rk3288-pinctrl";
9                 reg = <0xff770000 0x100>;
10                 #address-cells = <1>;
11                 #size-cells = <1>;
12                 ranges;
13
14                 gpio0: gpio0@ff750000 {
15                         compatible = "rockchip,rk3288-gpio-bank0";
16                         reg = <0xff770000 0x100>;
17                         interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
18                         //clocks = <&clk_gates8 9>;
19
20                         gpio-controller;
21                         #gpio-cells = <2>;
22
23                         interrupt-controller;
24                         #interrupt-cells = <2>;
25                 };
26
27                 gpio1: gpio1@ff780000 {
28                         compatible = "rockchip,gpio-bank";
29                         reg = <0xff780000 0x100>;
30                         interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
31                         //clocks = <&clk_gates8 10>;
32
33                         gpio-controller;
34                         #gpio-cells = <2>;
35
36                         interrupt-controller;
37                         #interrupt-cells = <2>;
38                 };
39
40                 gpio2: gpio2@ff790000 {
41                         compatible = "rockchip,gpio-bank";
42                         reg = <0xff790000 0x100>;
43                         interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
44                         //clocks = <&clk_gates8 11>;
45
46                         gpio-controller;
47                         #gpio-cells = <2>;
48
49                         interrupt-controller;
50                         #interrupt-cells = <2>;
51                 };
52
53                 gpio3: gpio3@ff7a0000 {
54                         compatible = "rockchip,gpio-bank";
55                         reg = <0xff7a0000 0x100>;
56                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
57                         //clocks = <&clk_gates8 12>;
58
59                         gpio-controller;
60                         #gpio-cells = <2>;
61
62                         interrupt-controller;
63                         #interrupt-cells = <2>;
64                 };
65
66                 gpio4: gpio4@ff7b0000 {
67                         compatible = "rockchip,gpio-bank";
68                         reg = <0xff7b0000 0x100>;
69                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
70                         //clocks = <&clk_gates8 12>;
71
72                         gpio-controller;
73                         #gpio-cells = <2>;
74
75                         interrupt-controller;
76                         #interrupt-cells = <2>;
77                 };
78
79                 gpio5: gpio5@ff7c0000 {
80                         compatible = "rockchip,gpio-bank";
81                         reg = <0xff7c0000 0x100>;
82                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
83                         //clocks = <&clk_gates8 12>;
84
85                         gpio-controller;
86                         #gpio-cells = <2>;
87
88                         interrupt-controller;
89                         #interrupt-cells = <2>;
90                 };
91
92                 gpio6: gpio6@ff7d0000 {
93                         compatible = "rockchip,gpio-bank";
94                         reg = <0xff7d0000 0x100>;
95                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
96                         //clocks = <&clk_gates8 12>;
97
98                         gpio-controller;
99                         #gpio-cells = <2>;
100
101                         interrupt-controller;
102                         #interrupt-cells = <2>;
103                 };
104
105                 gpio7: gpio7@ff7e0000 {
106                         compatible = "rockchip,gpio-bank";
107                         reg = <0xff7e0000 0x100>;
108                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
109                         //clocks = <&clk_gates8 12>;
110
111                         gpio-controller;
112                         #gpio-cells = <2>;
113
114                         interrupt-controller;
115                         #interrupt-cells = <2>;
116                 };
117
118                 gpio8: gpio8@ff7f0000 {
119                         compatible = "rockchip,gpio-bank";
120                         reg = <0xff7f0000 0x100>;
121                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
122                         //clocks = <&clk_gates8 12>;
123
124                         gpio-controller;
125                         #gpio-cells = <2>;
126
127                         interrupt-controller;
128                         #interrupt-cells = <2>;
129                 };
130
131                 gpio15: gpio15@ff7f2000 {
132                         compatible = "rockchip,gpio-bank";
133                         reg = <0xff7f2000 0x100>;
134                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
135
136                         gpio-controller;
137                         #gpio-cells = <2>;
138
139                         interrupt-controller;
140                         #interrupt-cells = <2>;
141                 };
142
143                 pcfg_pull_up: pcfg_pull_up {
144                         bias-pull-up;
145                 };
146
147                 pcfg_pull_down: pcfg_pull_down {
148                         bias-pull-down;
149                 };
150
151                 pcfg_pull_none: pcfg_pull_none {
152                         bias-disable;
153                 };
154
155                 gpio1_uart0 {
156                         uart0_xfer: uart0-xfer {
157                                 rockchip,pins = <UART0BT_SIN>,
158                                                 <UART0BT_SOUT>;
159                                 rockchip,pull = <VALUE_PULL_DISABLE>;
160                                 rockchip,voltage = <VALUE_VOL_DEFAULT>;
161                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
162                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
163                         };
164
165                         uart0_cts: uart0-cts {
166                                 rockchip,pins = <UART0BT_CTSN>;
167                                 rockchip,pull = <VALUE_PULL_DISABLE>;
168                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
169                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
170                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
171                         };
172
173                         uart0_rts: uart0-rts {
174                                 rockchip,pins = <UART0BT_RTSN>;
175                                 rockchip,pull = <VALUE_PULL_DISABLE>;
176                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
177                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
178                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
179                         };
180                 };
181
182                 gpio1_uart1 {
183                         uart1_xfer: uart1-xfer {
184                                 rockchip,pins = <UART1BB_SIN>,
185                                                 <UART1BB_SOUT>;
186                                 rockchip,pull = <VALUE_PULL_DISABLE>;
187                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
188                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
189                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
190                         };
191
192                         uart1_cts: uart1-cts {
193                                 rockchip,pins = <UART1BB_CTSN>;
194                                 rockchip,pull = <VALUE_PULL_DISABLE>;
195                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
196                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
197                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
198                         };
199
200                         uart1_rts: uart1-rts {
201                                 rockchip,pins = <UART1BB_RTSN>;
202                                 rockchip,pull = <VALUE_PULL_DISABLE>;
203                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
204                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
205                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
206                         };
207                 };
208
209                 gpio1_uart2 {
210                         uart2_xfer: uart2-xfer {
211                                 rockchip,pins = <UART2DBG_SIN>,
212                                                 <UART2DBG_SOUT>;
213                                 rockchip,pull = <VALUE_PULL_DISABLE>;
214                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
215                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
216                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
217                         };
218                         /* no rts / cts for uart2 */
219                 };
220
221                 gpio1_uart3 {
222                         uart3_xfer: uart3-xfer {
223                                 rockchip,pins = <UART3GPS_SIN>,
224                                                 <UART3GPS_SOUT>;
225                                 rockchip,pull = <VALUE_PULL_DISABLE>;
226                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
227                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
228                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
229                         };
230
231                         uart3_cts: uart3-cts {
232                                 rockchip,pins = <UART3GPS_CTSN>;
233                                 rockchip,pull = <VALUE_PULL_DISABLE>;
234                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
235                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
236                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
237                         };
238
239                         uart3_rts: uart3-rts {
240                                 rockchip,pins = <UART3GPS_RTSN>;
241                                 rockchip,pull = <VALUE_PULL_DISABLE>;
242                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
243                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
244                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
245                         };
246                 };
247
248                 gpio1_i2c0 {
249                         i2c0_sda:i2c0-sda {
250                                 rockchip,pins = <I2C0PMU_SDA>;
251                                 rockchip,pull = <VALUE_PULL_DISABLE>;
252                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
253                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
254                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
255                         };
256
257                         i2c0_scl:i2c0-scl {
258                                 rockchip,pins = <I2C0PMU_SCL>;
259                                 rockchip,pull = <VALUE_PULL_DISABLE>;
260                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
261                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
262                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
263                         };
264
265                         i2c0_gpio: i2c0-gpio {
266                                 rockchip,pins = <FUNC_TO_GPIO(I2C0PMU_SDA)>, <FUNC_TO_GPIO(I2C0PMU_SCL)>;
267                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
268                         };
269                 };
270
271                 gpio1_i2c1 {
272                         i2c1_sda:i2c1-sda {
273                                 rockchip,pins = <I2C1SENSOR_SDA>;
274                                 rockchip,pull = <VALUE_PULL_DISABLE>;
275                                 rockchip,voltage = <VALUE_VOL_DEFAULT>;
276                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
277                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
278                         };
279
280                         i2c1_scl:i2c1-scl {
281                                 rockchip,pins = <I2C1SENSOR_SCL>;
282                                 rockchip,pull = <VALUE_PULL_DISABLE>;
283                                 rockchip,voltage = <VALUE_VOL_DEFAULT>;
284                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
285                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
286                         };
287
288                         i2c1_gpio: i2c1-gpio {
289                                 rockchip,pins = <FUNC_TO_GPIO(I2C1SENSOR_SDA)>, <FUNC_TO_GPIO(I2C1SENSOR_SCL)>;
290                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
291                         };
292                 };
293
294                 gpio1_i2c2 {
295                         i2c2_sda:i2c2-sda {
296                                 rockchip,pins = <I2C2AUDIO_SDA>;
297                                 rockchip,pull = <VALUE_PULL_DISABLE>;
298                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
299                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
300                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
301                         };
302
303                         i2c2_scl:i2c2-scl {
304                                 rockchip,pins = <I2C2AUDIO_SCL>;
305                                 rockchip,pull = <VALUE_PULL_DISABLE>;
306                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
307                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
308                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
309                         };
310
311                         i2c2_gpio: i2c2-gpio {
312                                 rockchip,pins = <FUNC_TO_GPIO(I2C2AUDIO_SDA)>, <FUNC_TO_GPIO(I2C2AUDIO_SCL)>;
313                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
314                         };
315                 };
316
317                 gpio1_i2c3 {
318                         i2c3_sda:i2c3-sda {
319                                 rockchip,pins = <I2C3CAM_SDA>;
320                                 rockchip,pull = <VALUE_PULL_DISABLE>;
321                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
322                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
323                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
324                         };
325
326                         i2c3_scl:i2c3-scl {
327                                 rockchip,pins = <I2C3CAM_SCL>;
328                                 rockchip,pull = <VALUE_PULL_DISABLE>;
329                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
330                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
331                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
332                         };
333
334                         i2c3_gpio: i2c3-gpio {
335                                 rockchip,pins = <FUNC_TO_GPIO(I2C3CAM_SDA)>, <FUNC_TO_GPIO(I2C3CAM_SCL)>;
336                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
337                         };
338                 };
339
340                 gpio1_i2c4 {
341                         i2c4_sda:i2c4-sda {
342                                 rockchip,pins = <I2C4TP_SDA>;
343                                 rockchip,pull = <VALUE_PULL_DISABLE>;
344                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
345                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
346                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
347                         };
348
349                         i2c4_scl:i2c4-scl {
350                                 rockchip,pins = <I2C4TP_SCL>;
351                                 rockchip,pull = <VALUE_PULL_DISABLE>;
352                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
353                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
354                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
355                         };
356
357                         i2c4_gpio: i2c4-gpio {
358                                 rockchip,pins = <FUNC_TO_GPIO(I2C4TP_SDA)>, <FUNC_TO_GPIO(I2C4TP_SCL)>;
359                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
360                         };
361                 };
362
363                 gpio1_i2c5 {
364                         i2c5_sda:i2c5-sda {
365                                 rockchip,pins = <I2C5HDMI_SDA>;
366                                 rockchip,pull = <VALUE_PULL_DISABLE>;
367                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
368                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
369                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
370                         };
371
372                         i2c5_scl:i2c5-scl {
373                                 rockchip,pins = <I2C5HDMI_SCL>;
374                                 rockchip,pull = <VALUE_PULL_DISABLE>;
375                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
376                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
377                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
378                         };
379
380                         i2c5_gpio: i2c5-gpio {
381                                 rockchip,pins = <FUNC_TO_GPIO(I2C5HDMI_SDA)>, <FUNC_TO_GPIO(I2C5HDMI_SCL)>;
382                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
383                         };
384                 };
385
386                 gpio1_spi0 {
387                         spi0_txd:spi0-txd {
388                                 rockchip,pins = <SPI0_TXD>;
389                                 rockchip,pull = <VALUE_PULL_DISABLE>;
390                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
391                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
392                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
393                         };
394
395                         spi0_rxd:spi0-rxd {
396                                 rockchip,pins = <SPI0_RXD>;
397                                 rockchip,pull = <VALUE_PULL_DISABLE>;
398                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
399                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
400                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
401                         };
402
403                         spi0_clk:spi0-clk {
404                                 rockchip,pins = <SPI0_CLK>;
405                                 rockchip,pull = <VALUE_PULL_DISABLE>;
406                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
407                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
408                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
409                         };
410
411                         spi0_cs0:spi0-cs0 {
412                                 rockchip,pins = <SPI0_CS0>;
413                                 rockchip,pull = <VALUE_PULL_DISABLE>;
414                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
415                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
416                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
417                         };
418
419                         spi0_cs1:spi0-cs1 {
420                                 rockchip,pins = <SPI0_CS1>;
421                                 rockchip,pull = <VALUE_PULL_DISABLE>;
422                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
423                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
424                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
425                         };
426
427                 };
428
429                 gpio1_spi1 {
430                         spi1_txd:spi1-txd {
431                                 rockchip,pins = <SPI1_TXD>;
432                                 rockchip,pull = <VALUE_PULL_DISABLE>;
433                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
434                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
435                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
436                         };
437
438                         spi1_rxd:spi1-rxd {
439                                 rockchip,pins = <SPI1_RXD>;
440                                 rockchip,pull = <VALUE_PULL_DISABLE>;
441                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
442                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
443                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
444                         };
445
446                         spi1_clk:spi1-clk {
447                                 rockchip,pins = <SPI1_CLK>;
448                                 rockchip,pull = <VALUE_PULL_DISABLE>;
449                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
450                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
451                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
452                         };
453
454                         spi1_cs0:spi1-cs0 {
455                                 rockchip,pins = <SPI1_CS0>;
456                                 rockchip,pull = <VALUE_PULL_DISABLE>;
457                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
458                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
459                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
460                         };
461
462                 };
463
464                 gpio1_i2s {
465
466                         i2s_mclk:i2s-mclk {
467                                 rockchip,pins = <I2S_CLK>;
468                                 rockchip,pull = <VALUE_PULL_DISABLE>;
469                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
470                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
471                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
472
473                         };
474
475                         i2s_sclk:i2s-sclk {
476                                 rockchip,pins = <I2S_SCLK>;
477                                 rockchip,pull = <VALUE_PULL_DISABLE>;
478                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
479                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
480                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
481
482                         };
483
484                         i2s_lrckrx:i2s-lrckrx {
485                                 rockchip,pins = <I2S_LRCKRX>;
486                                 rockchip,pull = <VALUE_PULL_DISABLE>;
487                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
488                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
489                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
490
491                         };
492
493                         i2s_lrcktx:i2s-lrcktx {
494                                 rockchip,pins = <I2S_LRCKTX>;
495                                 rockchip,pull = <VALUE_PULL_DISABLE>;
496                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
497                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
498                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
499
500                         };
501
502                         i2s_sdo0:i2s-sdo0 {
503                                 rockchip,pins = <I2S_SDO0>;
504                                 rockchip,pull = <VALUE_PULL_DISABLE>;
505                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
506                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
507                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
508
509                         };
510
511                         i2s_sdo1:i2s-sdo1 {
512                                 rockchip,pins = <I2S_SDO1>;
513                                 rockchip,pull = <VALUE_PULL_DISABLE>;
514                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
515                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
516                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
517
518                         };
519
520                         i2s_sdo2:i2s-sdo2 {
521                                 rockchip,pins = <I2S_SDO2>;
522                                 rockchip,pull = <VALUE_PULL_DISABLE>;
523                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
524                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
525                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
526
527                         };
528
529                         i2s_sdo3:i2s-sdo3 {
530                                 rockchip,pins = <I2S_SDO3>;
531                                 rockchip,pull = <VALUE_PULL_DISABLE>;
532                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
533                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
534                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
535
536                         };
537
538                         i2s_sdi:i2s-sdi {
539                                 rockchip,pins = <I2S_SDI>;
540                                 rockchip,pull = <VALUE_PULL_DISABLE>;
541                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
542                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
543                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
544
545                         };
546
547                         i2s_gpio: i2s-gpio {
548                                 rockchip,pins = <FUNC_TO_GPIO(I2S_CLK)>,
549                                                 <FUNC_TO_GPIO(I2S_SCLK)>,
550                                                 <FUNC_TO_GPIO(I2S_LRCKRX)>,
551                                                 <FUNC_TO_GPIO(I2S_LRCKTX)>,
552                                                 <FUNC_TO_GPIO(I2S_SDO0)>,
553                                                 <FUNC_TO_GPIO(I2S_SDO1)>,
554                                                 <FUNC_TO_GPIO(I2S_SDO2)>,
555                                                 <FUNC_TO_GPIO(I2S_SDO3)>,
556                                                 <FUNC_TO_GPIO(I2S_SDI)>;
557
558                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
559                         };
560                 };
561         
562                 gpio1_lcdc0 {
563                         lcdc0_lcdc:lcdc0-lcdc {
564                                 rockchip,pins =
565                                                 <LCDC0_DCLK_GPIO1D>,
566                                                 <LCDC0_DEN_GPIO1D>,
567                                                 <LCDC0_HSYNC_GPIO1D>,
568                                                 <LCDC0_VSYNC_GPIO1D>;
569                                 rockchip,pull = <VALUE_PULL_DISABLE>;
570                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
571                         };
572                         
573                         lcdc0_gpio:lcdc0-gpio {
574                                 rockchip,pins = 
575                                                 <FUNC_TO_GPIO(LCDC0_DCLK_GPIO1D)>,
576                                                 <FUNC_TO_GPIO(LCDC0_DEN_GPIO1D)>,
577                                                 <FUNC_TO_GPIO(LCDC0_HSYNC_GPIO1D)>,
578                                                 <FUNC_TO_GPIO(LCDC0_VSYNC_GPIO1D)>;
579                                 rockchip,pull = <VALUE_PULL_DISABLE>;
580                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
581                                 
582                         };
583                         
584                 };
585
586                 gpio1_spdif {
587                         spdif_tx: spdif-tx {
588                                 rockchip,pins = <SPDIF_TX>;
589                                 rockchip,pull = <VALUE_PULL_DISABLE>;
590                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
591                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
592                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
593
594                         };
595                 };
596
597                 gpio3_pwm {
598                         pwm0_pin:pwm0 {
599                                 rockchip,pins = <PWM0>;
600                                 rockchip,pull = <VALUE_PULL_DISABLE>;
601                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
602                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
603                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
604
605                         };
606
607
608                         pwm1_pin:pwm1 {
609                                 rockchip,pins = <PWM1>;
610                                 rockchip,pull = <VALUE_PULL_DISABLE>;
611                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
612                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
613                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
614                         };
615
616
617                         pwm2_pin:pwm2 {
618                                 rockchip,pins = <PWM2>;
619                                 rockchip,pull = <VALUE_PULL_DISABLE>;
620                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
621                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
622                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
623                         };
624
625
626                         pwm3_pin:pwm3 {
627                                 rockchip,pins = <PWM3>;
628                                 rockchip,pull = <VALUE_PULL_DISABLE>;
629                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
630                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
631                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
632                         };
633
634                 };
635
636                 gpio3_emmc0 {
637                         emmc0_clk: emmc0-clk {
638                                 rockchip,pins = <EMMC_CLKOUT>;
639                                 rockchip,pull = <VALUE_PULL_DISABLE>;
640                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
641                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
642                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
643                         };
644
645                         emmc0_cmd: emmc0-cmd {
646                                 rockchip,pins = <EMMC_CMD>;
647                                 rockchip,pull = <VALUE_PULL_UP>;
648                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
649                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
650                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
651                         };
652
653                         emmc0_rstnout: emmc0-rstnout {
654                                 rockchip,pins = <EMMC_RSTNOUT>;
655                                 rockchip,pull = <VALUE_PULL_UP>;
656                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
657                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
658                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
659                         };
660
661
662                         emmc0_pwr: emmc0-pwr {
663                                 rockchip,pins = <EMMC_PWREN>;
664                                 rockchip,pull = <VALUE_PULL_DISABLE>;
665                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
666                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
667                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
668                         };
669
670                         emmc0_bus1: emmc0-bus-width1 {
671                                 rockchip,pins = <EMMC_DATA0>;
672                                 rockchip,pull = <VALUE_PULL_UP>;
673                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
674                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
675                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
676                         };
677
678                         emmc0_bus4: emmc0-bus-width4 {
679                                 rockchip,pins = <EMMC_DATA0>,
680                                                 <EMMC_DATA1>,
681                                                 <EMMC_DATA2 >,
682                                                 <EMMC_DATA3>;
683                                 rockchip,pull = <VALUE_PULL_UP>;
684                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
685                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
686                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
687                         };
688                 };
689                 
690
691                 gpio3_sdmmc0 {
692                         sdmmc0_clk: sdmmc0-clk {
693                                 rockchip,pins = <SDMMC0_CLKOUT>;
694                                 rockchip,pull = <VALUE_PULL_DISABLE>;
695                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
696                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
697                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
698                         };
699
700                         sdmmc0_cmd: sdmmc0-cmd {
701                                 rockchip,pins = <SDMMC0_CMD>;
702                                 rockchip,pull = <VALUE_PULL_UP>;
703                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
704                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
705                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
706                         };
707
708                         sdmmc0_dectn: sdmmc0-dectn{
709                                 rockchip,pins = <SDMMC0_DECTN>;
710                                 rockchip,pull = <VALUE_PULL_UP>;
711                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
712                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
713                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
714                         };
715
716
717                         sdmmc0_bus1: sdmmc0-bus-width1 {
718                                 rockchip,pins = <SDMMC0_DATA0>;
719                                 rockchip,pull = <VALUE_PULL_UP>;
720                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
721                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
722                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
723                         };
724
725                         sdmmc0_bus4: sdmmc0-bus-width4 {
726                                 rockchip,pins = <SDMMC0_DATA0>,
727                                                 <SDMMC0_DATA1>,
728                                                 <SDMMC0_DATA2>,
729                                                 <SDMMC0_DATA3>;
730                                 rockchip,pull = <VALUE_PULL_UP>;
731                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
732                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
733                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
734                         };
735                 };
736
737                 gps {
738                         gps_mag:gps-mag {
739                                 rockchip,pins = <GPS_MAG>;
740                                 rockchip,pull = <VALUE_PULL_DISABLE>;
741                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
742                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
743                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
744
745                         };
746
747                         gps_sig:gps-sig {
748                                 rockchip,pins = <GPS_SIG>;
749                                 rockchip,pull = <VALUE_PULL_DISABLE>;
750                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
751                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
752                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
753
754                         };
755
756
757                         gps_rfclk:gps-rfclk {
758                                 rockchip,pins = <GPS_RFCLK>;
759                                 rockchip,pull = <VALUE_PULL_DISABLE>;
760                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
761                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
762                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
763
764                         };
765
766                 };
767
768                 vol_domain {
769                         ap0_vcc:ap0-vcc {
770                                 rockchip,pins = <VIRTUAL_PIN_FOR_AP0_VCC>;
771                                 rockchip,voltage = <VALUE_VOL_DEFAULT>;
772                         };
773                         
774                         ap1_vcc:ap1-vcc {
775                                 rockchip,pins = <VIRTUAL_PIN_FOR_AP1_VCC>;
776                                 rockchip,voltage = <VALUE_VOL_DEFAULT>;
777                         };
778                         
779                         cif_vcc:cif-vcc {
780                                 rockchip,pins = <VIRTUAL_PIN_FOR_CIF_VCC>;
781                                 rockchip,voltage = <VALUE_VOL_DEFAULT>;
782                         };
783
784                         flash_vcc:flash-vcc {
785                                 rockchip,pins = <VIRTUAL_PIN_FOR_FLASH_VCC>;
786                                 rockchip,voltage = <VALUE_VOL_DEFAULT>;
787                         };
788                         
789                         vccio0_vcc:vccio0-vcc {
790                                 rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO0_VCC>;
791                                 rockchip,voltage = <VALUE_VOL_DEFAULT>; 
792                         };
793
794                         vccio1_vcc:vccio1-vcc {
795                                 rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO1_VCC>;
796                                 rockchip,voltage = <VALUE_VOL_DEFAULT>; 
797                         };
798
799                         lcdc0_vcc:lcdc0-vcc {
800                                 rockchip,pins = <VIRTUAL_PIN_FOR_LCDC0_VCC>;
801                                 rockchip,voltage = <VALUE_VOL_DEFAULT>;
802                         };
803
804                         lcdc1_vcc:lcdc1-vcc {
805                                 rockchip,pins = <VIRTUAL_PIN_FOR_LCDC1_VCC>;
806                                 rockchip,voltage = <VALUE_VOL_DEFAULT>;
807                         };
808
809                 };
810                 
811                 gmac {
812                         mac_clk: mac-clk {
813                                 rockchip,pins = <MAC_CLK>;
814                                 rockchip,pull = <VALUE_PULL_DISABLE>;
815                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
816                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
817                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
818                         };
819                         
820                         mac_txpins: mac-txpins {
821                                 rockchip,pins = <MAC_TXD0>, <MAC_TXD1>, <MAC_TXD2>, <MAC_TXD3>, <MAC_TXEN>, <MAC_TXCLK>;
822                                 rockchip,pull = <VALUE_PULL_DISABLE>;
823                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
824                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
825                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
826                         };
827                         
828                         mac_rxpins: mac-rxpins {
829                                 rockchip,pins = <MAC_RXD0>, <MAC_RXD1>, <MAC_RXD2>, <MAC_RXD3>, <MAC_RXDV>, <MAC_RXER>, <MAC_RXCLK>, <MAC_CRS>, <MAC_COL>;
830                                 rockchip,pull = <VALUE_PULL_DISABLE>;
831                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
832                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
833                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
834                         };
835                         
836                         mac_mdpins: mac-mdpins {
837                                 rockchip,pins = <MAC_MDIO>, <MAC_MDC>;
838                                 rockchip,pull = <VALUE_PULL_DISABLE>;
839                                 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
840                                 rockchip,drive = <VALUE_DRV_DEFAULT>;
841                                 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
842                         };
843                 };
844
845                 //to add
846         };
847 };