1 #include <dt-bindings/interrupt-controller/arm-gic.h>
2 #include <dt-bindings/gpio/gpio.h>
3 #include <dt-bindings/pinctrl/rockchip.h>
4 #include <dt-bindings/pinctrl/rockchip-rk3288.h>
8 compatible = "rockchip,rk3288-pinctrl";
9 reg = <0xff770000 0x100>;
14 gpio0: gpio0@ff750000 {
15 compatible = "rockchip,rk3288-gpio-bank0";
16 reg = <0xff770000 0x100>;
17 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
18 //clocks = <&clk_gates8 9>;
24 #interrupt-cells = <2>;
27 gpio1: gpio1@ff780000 {
28 compatible = "rockchip,gpio-bank";
29 reg = <0xff780000 0x100>;
30 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
31 //clocks = <&clk_gates8 10>;
37 #interrupt-cells = <2>;
40 gpio2: gpio2@ff790000 {
41 compatible = "rockchip,gpio-bank";
42 reg = <0xff790000 0x100>;
43 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
44 //clocks = <&clk_gates8 11>;
50 #interrupt-cells = <2>;
53 gpio3: gpio3@ff7a0000 {
54 compatible = "rockchip,gpio-bank";
55 reg = <0xff7a0000 0x100>;
56 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
57 //clocks = <&clk_gates8 12>;
63 #interrupt-cells = <2>;
66 gpio4: gpio4@ff7b0000 {
67 compatible = "rockchip,gpio-bank";
68 reg = <0xff7b0000 0x100>;
69 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
70 //clocks = <&clk_gates8 12>;
76 #interrupt-cells = <2>;
79 gpio5: gpio5@ff7c0000 {
80 compatible = "rockchip,gpio-bank";
81 reg = <0xff7c0000 0x100>;
82 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
83 //clocks = <&clk_gates8 12>;
89 #interrupt-cells = <2>;
92 gpio6: gpio6@ff7d0000 {
93 compatible = "rockchip,gpio-bank";
94 reg = <0xff7d0000 0x100>;
95 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
96 //clocks = <&clk_gates8 12>;
101 interrupt-controller;
102 #interrupt-cells = <2>;
105 gpio7: gpio7@ff7e0000 {
106 compatible = "rockchip,gpio-bank";
107 reg = <0xff7e0000 0x100>;
108 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
109 //clocks = <&clk_gates8 12>;
114 interrupt-controller;
115 #interrupt-cells = <2>;
118 gpio8: gpio8@ff7f0000 {
119 compatible = "rockchip,gpio-bank";
120 reg = <0xff7f0000 0x100>;
121 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
122 //clocks = <&clk_gates8 12>;
127 interrupt-controller;
128 #interrupt-cells = <2>;
131 gpio15: gpio15@ff7f2000 {
132 compatible = "rockchip,gpio-bank";
133 reg = <0xff7f2000 0x100>;
134 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
139 interrupt-controller;
140 #interrupt-cells = <2>;
143 pcfg_pull_up: pcfg_pull_up {
147 pcfg_pull_down: pcfg_pull_down {
151 pcfg_pull_none: pcfg_pull_none {
156 uart0_xfer: uart0-xfer {
157 rockchip,pins = <UART0BT_SIN>,
159 rockchip,pull = <VALUE_PULL_DISABLE>;
160 rockchip,voltage = <VALUE_VOL_DEFAULT>;
161 rockchip,drive = <VALUE_DRV_DEFAULT>;
162 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
165 uart0_cts: uart0-cts {
166 rockchip,pins = <UART0BT_CTSN>;
167 rockchip,pull = <VALUE_PULL_DISABLE>;
168 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
169 rockchip,drive = <VALUE_DRV_DEFAULT>;
170 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
173 uart0_rts: uart0-rts {
174 rockchip,pins = <UART0BT_RTSN>;
175 rockchip,pull = <VALUE_PULL_DISABLE>;
176 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
177 rockchip,drive = <VALUE_DRV_DEFAULT>;
178 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
183 uart1_xfer: uart1-xfer {
184 rockchip,pins = <UART1BB_SIN>,
186 rockchip,pull = <VALUE_PULL_DISABLE>;
187 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
188 rockchip,drive = <VALUE_DRV_DEFAULT>;
189 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
192 uart1_cts: uart1-cts {
193 rockchip,pins = <UART1BB_CTSN>;
194 rockchip,pull = <VALUE_PULL_DISABLE>;
195 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
196 rockchip,drive = <VALUE_DRV_DEFAULT>;
197 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
200 uart1_rts: uart1-rts {
201 rockchip,pins = <UART1BB_RTSN>;
202 rockchip,pull = <VALUE_PULL_DISABLE>;
203 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
204 rockchip,drive = <VALUE_DRV_DEFAULT>;
205 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
210 uart2_xfer: uart2-xfer {
211 rockchip,pins = <UART2DBG_SIN>,
213 rockchip,pull = <VALUE_PULL_DISABLE>;
214 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
215 rockchip,drive = <VALUE_DRV_DEFAULT>;
216 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
218 /* no rts / cts for uart2 */
222 uart3_xfer: uart3-xfer {
223 rockchip,pins = <UART3GPS_SIN>,
225 rockchip,pull = <VALUE_PULL_DISABLE>;
226 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
227 rockchip,drive = <VALUE_DRV_DEFAULT>;
228 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
231 uart3_cts: uart3-cts {
232 rockchip,pins = <UART3GPS_CTSN>;
233 rockchip,pull = <VALUE_PULL_DISABLE>;
234 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
235 rockchip,drive = <VALUE_DRV_DEFAULT>;
236 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
239 uart3_rts: uart3-rts {
240 rockchip,pins = <UART3GPS_RTSN>;
241 rockchip,pull = <VALUE_PULL_DISABLE>;
242 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
243 rockchip,drive = <VALUE_DRV_DEFAULT>;
244 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
250 rockchip,pins = <I2C0PMU_SDA>;
251 rockchip,pull = <VALUE_PULL_DISABLE>;
252 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
253 rockchip,drive = <VALUE_DRV_DEFAULT>;
254 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
258 rockchip,pins = <I2C0PMU_SCL>;
259 rockchip,pull = <VALUE_PULL_DISABLE>;
260 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
261 rockchip,drive = <VALUE_DRV_DEFAULT>;
262 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
265 i2c0_gpio: i2c0-gpio {
266 rockchip,pins = <FUNC_TO_GPIO(I2C0PMU_SDA)>, <FUNC_TO_GPIO(I2C0PMU_SCL)>;
267 rockchip,drive = <VALUE_DRV_DEFAULT>;
273 rockchip,pins = <I2C1SENSOR_SDA>;
274 rockchip,pull = <VALUE_PULL_DISABLE>;
275 rockchip,voltage = <VALUE_VOL_DEFAULT>;
276 rockchip,drive = <VALUE_DRV_DEFAULT>;
277 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
281 rockchip,pins = <I2C1SENSOR_SCL>;
282 rockchip,pull = <VALUE_PULL_DISABLE>;
283 rockchip,voltage = <VALUE_VOL_DEFAULT>;
284 rockchip,drive = <VALUE_DRV_DEFAULT>;
285 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
288 i2c1_gpio: i2c1-gpio {
289 rockchip,pins = <FUNC_TO_GPIO(I2C1SENSOR_SDA)>, <FUNC_TO_GPIO(I2C1SENSOR_SCL)>;
290 rockchip,drive = <VALUE_DRV_DEFAULT>;
296 rockchip,pins = <I2C2AUDIO_SDA>;
297 rockchip,pull = <VALUE_PULL_DISABLE>;
298 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
299 rockchip,drive = <VALUE_DRV_DEFAULT>;
300 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
304 rockchip,pins = <I2C2AUDIO_SCL>;
305 rockchip,pull = <VALUE_PULL_DISABLE>;
306 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
307 rockchip,drive = <VALUE_DRV_DEFAULT>;
308 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
311 i2c2_gpio: i2c2-gpio {
312 rockchip,pins = <FUNC_TO_GPIO(I2C2AUDIO_SDA)>, <FUNC_TO_GPIO(I2C2AUDIO_SCL)>;
313 rockchip,drive = <VALUE_DRV_DEFAULT>;
319 rockchip,pins = <I2C3CAM_SDA>;
320 rockchip,pull = <VALUE_PULL_DISABLE>;
321 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
322 rockchip,drive = <VALUE_DRV_DEFAULT>;
323 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
327 rockchip,pins = <I2C3CAM_SCL>;
328 rockchip,pull = <VALUE_PULL_DISABLE>;
329 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
330 rockchip,drive = <VALUE_DRV_DEFAULT>;
331 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
334 i2c3_gpio: i2c3-gpio {
335 rockchip,pins = <FUNC_TO_GPIO(I2C3CAM_SDA)>, <FUNC_TO_GPIO(I2C3CAM_SCL)>;
336 rockchip,drive = <VALUE_DRV_DEFAULT>;
342 rockchip,pins = <I2C4TP_SDA>;
343 rockchip,pull = <VALUE_PULL_DISABLE>;
344 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
345 rockchip,drive = <VALUE_DRV_DEFAULT>;
346 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
350 rockchip,pins = <I2C4TP_SCL>;
351 rockchip,pull = <VALUE_PULL_DISABLE>;
352 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
353 rockchip,drive = <VALUE_DRV_DEFAULT>;
354 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
357 i2c4_gpio: i2c4-gpio {
358 rockchip,pins = <FUNC_TO_GPIO(I2C4TP_SDA)>, <FUNC_TO_GPIO(I2C4TP_SCL)>;
359 rockchip,drive = <VALUE_DRV_DEFAULT>;
365 rockchip,pins = <I2C5HDMI_SDA>;
366 rockchip,pull = <VALUE_PULL_DISABLE>;
367 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
368 rockchip,drive = <VALUE_DRV_DEFAULT>;
369 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
373 rockchip,pins = <I2C5HDMI_SCL>;
374 rockchip,pull = <VALUE_PULL_DISABLE>;
375 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
376 rockchip,drive = <VALUE_DRV_DEFAULT>;
377 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
380 i2c5_gpio: i2c5-gpio {
381 rockchip,pins = <FUNC_TO_GPIO(I2C5HDMI_SDA)>, <FUNC_TO_GPIO(I2C5HDMI_SCL)>;
382 rockchip,drive = <VALUE_DRV_DEFAULT>;
388 rockchip,pins = <SPI0_TXD>;
389 rockchip,pull = <VALUE_PULL_DISABLE>;
390 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
391 rockchip,drive = <VALUE_DRV_DEFAULT>;
392 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
396 rockchip,pins = <SPI0_RXD>;
397 rockchip,pull = <VALUE_PULL_DISABLE>;
398 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
399 rockchip,drive = <VALUE_DRV_DEFAULT>;
400 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
404 rockchip,pins = <SPI0_CLK>;
405 rockchip,pull = <VALUE_PULL_DISABLE>;
406 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
407 rockchip,drive = <VALUE_DRV_DEFAULT>;
408 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
412 rockchip,pins = <SPI0_CS0>;
413 rockchip,pull = <VALUE_PULL_DISABLE>;
414 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
415 rockchip,drive = <VALUE_DRV_DEFAULT>;
416 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
420 rockchip,pins = <SPI0_CS1>;
421 rockchip,pull = <VALUE_PULL_DISABLE>;
422 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
423 rockchip,drive = <VALUE_DRV_DEFAULT>;
424 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
431 rockchip,pins = <SPI1_TXD>;
432 rockchip,pull = <VALUE_PULL_DISABLE>;
433 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
434 rockchip,drive = <VALUE_DRV_DEFAULT>;
435 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
439 rockchip,pins = <SPI1_RXD>;
440 rockchip,pull = <VALUE_PULL_DISABLE>;
441 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
442 rockchip,drive = <VALUE_DRV_DEFAULT>;
443 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
447 rockchip,pins = <SPI1_CLK>;
448 rockchip,pull = <VALUE_PULL_DISABLE>;
449 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
450 rockchip,drive = <VALUE_DRV_DEFAULT>;
451 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
455 rockchip,pins = <SPI1_CS0>;
456 rockchip,pull = <VALUE_PULL_DISABLE>;
457 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
458 rockchip,drive = <VALUE_DRV_DEFAULT>;
459 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
467 rockchip,pins = <I2S_CLK>;
468 rockchip,pull = <VALUE_PULL_DISABLE>;
469 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
470 rockchip,drive = <VALUE_DRV_DEFAULT>;
471 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
476 rockchip,pins = <I2S_SCLK>;
477 rockchip,pull = <VALUE_PULL_DISABLE>;
478 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
479 rockchip,drive = <VALUE_DRV_DEFAULT>;
480 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
484 i2s_lrckrx:i2s-lrckrx {
485 rockchip,pins = <I2S_LRCKRX>;
486 rockchip,pull = <VALUE_PULL_DISABLE>;
487 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
488 rockchip,drive = <VALUE_DRV_DEFAULT>;
489 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
493 i2s_lrcktx:i2s-lrcktx {
494 rockchip,pins = <I2S_LRCKTX>;
495 rockchip,pull = <VALUE_PULL_DISABLE>;
496 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
497 rockchip,drive = <VALUE_DRV_DEFAULT>;
498 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
503 rockchip,pins = <I2S_SDO0>;
504 rockchip,pull = <VALUE_PULL_DISABLE>;
505 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
506 rockchip,drive = <VALUE_DRV_DEFAULT>;
507 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
512 rockchip,pins = <I2S_SDO1>;
513 rockchip,pull = <VALUE_PULL_DISABLE>;
514 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
515 rockchip,drive = <VALUE_DRV_DEFAULT>;
516 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
521 rockchip,pins = <I2S_SDO2>;
522 rockchip,pull = <VALUE_PULL_DISABLE>;
523 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
524 rockchip,drive = <VALUE_DRV_DEFAULT>;
525 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
530 rockchip,pins = <I2S_SDO3>;
531 rockchip,pull = <VALUE_PULL_DISABLE>;
532 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
533 rockchip,drive = <VALUE_DRV_DEFAULT>;
534 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
539 rockchip,pins = <I2S_SDI>;
540 rockchip,pull = <VALUE_PULL_DISABLE>;
541 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
542 rockchip,drive = <VALUE_DRV_DEFAULT>;
543 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
548 rockchip,pins = <FUNC_TO_GPIO(I2S_CLK)>,
549 <FUNC_TO_GPIO(I2S_SCLK)>,
550 <FUNC_TO_GPIO(I2S_LRCKRX)>,
551 <FUNC_TO_GPIO(I2S_LRCKTX)>,
552 <FUNC_TO_GPIO(I2S_SDO0)>,
553 <FUNC_TO_GPIO(I2S_SDO1)>,
554 <FUNC_TO_GPIO(I2S_SDO2)>,
555 <FUNC_TO_GPIO(I2S_SDO3)>,
556 <FUNC_TO_GPIO(I2S_SDI)>;
558 rockchip,drive = <VALUE_DRV_DEFAULT>;
563 lcdc0_lcdc:lcdc0-lcdc {
567 <LCDC0_HSYNC_GPIO1D>,
568 <LCDC0_VSYNC_GPIO1D>;
569 rockchip,pull = <VALUE_PULL_DISABLE>;
570 rockchip,drive = <VALUE_DRV_DEFAULT>;
573 lcdc0_gpio:lcdc0-gpio {
575 <FUNC_TO_GPIO(LCDC0_DCLK_GPIO1D)>,
576 <FUNC_TO_GPIO(LCDC0_DEN_GPIO1D)>,
577 <FUNC_TO_GPIO(LCDC0_HSYNC_GPIO1D)>,
578 <FUNC_TO_GPIO(LCDC0_VSYNC_GPIO1D)>;
579 rockchip,pull = <VALUE_PULL_DISABLE>;
580 rockchip,drive = <VALUE_DRV_DEFAULT>;
588 rockchip,pins = <SPDIF_TX>;
589 rockchip,pull = <VALUE_PULL_DISABLE>;
590 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
591 rockchip,drive = <VALUE_DRV_DEFAULT>;
592 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
599 rockchip,pins = <PWM0>;
600 rockchip,pull = <VALUE_PULL_DISABLE>;
601 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
602 rockchip,drive = <VALUE_DRV_DEFAULT>;
603 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
609 rockchip,pins = <PWM1>;
610 rockchip,pull = <VALUE_PULL_DISABLE>;
611 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
612 rockchip,drive = <VALUE_DRV_DEFAULT>;
613 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
618 rockchip,pins = <PWM2>;
619 rockchip,pull = <VALUE_PULL_DISABLE>;
620 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
621 rockchip,drive = <VALUE_DRV_DEFAULT>;
622 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
627 rockchip,pins = <PWM3>;
628 rockchip,pull = <VALUE_PULL_DISABLE>;
629 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
630 rockchip,drive = <VALUE_DRV_DEFAULT>;
631 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
637 emmc0_clk: emmc0-clk {
638 rockchip,pins = <EMMC_CLKOUT>;
639 rockchip,pull = <VALUE_PULL_DISABLE>;
640 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
641 rockchip,drive = <VALUE_DRV_DEFAULT>;
642 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
645 emmc0_cmd: emmc0-cmd {
646 rockchip,pins = <EMMC_CMD>;
647 rockchip,pull = <VALUE_PULL_UP>;
648 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
649 rockchip,drive = <VALUE_DRV_DEFAULT>;
650 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
653 emmc0_rstnout: emmc0-rstnout {
654 rockchip,pins = <EMMC_RSTNOUT>;
655 rockchip,pull = <VALUE_PULL_UP>;
656 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
657 rockchip,drive = <VALUE_DRV_DEFAULT>;
658 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
662 emmc0_pwr: emmc0-pwr {
663 rockchip,pins = <EMMC_PWREN>;
664 rockchip,pull = <VALUE_PULL_DISABLE>;
665 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
666 rockchip,drive = <VALUE_DRV_DEFAULT>;
667 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
670 emmc0_bus1: emmc0-bus-width1 {
671 rockchip,pins = <EMMC_DATA0>;
672 rockchip,pull = <VALUE_PULL_UP>;
673 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
674 rockchip,drive = <VALUE_DRV_DEFAULT>;
675 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
678 emmc0_bus4: emmc0-bus-width4 {
679 rockchip,pins = <EMMC_DATA0>,
683 rockchip,pull = <VALUE_PULL_UP>;
684 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
685 rockchip,drive = <VALUE_DRV_DEFAULT>;
686 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
692 sdmmc0_clk: sdmmc0-clk {
693 rockchip,pins = <SDMMC0_CLKOUT>;
694 rockchip,pull = <VALUE_PULL_DISABLE>;
695 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
696 rockchip,drive = <VALUE_DRV_DEFAULT>;
697 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
700 sdmmc0_cmd: sdmmc0-cmd {
701 rockchip,pins = <SDMMC0_CMD>;
702 rockchip,pull = <VALUE_PULL_UP>;
703 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
704 rockchip,drive = <VALUE_DRV_DEFAULT>;
705 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
708 sdmmc0_dectn: sdmmc0-dectn{
709 rockchip,pins = <SDMMC0_DECTN>;
710 rockchip,pull = <VALUE_PULL_UP>;
711 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
712 rockchip,drive = <VALUE_DRV_DEFAULT>;
713 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
717 sdmmc0_bus1: sdmmc0-bus-width1 {
718 rockchip,pins = <SDMMC0_DATA0>;
719 rockchip,pull = <VALUE_PULL_UP>;
720 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
721 rockchip,drive = <VALUE_DRV_DEFAULT>;
722 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
725 sdmmc0_bus4: sdmmc0-bus-width4 {
726 rockchip,pins = <SDMMC0_DATA0>,
730 rockchip,pull = <VALUE_PULL_UP>;
731 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
732 rockchip,drive = <VALUE_DRV_DEFAULT>;
733 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
739 rockchip,pins = <GPS_MAG>;
740 rockchip,pull = <VALUE_PULL_DISABLE>;
741 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
742 rockchip,drive = <VALUE_DRV_DEFAULT>;
743 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
748 rockchip,pins = <GPS_SIG>;
749 rockchip,pull = <VALUE_PULL_DISABLE>;
750 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
751 rockchip,drive = <VALUE_DRV_DEFAULT>;
752 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
757 gps_rfclk:gps-rfclk {
758 rockchip,pins = <GPS_RFCLK>;
759 rockchip,pull = <VALUE_PULL_DISABLE>;
760 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
761 rockchip,drive = <VALUE_DRV_DEFAULT>;
762 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
770 rockchip,pins = <VIRTUAL_PIN_FOR_AP0_VCC>;
771 rockchip,voltage = <VALUE_VOL_DEFAULT>;
775 rockchip,pins = <VIRTUAL_PIN_FOR_AP1_VCC>;
776 rockchip,voltage = <VALUE_VOL_DEFAULT>;
780 rockchip,pins = <VIRTUAL_PIN_FOR_CIF_VCC>;
781 rockchip,voltage = <VALUE_VOL_DEFAULT>;
784 flash_vcc:flash-vcc {
785 rockchip,pins = <VIRTUAL_PIN_FOR_FLASH_VCC>;
786 rockchip,voltage = <VALUE_VOL_DEFAULT>;
789 vccio0_vcc:vccio0-vcc {
790 rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO0_VCC>;
791 rockchip,voltage = <VALUE_VOL_DEFAULT>;
794 vccio1_vcc:vccio1-vcc {
795 rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO1_VCC>;
796 rockchip,voltage = <VALUE_VOL_DEFAULT>;
799 lcdc0_vcc:lcdc0-vcc {
800 rockchip,pins = <VIRTUAL_PIN_FOR_LCDC0_VCC>;
801 rockchip,voltage = <VALUE_VOL_DEFAULT>;
804 lcdc1_vcc:lcdc1-vcc {
805 rockchip,pins = <VIRTUAL_PIN_FOR_LCDC1_VCC>;
806 rockchip,voltage = <VALUE_VOL_DEFAULT>;
813 rockchip,pins = <MAC_CLK>;
814 rockchip,pull = <VALUE_PULL_DISABLE>;
815 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
816 rockchip,drive = <VALUE_DRV_DEFAULT>;
817 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
820 mac_txpins: mac-txpins {
821 rockchip,pins = <MAC_TXD0>, <MAC_TXD1>, <MAC_TXD2>, <MAC_TXD3>, <MAC_TXEN>, <MAC_TXCLK>;
822 rockchip,pull = <VALUE_PULL_DISABLE>;
823 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
824 rockchip,drive = <VALUE_DRV_DEFAULT>;
825 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
828 mac_rxpins: mac-rxpins {
829 rockchip,pins = <MAC_RXD0>, <MAC_RXD1>, <MAC_RXD2>, <MAC_RXD3>, <MAC_RXDV>, <MAC_RXER>, <MAC_RXCLK>, <MAC_CRS>, <MAC_COL>;
830 rockchip,pull = <VALUE_PULL_DISABLE>;
831 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
832 rockchip,drive = <VALUE_DRV_DEFAULT>;
833 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
836 mac_mdpins: mac-mdpins {
837 rockchip,pins = <MAC_MDIO>, <MAC_MDC>;
838 rockchip,pull = <VALUE_PULL_DISABLE>;
839 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
840 rockchip,drive = <VALUE_DRV_DEFAULT>;
841 //rockchip,tristate = <VALUE_TRI_DEFAULT>;