a4cd0f32990ecb47e71f749da3c43eb1421e4071
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / rk3288-chrome.dts
1 /dts-v1/;
2
3 #include "rk3288.dtsi"
4 #include "lcd-b101ew05.dtsi"
5 #include "linux_logo.dtsi"
6 / {
7         fiq-debugger {
8                 status = "okay";
9         };
10
11     wireless-wlan {
12         compatible = "wlan-platdata";
13
14         wifi_chip_type = "";
15         sdio_vref = <1800>; //1800mv or 3300mv
16
17         //power_ctrl_by_pmu;
18         pmu_regulator = "act_ldo3";
19         pmu_enable_level = <1>; //1->HIGH, 0->LOW
20
21         WIFI,poweren_gpio = <&gpio4 GPIO_D4 GPIO_ACTIVE_HIGH>;
22         WIFI,host_wake_irq = <&gpio4 GPIO_D6 GPIO_ACTIVE_HIGH>;
23         //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
24
25         status = "okay";
26     };
27
28     wireless-bluetooth {
29         compatible = "bluetooth-platdata";
30
31         uart_rts_gpios = <&gpio4 GPIO_C3 GPIO_ACTIVE_LOW>;
32         pinctrl-names = "default","rts_gpio";
33         pinctrl-0 = <&uart0_rts>;
34         pinctrl-1 = <&uart0_rts_gpio>;
35
36         BT,power_gpio = <&gpio4 GPIO_D3 GPIO_ACTIVE_HIGH>;
37         BT,reset_gpio = <&gpio4 GPIO_D5 GPIO_ACTIVE_HIGH>;
38         BT,wake_gpio = <&gpio4 GPIO_D2 GPIO_ACTIVE_HIGH>;
39         BT,wake_host_irq = <&gpio4 GPIO_D7 GPIO_ACTIVE_LOW>;
40
41         status = "okay";
42     };
43
44     hallsensor {
45                compatible = "hall_och165t";
46                type = <SENSOR_TYPE_HALL>;
47                irq-gpio = <&gpio0 GPIO_A6 IRQ_TYPE_EDGE_BOTH>;
48      };
49
50         backlight {
51                 compatible = "pwm-backlight";
52                 pwms = <&pwm0 0 25000>;
53                 brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255>;
54                 default-brightness-level = <128>;
55                 enable-gpios = <&gpio7 GPIO_A2 GPIO_ACTIVE_HIGH>;
56         };
57
58         pwm_regulator {
59                 compatible = "rockchip_pwm_regulator";
60                 pwms = <&pwm1 0 25000>;
61                 rockchip,pwm_id= <1>;
62                 rockchip,pwm_voltage_map= <925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>;
63                 rockchip,pwm_voltage= <1000000>;
64                 rockchip,pwm_min_voltage= <925000>;
65                 rockchip,pwm_max_voltage= <1400000>;
66                 rockchip,pwm_suspend_voltage= <950000>;
67                 rockchip,pwm_coefficient= <475>;
68                 regulators {
69                         #address-cells = <1>;
70                         #size-cells = <0>;
71                         pwm_reg0: regulator@0 {
72                                 regulator-compatible = "pwm_dcdc1";
73                                 regulator-name= "vdd_logic";
74                                 regulator-min-microvolt = <925000>;
75                                 regulator-max-microvolt = <1400000>;
76                                 regulator-always-on;
77                                 regulator-boot-on;
78                         };
79                 };
80         };
81
82         codec_hdmi_i2s: codec-hdmi-i2s {
83                 compatible = "hdmi-i2s";
84         };
85
86         codec_hdmi_spdif: codec-hdmi-spdif {
87                 compatible = "hdmi-spdif";
88         };
89
90         rockchip-hdmi-i2s {
91                 compatible = "rockchip-hdmi-i2s";
92                 dais {
93                         dai0 {
94                                 audio-codec = <&codec_hdmi_i2s>;
95                                 i2s-controller = <&i2s>;
96                                 format = "i2s";
97                                 //continuous-clock;
98                                 //bitclock-inversion;
99                                 //frame-inversion;
100                                 //bitclock-master;
101                                 //frame-master;
102                         };
103                 };
104         };
105         
106         rockchip-hdmi-spdif {
107                 compatible = "rockchip-hdmi-spdif";
108                 dais {
109                         dai0 {
110                                 audio-codec = <&codec_hdmi_spdif>;
111                                 i2s-controller = <&spdif>;
112                         };
113                 };
114         };
115
116         rockchip-rt5631 {
117                 compatible = "rockchip-rt5631";
118                 dais {
119                         dai0 {
120                                 audio-codec = <&rt5631>;
121                                 i2s-controller = <&i2s>;
122                                 format = "i2s";
123                                 //continuous-clock;
124                                 //bitclock-inversion;
125                                 //frame-inversion;
126                                 //bitclock-master;
127                                 //frame-master;
128                         };
129                 };
130         };
131
132         rockchip-rt3224 {
133                 compatible = "rockchip-rt3261";
134                 dais {
135                         dai0 {
136                                 audio-codec = <&rt3261>;
137                                 i2s-controller = <&i2s>;
138                                 format = "i2s";
139                                 //continuous-clock;
140                                 //bitclock-inversion;
141                                 //frame-inversion;
142                                 //bitclock-master;
143                                 //frame-master;
144                         };
145                         dai1 {
146                                 audio-codec = <&rt3261>;
147                                 i2s-controller = <&i2s>;
148                                 format = "dsp_a";
149                                 //continuous-clock;
150                                 bitclock-inversion;
151                                 //frame-inversion;
152                                 //bitclock-master;
153                                 //frame-master;
154                         };
155                 };
156         };
157
158 };
159
160 &gmac {
161 //      power_ctl_by = "gpio";  //"gpio" "pmu"
162         power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
163 //      power-pmu = "act_ldo"
164         reset-gpio = <&gpio4 GPIO_A7 GPIO_ACTIVE_LOW>;
165 };
166
167 &pinctrl {
168         gpio0_gpio {
169                         gpio0_c2: gpio0-c2 {
170                                 rockchip,pins = <GPIO0_C2>;
171                                 rockchip,pull = <VALUE_PULL_DOWN>;
172                         };
173
174                         //to add
175                 };
176                 
177         gpio7_gpio {
178                         gpio7_b7: gpio7-b7 {
179                                 rockchip,pins = <GPIO7_B7>;
180                                 rockchip,pull = <VALUE_PULL_UP>;
181                         };
182
183                         //to add
184                 };
185         //could add other pinctrl definition such as gpio
186
187 };
188
189 &emmc {
190                 clock-frequency = <200000000>;
191                 clock-freq-min-max = <400000 200000000>;
192         supports-highspeed;
193                 supports-emmc;
194                 bootpart-no-access;
195         ignore-pm-notify;
196                 keep-power-in-suspend;
197         status = "okay";
198 };
199     
200 &sdmmc {
201                 clock-frequency = <50000000>;
202                 lock-freq-min-max = <400000 50000000>;
203                 supports-highspeed;
204                 supports-sd;
205                 broken-cd;
206                 card-detect-delay = <200>;
207                 vmmc-supply = <&rk808_ldo5_reg>;
208                 status = "okay";
209 };
210                 
211 &sdio {
212                 clock-frequency = <50000000>;
213                 clock-freq-min-max = <200000 50000000>;
214                 supports-highspeed;
215                 supports-sdio;
216                 ignore-pm-notify;
217                 keep-power-in-suspend;
218                 //cap-sdio-irq;
219                 status = "okay";
220 };
221
222 &spi0 {
223         status = "okay";
224         max-freq = <48000000>;  
225         /*
226         spi_test@00 {
227                 compatible = "rockchip,spi_test_bus0_cs0";
228                 reg = <0>;
229                 spi-max-frequency = <24000000>;
230                 //spi-cpha;
231                 //spi-cpol;
232                 poll_mode = <0>;
233                 type = <0>;
234                 enable_dma = <0>;
235
236         };
237
238         spi_test@01 {
239                 compatible = "rockchip,spi_test_bus0_cs1";
240                 reg = <1>;
241                 spi-max-frequency = <24000000>;
242                 spi-cpha;
243                 spi-cpol;
244                 poll_mode = <0>;
245                 type = <0>;
246                 enable_dma = <0>;               
247         };
248         */
249 };
250
251 &spi1 {
252         status = "okay";
253         max-freq = <48000000>;
254         /*
255         spi_test@10 {
256                 compatible = "rockchip,spi_test_bus1_cs0";
257                 reg = <0>;
258                 spi-max-frequency = <24000000>;
259                 //spi-cpha;
260                 //spi-cpol;
261                 poll_mode = <0>;
262                 type = <0>;
263                 enable_dma = <0>;
264         };
265
266         */
267 };
268
269 &spi2 {
270         status = "okay";
271         max-freq = <48000000>;
272         /*
273         spi_test@20 {
274                 compatible = "rockchip,spi_test_bus2_cs0";
275                 reg = <0>;
276                 spi-max-frequency = <24000000>;
277                 //spi-cpha;
278                 //spi-cpol;
279                 poll_mode = <0>;
280                 type = <0>;
281                 enable_dma = <0>;
282         };
283
284         spi_test@21 {
285                 compatible = "rockchip,spi_test_bus2_cs1";
286                 reg = <1>;
287                 spi-max-frequency = <24000000>;
288                 //spi-cpha;
289                 //spi-cpol;
290                 poll_mode = <0>;
291                 type = <0>;
292                 enable_dma = <0>;
293         };
294         */
295 };
296
297 &uart_bt {
298         status = "okay";
299         dma-names = "!tx", "!rx";
300         pinctrl-0 = <&uart0_xfer &uart0_cts>;
301 };
302
303 &i2c0 {
304         status = "okay";
305         rk808: rk808@1b {
306                 reg = <0x1b>;
307                 status = "okay";
308         };
309         
310         bq24296: bq24296@6b {
311                 compatible = "ti,bq24296";
312                 reg = <0x6b>;
313                 gpios = <&gpio0 GPIO_A7 GPIO_ACTIVE_HIGH>,<&gpio0 GPIO_B0 GPIO_ACTIVE_HIGH>;
314                 bq24296,chg_current = <1000 2000 3000>;
315                 status = "okay";
316         };
317         bq27320: bq27320@55 {
318                 compatible = "ti,bq27320";
319                 reg = <0x55>;
320         /*   gpios = <&gpio0 GPIO_A7 GPIO_ACTIVE_HIGH>; */
321                 status = "okay";
322         };
323
324         CW2015@62 {
325                 compatible = "cw201x";
326                 reg = <0x62>;
327                 dc_det_gpio = <&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>;
328                 bat_low_gpio = <&gpio0 GPIO_A7 GPIO_ACTIVE_LOW>;
329                 chg_ok_gpio = <&gpio0 GPIO_B1 GPIO_ACTIVE_HIGH>;
330                 bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32
331                         0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52
332                         0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB
333                         0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>;
334                 is_dc_charge = <1>;
335                 is_usb_charge = <0>;
336         };
337 };
338
339 &i2c1 {
340         status = "okay";
341         rtc@51 {
342                 compatible = "nxp,pcf8563";
343                 reg = <0x51>;
344         };
345         
346         sensor@1d {
347                 compatible = "gs_mma8452";
348                 reg = <0x1d>;
349                 type = <SENSOR_TYPE_ACCEL>;
350                 irq-gpio = <&gpio8 GPIO_A0 IRQ_TYPE_EDGE_FALLING>;
351                 irq_enable = <1>;
352                 poll_delay_ms = <30>;
353                 layout = <1>;
354         };
355                 sensor@19 {
356                 compatible = "gs_lis3dh";
357                 reg = <0x19>;
358                 type = <SENSOR_TYPE_ACCEL>;
359                 irq-gpio = <&gpio0 GPIO_A0 IRQ_TYPE_LEVEL_LOW>;
360                 irq_enable = <1>;
361                 poll_delay_ms = <30>;
362                 layout = <1>;
363         };
364                 sensor@0d {
365                 compatible = "ak8963";
366                 reg = <0x0d>;
367                 type = <SENSOR_TYPE_COMPASS>;
368                 irq-gpio = <&gpio8 GPIO_A2 IRQ_TYPE_EDGE_RISING>;
369                 irq_enable = <1>;
370                 poll_delay_ms = <30>;
371                 layout = <1>;
372         };
373
374                 sensor@6b {
375                 compatible = "l3g20d_gyro";
376                 reg = <0x6b>;
377                 type = <SENSOR_TYPE_GYROSCOPE>;
378                 irq-gpio = <&gpio8 GPIO_A3 IRQ_TYPE_LEVEL_LOW>;
379                 irq_enable = <1>;
380                 poll_delay_ms = <30>;
381                 layout = <1>;
382         };
383         sensor@10 {
384               compatible = "ls_cm3218";
385               reg = <0x10>;
386               type = <SENSOR_TYPE_LIGHT>;
387               irq-gpio = <&gpio8 GPIO_A3 IRQ_TYPE_EDGE_FALLING>;              
388               irq_enable = <1>;
389               poll_delay_ms = <30>;
390               layout = <1>;
391        };
392         
393 };
394
395 &i2c2 {
396         status = "okay";
397         rt5631: rt5631@1a {
398                 compatible = "rt5631";
399                 reg = <0x1a>;
400         };
401         es8323: es8323@10 {
402                 compatible = "es8323";
403                 reg = <0x10>;
404         };
405         rt3261: rt3261@1c {
406                 compatible = "rt3261";
407                 reg = <0x1c>;
408         //      codec-en-gpio = <0>;//sdk default high level
409                 spk-num= <2>;
410                 modem-input-mode = <1>;
411                 lout-to-modem_mode = <1>;
412                 spk-amplify = <2>;
413                 playback-if1-data_control = <0>;
414                 playback-if2-data_control = <0>;
415         };
416         rt5616: rt5616@1b {
417                 compatible = "rt5616";
418                 reg = <0x1b>;
419         };
420 };
421
422 &i2c3 {
423         status = "okay";
424 };
425
426 &i2c4 {
427         status = "okay";
428         ts@55 {
429                 compatible = "goodix,gt8xx";
430                 reg = <0x55>;
431                 touch-gpio = <&gpio7 GPIO_A6 IRQ_TYPE_LEVEL_LOW>;
432                 reset-gpio = <&gpio7 GPIO_A5 GPIO_ACTIVE_LOW>;
433                 //power-gpio = <&gpio0 GPIO_C5 GPIO_ACTIVE_LOW>;
434                 max-x = <1280>;
435                 max-y = <800>;
436         };
437         
438         ts@01 {
439                 compatible = "ct,ct36x";
440                 reg = <0x01>;
441                 ct-model = <365>;
442                 touch-gpio = <&gpio7 GPIO_A6 IRQ_TYPE_LEVEL_LOW>;
443                 reset-gpio = <&gpio7 GPIO_A5 GPIO_ACTIVE_HIGH>;
444                 max-x = <1280>;
445                 max-y = <800>;
446                 orientation=<1 0 0 1>;
447         };
448 };
449
450 &i2c5 {
451         status = "disable";
452 };
453
454 &fb {
455         rockchip,disp-mode = <DUAL>;
456 };
457
458 &rk_screen {
459          display-timings = <&disp_timings>;
460 };
461
462 /*lcdc1 as PRMRY(LCD),lcdc0 as EXTEND(HDMI)*/
463 &lcdc1 {
464         status = "okay";
465         power_ctr: power_ctr {
466                 rockchip,debug = <0>;
467                 rockchip,mirror = <NO_MIRROR>;
468                 lcd_en:lcd_en {
469                         rockchip,power_type = <GPIO>;
470                         gpios = <&gpio7 GPIO_A3 GPIO_ACTIVE_HIGH>;
471                         rockchip,delay = <10>;
472                 };
473                 
474                 lcd_cs:lcd_cs {
475 rockchip,power_type = <GPIO>;
476                         gpios = <&gpio7 GPIO_A4 GPIO_ACTIVE_HIGH>;
477                         rockchip,delay = <10>;
478                 };
479
480                 /*lcd_rst:lcd_rst {
481                         rockchip,power_type = <GPIO>;
482                         gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
483                         rockchip,delay = <5>;
484                 };*/
485
486         };
487 };
488
489 &lcdc0 {
490         status = "okay";
491 };
492
493 &hdmi {
494         status = "okay";
495         rockchips,hdmi_audio_source = <0>;
496 };
497
498 &adc {
499         status = "okay";
500
501         rockchip_headset {
502                 compatible = "rockchip_headset";
503                 headset_gpio = <&gpio7 GPIO_C0 GPIO_ACTIVE_LOW>;
504                 pinctrl-names = "default";
505                 pinctrl-0 = <&gpio0_c2>;
506         //      io-channels = <&adc 2>; 
507        /*
508                hook_gpio = ;
509                hook_down_type = ; //interrupt hook key down status 
510                 */       
511        };
512
513         key {
514                 compatible = "rockchip,key";
515                 io-channels = <&adc 1>;
516
517                 vol-up-key {
518                         linux,code = <115>;
519                         label = "volume up";
520                         rockchip,adc_value = <1>;
521                 };
522
523                 vol-down-key {
524                         linux,code = <114>;
525                         label = "volume down";
526                         rockchip,adc_value = <170>;
527                 };
528
529                 power-key {
530                         gpios = <&gpio0 GPIO_A5 GPIO_ACTIVE_LOW>;
531                         linux,code = <116>;
532                         label = "power";
533                         gpio-key,wakeup;
534                 };
535
536                 menu-key {
537                         linux,code = <59>;
538                         label = "menu";
539                         rockchip,adc_value = <355>;
540                 };
541
542                 home-key {
543                         linux,code = <102>;
544                         label = "home";
545                         rockchip,adc_value = <746>;
546                 };
547
548                 back-key {
549                         linux,code = <158>;
550                         label = "back";
551                         rockchip,adc_value = <560>;
552                 };
553
554                 camera-key {
555                         linux,code = <212>;
556                         label = "camera";
557                         rockchip,adc_value = <450>;
558                 };
559         };
560 };
561
562 &pwm0 {
563         status = "okay";
564 };
565
566 &pwm1 {
567         status = "okay";
568 };
569
570
571 &clk_core_dvfs_table {
572         operating-points = <
573                 /* KHz    uV */
574         //      126000 1050000
575         //      216000 1050000
576         //      312000 1050000
577         //      408000 1050000
578         //      600000 1050000
579         //      696000 1050000
580                 816000 1050000
581                 1008000 1050000
582                 1200000 1100000
583                 1416000 1150000
584                 >;
585         status="okay";
586 };
587
588 &clk_gpu_dvfs_table {
589         operating-points = <
590                 /* KHz    uV */
591         //      100000 1100000
592         //      200000 1100000
593                 300000 1100000
594                 400000 1100000
595                 500000 1100000
596                 600000 1250000
597                 >;
598         status="okay";
599 };
600
601 &clk_ddr_dvfs_table {
602         operating-points = <
603                 /* KHz    uV */
604                 200000 950000
605                 300000 950000
606                 400000 1000000
607                 533000 1050000
608                 >;
609
610         freq_table = <
611                 /*status                freq(KHz)*/
612                 SYS_STATUS_NORMAL       400000
613                 SYS_STATUS_SUSPEND      200000
614                 SYS_STATUS_VIDEO        300000
615                 SYS_STATUS_DUALVIEW     500000
616                 >;
617         status="okay";
618 };
619
620 /include/ "rk808.dtsi"
621 &rk808 {
622         gpios =<&gpio0 GPIO_A4 GPIO_ACTIVE_HIGH>,<&gpio0 GPIO_B3 GPIO_ACTIVE_LOW>;
623         rk808,system-power-controller;
624
625         regulators {
626                 
627                 rk808_dcdc1_reg: regulator@0{
628                         regulator-name= "vdd_arm";
629                         regulator-always-on;
630                         regulator-boot-on;
631                 };
632
633                 rk808_dcdc2_reg: regulator@1 {
634                         regulator-name= "vdd_gpu";
635                         regulator-always-on;
636                         regulator-boot-on;
637                 };
638
639                 rk808_dcdc3_reg: regulator@2 {
640                         regulator-name= "rk_dcdc3";
641                         regulator-min-microvolt = <1200000>;
642                         regulator-max-microvolt = <1200000>;
643                         regulator-always-on;
644                         regulator-boot-on;
645                 };
646
647                 rk808_dcdc4_reg: regulator@3 {
648                         regulator-name= "vccio";
649                         regulator-min-microvolt = <1800000>;
650                         regulator-max-microvolt = <3300000>;
651                         regulator-always-on;
652                         regulator-boot-on;
653                 };
654
655                 rk808_ldo1_reg: regulator@4 {
656                         regulator-name= "rk_ldo1";
657                         regulator-min-microvolt = <3300000>;
658                         regulator-max-microvolt = <3300000>;
659                         regulator-always-on;
660                         regulator-boot-on;
661                 };
662
663                 rk808_ldo2_reg: regulator@5 {
664                         regulator-name= "rk_ldo2";
665                         regulator-min-microvolt = <3300000>;
666                         regulator-max-microvolt = <3300000>;
667                         regulator-always-on;
668                         regulator-boot-on;
669                 };
670
671                 rk808_ldo3_reg: regulator@6 {
672                         regulator-name= "rk_ldo3";
673                         regulator-min-microvolt = <1000000>;
674                         regulator-max-microvolt = <1000000>;
675                         regulator-always-on;
676                         regulator-boot-on;
677                 };
678
679                 rk808_ldo4_reg:regulator@7 {
680                         regulator-name= "rk_ldo4";
681                         regulator-min-microvolt = <1800000>;
682                         regulator-max-microvolt = <1800000>;
683                         regulator-always-on;
684                         regulator-boot-on;
685                 };
686
687                 rk808_ldo5_reg: regulator@8 {
688                         regulator-name= "vcc_sd";
689                         regulator-min-microvolt = <1800000>;
690                         regulator-max-microvolt = <3300000>;
691                         regulator-always-on;
692                         regulator-boot-on;
693                 };
694
695                 rk808_ldo6_reg: regulator@9 {
696                         regulator-name= "rk_ldo6";
697                         regulator-min-microvolt = <1000000>;
698                         regulator-max-microvolt = <1000000>;
699                         regulator-always-on;
700                         regulator-boot-on;
701                 };
702
703                 rk808_ldo7_reg: regulator@10 {
704                         regulator-name= "rk_ldo7";
705                         regulator-min-microvolt = <1800000>;
706                         regulator-max-microvolt = <1800000>;
707                         regulator-always-on;
708                         regulator-boot-on;
709                 };
710
711                 rk808_ldo8_reg: regulator@11 {
712                         regulator-name= "rk_ldo8";
713                         regulator-min-microvolt = <3300000>;
714                         regulator-max-microvolt = <3300000>;
715                         regulator-always-on;
716                         regulator-boot-on;
717                 };
718
719                 rk808_ldo9_reg: regulator@12 {
720                         regulator-name= "rk_ldo9";
721                         regulator-always-on;
722                         regulator-boot-on;
723                 };
724
725                 rk808_ldo10_reg: regulator@13 {
726                         regulator-name= "rk_ldo10";
727                         regulator-always-on;
728                         regulator-boot-on;
729                 };
730         };
731 };
732
733 &lcdc_vdd_domain {
734         regulator-name = "vcc30_lcd";
735         };
736 &dpio_vdd_domain{
737         regulator-name = "vcc18_cif";   
738         };
739 &flash0_vdd_domain{
740         regulator-name = "vcc_flash";   
741         };
742 &flash1_vdd_domain{
743         regulator-name = "vcc_flash";                   
744         };
745 &apio3_vdd_domain{
746         regulator-name = "vccio_wl";            
747         };
748 &apio5_vdd_domain{
749         regulator-name = "vccio";               
750         };
751 &apio4_vdd_domain{
752         regulator-name = "vccio";               
753         };
754 &apio1_vdd_domain{
755         regulator-name = "vccio";                       
756         };
757 &apio2_vdd_domain{
758         regulator-name = "vccio";               
759         };
760 &sdmmc0_vdd_domain{
761         regulator-name = "vcc_sd";                      
762         };
763