arm: dts: rk3288-evb: modify panel to edp_panel
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / rk3288-chrome.dts
1 /dts-v1/;
2
3 #include "rk3288.dtsi"
4 #include "lcd-b101ew05.dtsi"
5
6 / {
7         fiq-debugger {
8                 status = "okay";
9         };
10
11     wireless-wlan {
12         compatible = "wlan-platdata";
13
14         wifi_chip_type = "";
15         sdio_vref = <1800>; //1800mv or 3300mv
16
17         //power_ctrl_by_pmu;
18         pmu_regulator = "act_ldo3";
19         pmu_enable_level = <1>; //1->HIGH, 0->LOW
20
21         WIFI,poweren_gpio = <&gpio4 GPIO_D4 GPIO_ACTIVE_HIGH>;
22         WIFI,host_wake_irq = <&gpio4 GPIO_D6 GPIO_ACTIVE_HIGH>;
23         //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
24
25         status = "okay";
26     };
27
28     wireless-bluetooth {
29         compatible = "bluetooth-platdata";
30
31         uart_rts_gpios = <&gpio4 GPIO_C3 GPIO_ACTIVE_LOW>;
32         pinctrl-names = "default","rts_gpio";
33         pinctrl-0 = <&uart0_rts>;
34         pinctrl-1 = <&uart0_rts_gpio>;
35
36         BT,power_gpio = <&gpio4 GPIO_D3 GPIO_ACTIVE_HIGH>;
37         BT,reset_gpio = <&gpio4 GPIO_D5 GPIO_ACTIVE_HIGH>;
38         BT,wake_gpio = <&gpio4 GPIO_D2 GPIO_ACTIVE_HIGH>;
39         BT,wake_host_irq = <&gpio4 GPIO_D7 GPIO_ACTIVE_LOW>;
40
41         status = "okay";
42     };
43
44     hallsensor {
45                compatible = "hall_och165t";
46                type = <SENSOR_TYPE_HALL>;
47                irq-gpio = <&gpio0 GPIO_A6 IRQ_TYPE_EDGE_BOTH>;
48      };
49
50         backlight {
51                 compatible = "pwm-backlight";
52                 pwms = <&pwm0 0 25000>;
53                 brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255>;
54                 default-brightness-level = <128>;
55                 enable-gpios = <&gpio7 GPIO_A2 GPIO_ACTIVE_HIGH>;
56         };
57
58         pwm_regulator {
59                 compatible = "rockchip_pwm_regulator";
60                 pwms = <&pwm1 0 25000>;
61                 rockchip,pwm_id= <1>;
62                 rockchip,pwm_voltage_map= <925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>;
63                 rockchip,pwm_voltage= <1000000>;
64                 rockchip,pwm_min_voltage= <925000>;
65                 rockchip,pwm_max_voltage= <1400000>;
66                 rockchip,pwm_suspend_voltage= <950000>;
67                 rockchip,pwm_coefficient= <475>;
68                 regulators {
69                         #address-cells = <1>;
70                         #size-cells = <0>;
71                         pwm_reg0: regulator@0 {
72                                 regulator-compatible = "pwm_dcdc1";
73                                 regulator-name= "vdd_logic";
74                                 regulator-min-microvolt = <925000>;
75                                 regulator-max-microvolt = <1400000>;
76                                 regulator-always-on;
77                                 regulator-boot-on;
78                         };
79                 };
80         };
81
82         codec_hdmi_i2s: codec-hdmi-i2s {
83                 compatible = "hdmi-i2s";
84         };
85
86         codec_hdmi_spdif: codec-hdmi-spdif {
87                 compatible = "hdmi-spdif";
88         };
89
90         rockchip-hdmi-i2s {
91                 compatible = "rockchip-hdmi-i2s";
92                 dais {
93                         dai0 {
94                                 audio-codec = <&codec_hdmi_i2s>;
95                                 audio-controller = <&i2s>;
96                                 format = "i2s";
97                                 //continuous-clock;
98                                 //bitclock-inversion;
99                                 //frame-inversion;
100                                 //bitclock-master;
101                                 //frame-master;
102                         };
103                 };
104         };
105         
106         rockchip-hdmi-spdif {
107                 compatible = "rockchip-hdmi-spdif";
108                 dais {
109                         dai0 {
110                                 audio-codec = <&codec_hdmi_spdif>;
111                                 audio-controller = <&spdif>;
112                         };
113                 };
114         };
115
116         rockchip-rt5631 {
117                 compatible = "rockchip-rt5631";
118                 dais {
119                         dai0 {
120                                 audio-codec = <&rt5631>;
121                                 audio-controller = <&i2s>;
122                                 format = "i2s";
123                                 //continuous-clock;
124                                 //bitclock-inversion;
125                                 //frame-inversion;
126                                 //bitclock-master;
127                                 //frame-master;
128                         };
129                 };
130         };
131
132         rockchip-rt3224 {
133                 compatible = "rockchip-rt3261";
134                 dais {
135                         dai0 {
136                                 audio-codec = <&rt3261>;
137                                 audio-controller = <&i2s>;
138                                 format = "i2s";
139                                 //continuous-clock;
140                                 //bitclock-inversion;
141                                 //frame-inversion;
142                                 //bitclock-master;
143                                 //frame-master;
144                         };
145                         dai1 {
146                                 audio-codec = <&rt3261>;
147                                 audio-controller = <&i2s>;
148                                 format = "dsp_a";
149                                 //continuous-clock;
150                                 bitclock-inversion;
151                                 //frame-inversion;
152                                 //bitclock-master;
153                                 //frame-master;
154                         };
155                 };
156         };
157
158         usb_control {
159                 compatible = "rockchip,rk3288-usb-control";
160
161                 host_drv_gpio = <&gpio0 GPIO_B6 GPIO_ACTIVE_LOW>;
162                 otg_drv_gpio = <&gpio0 GPIO_B4 GPIO_ACTIVE_LOW>;
163
164                 rockchip,remote_wakeup;
165                 rockchip,usb_irq_wakeup;
166         };
167 };
168
169 &gmac {
170 //      power_ctl_by = "gpio";  //"gpio" "pmu"
171         power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
172 //      power-pmu = "act_ldo"
173         reset-gpio = <&gpio4 GPIO_A7 GPIO_ACTIVE_LOW>;
174 };
175
176 &pinctrl {
177         gpio0_gpio {
178                         gpio0_c2: gpio0-c2 {
179                                 rockchip,pins = <GPIO0_C2>;
180                                 rockchip,pull = <VALUE_PULL_DOWN>;
181                         };
182
183                         //to add
184                 };
185                 
186         gpio7_gpio {
187                         gpio7_b7: gpio7-b7 {
188                                 rockchip,pins = <GPIO7_B7>;
189                                 rockchip,pull = <VALUE_PULL_UP>;
190                         };
191
192                         //to add
193                 };
194         //could add other pinctrl definition such as gpio
195
196 };
197
198 &emmc {
199         clock-frequency = <150000000>;
200         clock-freq-min-max = <400000 150000000>;
201         supports-highspeed;
202         supports-emmc;
203         bootpart-no-access;
204
205         supports-DDR_MODE;
206         caps2-mmc-hs200;
207
208         ignore-pm-notify;
209                 keep-power-in-suspend;
210         status = "okay";
211 };
212     
213 &sdmmc {
214                 clock-frequency = <50000000>;
215                 lock-freq-min-max = <400000 50000000>;
216                 supports-highspeed;
217                 supports-sd;
218                 broken-cd;
219                 card-detect-delay = <200>;
220                 
221                 ignore-pm-notify;
222                 keep-power-in-suspend;
223                 
224                 vmmc-supply = <&rk808_ldo5_reg>;
225                 status = "okay";
226 };
227                 
228 &sdio {
229                 clock-frequency = <50000000>;
230                 clock-freq-min-max = <200000 50000000>;
231                 supports-highspeed;
232                 supports-sdio;
233                 ignore-pm-notify;
234                 keep-power-in-suspend;
235                 //cap-sdio-irq;
236                 status = "okay";
237 };
238
239 &spi0 {
240         status = "okay";
241         max-freq = <48000000>;  
242         /*
243         spi_test@00 {
244                 compatible = "rockchip,spi_test_bus0_cs0";
245                 reg = <0>;
246                 spi-max-frequency = <24000000>;
247                 //spi-cpha;
248                 //spi-cpol;
249                 poll_mode = <0>;
250                 type = <0>;
251                 enable_dma = <0>;
252
253         };
254
255         spi_test@01 {
256                 compatible = "rockchip,spi_test_bus0_cs1";
257                 reg = <1>;
258                 spi-max-frequency = <24000000>;
259                 spi-cpha;
260                 spi-cpol;
261                 poll_mode = <0>;
262                 type = <0>;
263                 enable_dma = <0>;               
264         };
265         */
266 };
267
268 &spi1 {
269         status = "okay";
270         max-freq = <48000000>;
271         /*
272         spi_test@10 {
273                 compatible = "rockchip,spi_test_bus1_cs0";
274                 reg = <0>;
275                 spi-max-frequency = <24000000>;
276                 //spi-cpha;
277                 //spi-cpol;
278                 poll_mode = <0>;
279                 type = <0>;
280                 enable_dma = <0>;
281         };
282
283         */
284 };
285
286 &spi2 {
287         status = "okay";
288         max-freq = <48000000>;
289         /*
290         spi_test@20 {
291                 compatible = "rockchip,spi_test_bus2_cs0";
292                 reg = <0>;
293                 spi-max-frequency = <24000000>;
294                 //spi-cpha;
295                 //spi-cpol;
296                 poll_mode = <0>;
297                 type = <0>;
298                 enable_dma = <0>;
299         };
300
301         spi_test@21 {
302                 compatible = "rockchip,spi_test_bus2_cs1";
303                 reg = <1>;
304                 spi-max-frequency = <24000000>;
305                 //spi-cpha;
306                 //spi-cpol;
307                 poll_mode = <0>;
308                 type = <0>;
309                 enable_dma = <0>;
310         };
311         */
312 };
313
314 &uart_bt {
315         status = "okay";
316         dma-names = "!tx", "!rx";
317         pinctrl-0 = <&uart0_xfer &uart0_cts>;
318 };
319
320 &i2c0 {
321         status = "okay";
322         rk808: rk808@1b {
323                 reg = <0x1b>;
324                 status = "okay";
325         };
326         
327         bq24296: bq24296@6b {
328                 compatible = "ti,bq24296";
329                 reg = <0x6b>;
330                 gpios = <&gpio0 GPIO_A7 GPIO_ACTIVE_HIGH>,<&gpio0 GPIO_B0 GPIO_ACTIVE_HIGH>;
331                 bq24296,chg_current = <1000 2000 3000>;
332                 status = "okay";
333         };
334         bq27320: bq27320@55 {
335                 compatible = "ti,bq27320";
336                 reg = <0x55>;
337         /*   gpios = <&gpio0 GPIO_A7 GPIO_ACTIVE_HIGH>; */
338                 status = "okay";
339         };
340
341         CW2015@62 {
342                 compatible = "cw201x";
343                 reg = <0x62>;
344                 dc_det_gpio = <&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>;
345                 bat_low_gpio = <&gpio0 GPIO_A7 GPIO_ACTIVE_LOW>;
346                 chg_ok_gpio = <&gpio0 GPIO_B1 GPIO_ACTIVE_HIGH>;
347                 bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32
348                         0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52
349                         0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB
350                         0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>;
351                 is_dc_charge = <1>;
352                 is_usb_charge = <0>;
353         };
354 };
355
356 &i2c1 {
357         status = "okay";
358         rtc@51 {
359                 compatible = "nxp,pcf8563";
360                 reg = <0x51>;
361         };
362         
363         sensor@1d {
364                 compatible = "gs_mma8452";
365                 reg = <0x1d>;
366                 type = <SENSOR_TYPE_ACCEL>;
367                 irq-gpio = <&gpio8 GPIO_A0 IRQ_TYPE_EDGE_FALLING>;
368                 irq_enable = <1>;
369                 poll_delay_ms = <30>;
370                 layout = <1>;
371         };
372                 sensor@19 {
373                 compatible = "gs_lis3dh";
374                 reg = <0x19>;
375                 type = <SENSOR_TYPE_ACCEL>;
376                 irq-gpio = <&gpio0 GPIO_A0 IRQ_TYPE_LEVEL_LOW>;
377                 irq_enable = <1>;
378                 poll_delay_ms = <30>;
379                 layout = <1>;
380         };
381                 sensor@0d {
382                 compatible = "ak8963";
383                 reg = <0x0d>;
384                 type = <SENSOR_TYPE_COMPASS>;
385                 irq-gpio = <&gpio8 GPIO_A2 IRQ_TYPE_EDGE_RISING>;
386                 irq_enable = <1>;
387                 poll_delay_ms = <30>;
388                 layout = <1>;
389         };
390
391                 sensor@6b {
392                 compatible = "l3g20d_gyro";
393                 reg = <0x6b>;
394                 type = <SENSOR_TYPE_GYROSCOPE>;
395                 irq-gpio = <&gpio8 GPIO_A3 IRQ_TYPE_LEVEL_LOW>;
396                 irq_enable = <1>;
397                 poll_delay_ms = <30>;
398                 layout = <1>;
399         };
400         sensor@10 {
401               compatible = "ls_cm3218";
402               reg = <0x10>;
403               type = <SENSOR_TYPE_LIGHT>;
404               irq-gpio = <&gpio8 GPIO_A3 IRQ_TYPE_EDGE_FALLING>;              
405               irq_enable = <1>;
406               poll_delay_ms = <30>;
407               layout = <1>;
408        };
409         
410 };
411
412 &i2c2 {
413         status = "okay";
414         rt5631: rt5631@1a {
415                 compatible = "rt5631";
416                 reg = <0x1a>;
417         };
418         es8323: es8323@10 {
419                 compatible = "es8323";
420                 reg = <0x10>;
421         };
422         rt3261: rt3261@1c {
423                 compatible = "rt3261";
424                 reg = <0x1c>;
425         //      codec-en-gpio = <0>;//sdk default high level
426                 spk-num= <2>;
427                 modem-input-mode = <1>;
428                 lout-to-modem_mode = <1>;
429                 spk-amplify = <2>;
430                 playback-if1-data_control = <0>;
431                 playback-if2-data_control = <0>;
432         };
433         rt5616: rt5616@1b {
434                 compatible = "rt5616";
435                 reg = <0x1b>;
436         };
437 };
438
439 &i2c3 {
440         status = "okay";
441 };
442
443 &i2c4 {
444         status = "okay";
445         ts@55 {
446                 compatible = "goodix,gt8xx";
447                 reg = <0x55>;
448                 touch-gpio = <&gpio7 GPIO_A6 IRQ_TYPE_LEVEL_LOW>;
449                 reset-gpio = <&gpio7 GPIO_A5 GPIO_ACTIVE_LOW>;
450                 //power-gpio = <&gpio0 GPIO_C5 GPIO_ACTIVE_LOW>;
451                 max-x = <1280>;
452                 max-y = <800>;
453         };
454         
455         ts@01 {
456                 compatible = "ct,ct36x";
457                 reg = <0x01>;
458                 ct-model = <365>;
459                 touch-gpio = <&gpio7 GPIO_A6 IRQ_TYPE_LEVEL_LOW>;
460                 reset-gpio = <&gpio7 GPIO_A5 GPIO_ACTIVE_HIGH>;
461                 max-x = <1280>;
462                 max-y = <800>;
463                 orientation=<1 0 0 1>;
464         };
465 };
466
467 &i2c5 {
468         status = "disable";
469 };
470
471 &fb {
472         rockchip,disp-mode = <DUAL>;
473 };
474
475 &rk_screen {
476          display-timings = <&disp_timings>;
477 };
478
479 /*lcdc0 as PRMRY(LCD),lcdc1 as EXTEND(HDMI)*/
480 &lcdc0 {
481         status = "okay";
482         rockchip,mirror = <NO_MIRROR>;
483         rockchip,cabc_mode = <0>;
484         rockchip,iommu-enabled = <0>;
485         power_ctr: power_ctr {
486                 rockchip,debug = <0>;
487                 lcd_en:lcd_en {
488                         rockchip,power_type = <GPIO>;
489                         gpios = <&gpio7 GPIO_A3 GPIO_ACTIVE_HIGH>;
490                         rockchip,delay = <10>;
491                 };
492                 
493                 lcd_cs:lcd_cs {
494                         rockchip,power_type = <GPIO>;
495                         gpios = <&gpio7 GPIO_A4 GPIO_ACTIVE_HIGH>;
496                         rockchip,delay = <10>;
497                 };
498
499                 /*lcd_rst:lcd_rst {
500                         rockchip,power_type = <GPIO>;
501                         gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
502                         rockchip,delay = <5>;
503                 };*/
504
505         };
506 };
507
508 &lcdc1 {
509         status = "okay";
510         rockchip,mirror = <NO_MIRROR>;
511         rockchip,iommu-enabled = <0>;
512 };
513
514 &hdmi {
515         status = "okay";
516         rockchips,hdmi_audio_source = <0>;
517 };
518
519 &adc {
520         status = "okay";
521
522         rockchip_headset {
523                 compatible = "rockchip_headset";
524                 headset_gpio = <&gpio7 GPIO_C0 GPIO_ACTIVE_LOW>;
525                 pinctrl-names = "default";
526                 pinctrl-0 = <&gpio0_c2>;
527         //      io-channels = <&adc 2>; 
528        /*
529                hook_gpio = ;
530                hook_down_type = ; //interrupt hook key down status 
531                 */       
532        };
533
534         key {
535                 compatible = "rockchip,key";
536                 io-channels = <&adc 1>;
537
538                 vol-up-key {
539                         linux,code = <115>;
540                         label = "volume up";
541                         rockchip,adc_value = <1>;
542                 };
543
544                 vol-down-key {
545                         linux,code = <114>;
546                         label = "volume down";
547                         rockchip,adc_value = <170>;
548                 };
549
550                 power-key {
551                         gpios = <&gpio0 GPIO_A5 GPIO_ACTIVE_LOW>;
552                         linux,code = <116>;
553                         label = "power";
554                         gpio-key,wakeup;
555                 };
556
557                 menu-key {
558                         linux,code = <59>;
559                         label = "menu";
560                         rockchip,adc_value = <355>;
561                 };
562
563                 home-key {
564                         linux,code = <102>;
565                         label = "home";
566                         rockchip,adc_value = <746>;
567                 };
568
569                 back-key {
570                         linux,code = <158>;
571                         label = "back";
572                         rockchip,adc_value = <560>;
573                 };
574
575                 camera-key {
576                         linux,code = <212>;
577                         label = "camera";
578                         rockchip,adc_value = <450>;
579                 };
580         };
581 };
582
583 &pwm0 {
584         status = "okay";
585 };
586
587 &pwm1 {
588         status = "okay";
589 };
590
591
592 &clk_core_dvfs_table {
593         operating-points = <
594                 /* KHz    uV */
595         //      126000 1050000
596         //      216000 1050000
597         //      312000 1050000
598         //      408000 1050000
599         //      600000 1050000
600         //      696000 1050000
601                 816000 1050000
602                 1008000 1050000
603                 1200000 1100000
604                 1416000 1150000
605                 >;
606         status="okay";
607 };
608
609 &clk_gpu_dvfs_table {
610         operating-points = <
611                 /* KHz    uV */
612         //      100000 1100000
613         //      200000 1100000
614                 300000 1100000
615                 400000 1100000
616                 500000 1100000
617                 600000 1250000
618                 >;
619         status="okay";
620 };
621
622 &clk_ddr_dvfs_table {
623         operating-points = <
624                 /* KHz    uV */
625                 200000 950000
626                 300000 950000
627                 400000 1000000
628                 533000 1050000
629                 >;
630
631         freq_table = <
632                 /*status                freq(KHz)*/
633                 SYS_STATUS_NORMAL       400000
634                 SYS_STATUS_SUSPEND      200000
635                 SYS_STATUS_VIDEO        300000
636                 SYS_STATUS_DUALVIEW     500000
637                 >;
638         status="okay";
639 };
640
641 /include/ "rk808.dtsi"
642 &rk808 {
643         gpios =<&gpio0 GPIO_A4 GPIO_ACTIVE_HIGH>,<&gpio0 GPIO_B3 GPIO_ACTIVE_LOW>;
644         rk808,system-power-controller;
645
646         regulators {
647                 
648                 rk808_dcdc1_reg: regulator@0{
649                         regulator-name= "vdd_arm";
650                         regulator-min-microvolt = <700000>;
651                         regulator-max-microvolt = <1500000>;
652                         regulator-always-on;
653                         regulator-boot-on;
654                         regulator-initial-mode = <0x2>;
655                         regulator-initial-state = <3>;
656                         regulator-state-mem {
657                                 regulator-state-mode = <0x2>;
658                                 regulator-state-disabled;
659                                 regulator-state-uv = <900000>;
660                         };
661                 };
662
663                 rk808_dcdc2_reg: regulator@1 {
664                         regulator-name= "vdd_gpu";
665                         regulator-min-microvolt = <700000>;
666                         regulator-max-microvolt = <1500000>;
667                         regulator-always-on;
668                         regulator-boot-on;
669                         regulator-initial-mode = <0x2>;
670                         regulator-initial-state = <3>;
671                         regulator-state-mem {
672                                 regulator-state-mode = <0x2>;
673                                 regulator-state-disabled;
674                                 regulator-state-uv = <900000>;
675                         };
676                 };
677
678                 rk808_dcdc3_reg: regulator@2 {
679                         regulator-name= "rk_dcdc3";
680                         regulator-min-microvolt = <1200000>;
681                         regulator-max-microvolt = <1200000>;
682                         regulator-always-on;
683                         regulator-boot-on;
684                         regulator-initial-mode = <0x2>;
685                         regulator-initial-state = <3>;
686                         regulator-state-mem {
687                                 regulator-state-mode = <0x2>;
688                                 regulator-state-enabled;
689                                 regulator-state-uv = <1200000>;
690                         };
691                 };
692
693                 rk808_dcdc4_reg: regulator@3 {
694                         regulator-name= "vccio";
695                         regulator-min-microvolt = <1800000>;
696                         regulator-max-microvolt = <3300000>;
697                         regulator-always-on;
698                         regulator-boot-on;
699                         regulator-initial-mode = <0x2>;
700                         regulator-initial-state = <3>;
701                         regulator-state-mem {
702                                 regulator-state-mode = <0x2>;
703                                 regulator-state-enabled;
704                                 regulator-state-uv = <2800000>;
705                         };
706                 };
707
708                 rk808_ldo1_reg: regulator@4 {
709                         regulator-name= "rk_ldo1";
710                         regulator-min-microvolt = <3300000>;
711                         regulator-max-microvolt = <3300000>;
712                         regulator-always-on;
713                         regulator-boot-on;
714                         regulator-initial-state = <3>;
715                         regulator-state-mem {
716                                 regulator-state-enabled;
717                                 regulator-state-uv = <3300000>;
718                         };
719                 };
720
721                 rk808_ldo2_reg: regulator@5 {
722                         regulator-name= "rk_ldo2";
723                         regulator-min-microvolt = <3300000>;
724                         regulator-max-microvolt = <3300000>;
725                         regulator-always-on;
726                         regulator-boot-on;
727                         regulator-initial-state = <3>;
728                         regulator-state-mem {
729                                 regulator-state-enabled;
730                                 regulator-state-uv = <3300000>;
731                         };
732                 };
733
734                 rk808_ldo3_reg: regulator@6 {
735                         regulator-name= "rk_ldo3";
736                         regulator-min-microvolt = <1000000>;
737                         regulator-max-microvolt = <1000000>;
738                         regulator-always-on;
739                         regulator-boot-on;
740                         regulator-initial-state = <3>;
741                         regulator-state-mem {
742                                 regulator-state-enabled;
743                                 regulator-state-uv = <1000000>;
744                         };
745                 };
746
747                 rk808_ldo4_reg:regulator@7 {
748                         regulator-name= "rk_ldo4";
749                         regulator-min-microvolt = <1800000>;
750                         regulator-max-microvolt = <1800000>;
751                         regulator-always-on;
752                         regulator-boot-on;
753                         regulator-initial-state = <3>;
754                         regulator-state-mem {
755                                 regulator-state-disabled;
756                                 regulator-state-uv = <1800000>;
757                         };
758                 };
759
760                 rk808_ldo5_reg: regulator@8 {
761                         regulator-name= "vcc_sd";
762                         regulator-min-microvolt = <1800000>;
763                         regulator-max-microvolt = <3300000>;
764                         regulator-always-on;
765                         regulator-boot-on;
766                         regulator-initial-state = <3>;
767                         regulator-state-mem {
768                                 regulator-state-enabled;
769                                 regulator-state-uv = <2800000>;
770                         };
771                 };
772
773                 rk808_ldo6_reg: regulator@9 {
774                         regulator-name= "rk_ldo6";
775                         regulator-min-microvolt = <1000000>;
776                         regulator-max-microvolt = <1000000>;
777                         regulator-always-on;
778                         regulator-boot-on;
779                         regulator-initial-state = <3>;
780                         regulator-state-mem {
781                                 regulator-state-disabled;
782                                 regulator-state-uv = <1000000>;
783                         };
784                 };
785
786                 rk808_ldo7_reg: regulator@10 {
787                         regulator-name= "rk_ldo7";
788                         regulator-min-microvolt = <1800000>;
789                         regulator-max-microvolt = <1800000>;
790                         regulator-always-on;
791                         regulator-boot-on;
792                         regulator-initial-state = <3>;
793                         regulator-state-mem {
794                                 regulator-state-enabled;
795                                 regulator-state-uv = <1800000>;
796                         };
797                 };
798
799                 rk808_ldo8_reg: regulator@11 {
800                         regulator-name= "rk_ldo8";
801                         regulator-min-microvolt = <3300000>;
802                         regulator-max-microvolt = <3300000>;
803                         regulator-always-on;
804                         regulator-boot-on;
805                         regulator-initial-state = <3>;
806                         regulator-state-mem {
807                                 regulator-state-enabled;
808                                 regulator-state-uv = <3300000>;
809                         };
810                 };
811
812                 rk808_ldo9_reg: regulator@12 {
813                         regulator-name= "rk_ldo9";
814                         regulator-always-on;
815                         regulator-boot-on;
816                         regulator-initial-state = <3>;
817                         regulator-state-mem {
818                                 regulator-state-enabled;
819                         };
820                 };
821
822                 rk808_ldo10_reg: regulator@13 {
823                         regulator-name= "rk_ldo10";
824                         regulator-always-on;
825                         regulator-boot-on;
826                         regulator-initial-state = <3>;
827                         regulator-state-mem {
828                                 regulator-state-disabled;
829                         };
830                 };
831         };
832 };
833
834 &lcdc_vdd_domain {
835         regulator-name = "vcc30_lcd";
836         };
837 &dpio_vdd_domain{
838         regulator-name = "vcc18_cif";   
839         };
840 &flash0_vdd_domain{
841         regulator-name = "vcc_flash";   
842         };
843 &flash1_vdd_domain{
844         regulator-name = "vcc_flash";                   
845         };
846 &apio3_vdd_domain{
847         regulator-name = "vccio_wl";            
848         };
849 &apio5_vdd_domain{
850         regulator-name = "vccio";               
851         };
852 &apio4_vdd_domain{
853         regulator-name = "vccio";               
854         };
855 &apio1_vdd_domain{
856         regulator-name = "vccio";                       
857         };
858 &apio2_vdd_domain{
859         regulator-name = "vccio";               
860         };
861 &sdmmc0_vdd_domain{
862         regulator-name = "vcc_sd";                      
863         };
864