1 #include <dt-bindings/interrupt-controller/arm-gic.h>
2 #include <dt-bindings/gpio/gpio.h>
3 #include <dt-bindings/pinctrl/rockchip.h>
4 #include <dt-bindings/pinctrl/rockchip-rk312x.h>
7 pinctrl: pinctrl@20008000 {
8 compatible = "rockchip,rk312x-pinctrl";
9 reg = <0x20008000 0xA8>,
13 reg-names = "base", "mux", "pull", "drv";
18 gpio0: gpio0@2007c000 {
19 compatible = "rockchip,gpio-bank";
20 reg = <0x2007c000 0x100>;
21 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
22 clocks = <&clk_gates8 9>;
28 #interrupt-cells = <2>;
31 gpio1: gpio1@20080000 {
32 compatible = "rockchip,gpio-bank";
33 reg = <0x20080000 0x100>;
34 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
35 clocks = <&clk_gates8 10>;
41 #interrupt-cells = <2>;
44 gpio2: gpio2@20084000 {
45 compatible = "rockchip,gpio-bank";
46 reg = <0x20084000 0x100>;
47 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
48 clocks = <&clk_gates8 11>;
54 #interrupt-cells = <2>;
57 gpio3: gpio3@20088000 {
58 compatible = "rockchip,gpio-bank";
59 reg = <0x20088000 0x100>;
60 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
61 clocks = <&clk_gates8 12>;
67 #interrupt-cells = <2>;
70 gpio15: gpio15@2008A000 {
71 compatible = "rockchip,gpio-bank";
72 reg = <0x20086000 0x100>;
73 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;//127 = 160-32-1
74 clocks = <&clk_gates8 12>;
80 #interrupt-cells = <2>;
83 pcfg_pull_up: pcfg_pull_up {
87 pcfg_pull_down: pcfg_pull_down {
91 pcfg_pull_none: pcfg_pull_none {
96 uart0_xfer: uart0-xfer {
97 rockchip,pins = <UART0_SIN>,
99 rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
104 uart0_cts: uart0-cts {
105 rockchip,pins = <UART0_CTSN>;
106 rockchip,pull = <VALUE_PULL_DEFAULT>;
111 uart0_rts: uart0-rts {
112 rockchip,pins = <UART0_RTSN>;
113 rockchip,pull = <VALUE_PULL_DEFAULT>;
118 uart0_rts_gpio: uart0-rts-gpio {
119 rockchip,pins = <FUNC_TO_GPIO(UART0_RTSN)>;
120 rockchip,pull = <VALUE_PULL_DEFAULT>;
126 uart1_xfer: uart1-xfer {
127 rockchip,pins = <UART1_SIN>,
129 rockchip,pull = <VALUE_PULL_DEFAULT>;
134 uart1_cts: uart1-cts {
135 rockchip,pins = <UART1_CTSN>;
136 rockchip,pull = <VALUE_PULL_DEFAULT>;
141 uart1_rts: uart1-rts {
142 rockchip,pins = <UART1_RTSN>;
143 rockchip,pull = <VALUE_PULL_DEFAULT>;
148 uart1_rts_gpio: uart1-rts-gpio {
149 rockchip,pins = <FUNC_TO_GPIO(UART1_RTSN)>;
150 rockchip,pull = <VALUE_PULL_DEFAULT>;
156 uart2_xfer: uart2-xfer {
157 rockchip,pins = <UART2_SIN>,
159 rockchip,pull = <VALUE_PULL_DEFAULT>;
164 uart2_cts: uart2-cts {
165 rockchip,pins = <UART2_CTSN>;
166 rockchip,pull = <VALUE_PULL_DEFAULT>;
171 uart2_rts: uart2-rts {
172 rockchip,pins = <UART2_RTSN>;
173 rockchip,pull = <VALUE_PULL_DEFAULT>;
178 uart2_rts_gpio: uart2-rts-gpio {
179 rockchip,pins = <FUNC_TO_GPIO(UART2_RTSN)>;
180 rockchip,pull = <VALUE_PULL_DEFAULT>;
188 rockchip,pins = <I2C0_SDA>;
189 rockchip,pull = <VALUE_PULL_DEFAULT>;
195 rockchip,pins = <I2C0_SCL>;
196 rockchip,pull = <VALUE_PULL_DEFAULT>;
201 i2c0_gpio: i2c0-gpio {
202 rockchip,pins = <FUNC_TO_GPIO(I2C0_SDA)>, <FUNC_TO_GPIO(I2C0_SCL)>;
203 rockchip,pull = <VALUE_PULL_DEFAULT>;
210 rockchip,pins = <I2C1_SDA>;
211 rockchip,pull = <VALUE_PULL_DEFAULT>;
217 rockchip,pins = <I2C1_SCL>;
218 rockchip,pull = <VALUE_PULL_DEFAULT>;
223 i2c1_gpio: i2c1-gpio {
224 rockchip,pins = <FUNC_TO_GPIO(I2C1_SDA)>, <FUNC_TO_GPIO(I2C1_SCL)>;
225 rockchip,pull = <VALUE_PULL_DEFAULT>;
232 rockchip,pins = <I2C2_SDA>;
233 rockchip,pull = <VALUE_PULL_DEFAULT>;
239 rockchip,pins = <I2C2_SCL>;
240 rockchip,pull = <VALUE_PULL_DEFAULT>;
245 i2c2_gpio: i2c2-gpio {
246 rockchip,pins = <FUNC_TO_GPIO(I2C2_SDA)>, <FUNC_TO_GPIO(I2C2_SCL)>;
247 rockchip,pull = <VALUE_PULL_DEFAULT>;
255 rockchip,pins = <I2C3_SDA>;
256 rockchip,pull = <VALUE_PULL_DEFAULT>;
262 rockchip,pins = <I2C3_SCL>;
263 rockchip,pull = <VALUE_PULL_DEFAULT>;
268 i2c3_gpio: i2c3-gpio {
269 rockchip,pins = <FUNC_TO_GPIO(I2C3_SDA)>, <FUNC_TO_GPIO(I2C3_SCL)>;
270 rockchip,pull = <VALUE_PULL_DEFAULT>;
278 spi0_txd_mux0:spi0-txd-mux0 {
279 rockchip,pins = <SPI0_TXD_MUX0>;
280 rockchip,pull = <VALUE_PULL_DEFAULT>;
284 spi0_rxd_mux0:spi0-rxd-mux0 {
285 rockchip,pins = <SPI0_RXD_MUX0>;
286 rockchip,pull = <VALUE_PULL_DEFAULT>;
290 spi0_clk_mux0:spi0-clk-mux0 {
291 rockchip,pins = <SPI0_CLK_MUX0>;
292 rockchip,pull = <VALUE_PULL_DEFAULT>;
296 spi0_cs0_mux0:spi0-cs0-mux0 {
297 rockchip,pins = <SPI0_CS0_MUX0>;
298 rockchip,pull = <VALUE_PULL_DEFAULT>;
302 spi0_cs1_mux0:spi0-cs1-mux0 {
303 rockchip,pins = <SPI0_CS1_MUX0>;
304 rockchip,pull = <VALUE_PULL_DEFAULT>;
310 spi0_txd_mux1:spi0-txd-mux1 {
311 rockchip,pins = <SPI0_TXD_MUX1>;
312 rockchip,pull = <VALUE_PULL_DEFAULT>;
316 spi0_rxd_mux1:spi0-rxd-mux1 {
317 rockchip,pins = <SPI0_RXD_MUX1>;
318 rockchip,pull = <VALUE_PULL_DEFAULT>;
322 spi0_clk_mux1:spi0-clk-mux1 {
323 rockchip,pins = <SPI0_CLK_MUX1>;
324 rockchip,pull = <VALUE_PULL_DEFAULT>;
328 spi0_cs0_mux1:spi0-cs0-mux1 {
329 rockchip,pins = <SPI0_CS0_MUX1>;
330 rockchip,pull = <VALUE_PULL_DEFAULT>;
334 spi0_cs1_mux1:spi0-cs1-mux1 {
335 rockchip,pins = <SPI0_CS1_MUX1>;
336 rockchip,pull = <VALUE_PULL_DEFAULT>;
342 spi0_txd_mux2:spi0-txd-mux2 {
343 rockchip,pins = <SPI0_TXD_MUX2>;
344 rockchip,pull = <VALUE_PULL_DEFAULT>;
348 spi0_rxd_mux2:spi0-rxd-mux2 {
349 rockchip,pins = <SPI0_RXD_MUX2>;
350 rockchip,pull = <VALUE_PULL_DEFAULT>;
354 spi0_clk_mux2:spi0-clk-mux2 {
355 rockchip,pins = <SPI0_CLK_MUX2>;
356 rockchip,pull = <VALUE_PULL_DEFAULT>;
360 spi0_cs0_mux2:spi0-cs0-mux2 {
361 rockchip,pins = <SPI0_CS0_MUX2>;
362 rockchip,pull = <VALUE_PULL_DEFAULT>;
370 rockchip,pins = <HDMI_CEC>;
371 rockchip,pull = <VALUE_PULL_DEFAULT>;
372 //rockchip,drive = <VALUE_DRV_DEFAULT>;
376 rockchip,pins = <HDMI_DSDA>;
377 rockchip,pull = <VALUE_PULL_DEFAULT>;
378 //rockchip,drive = <VALUE_DRV_DEFAULT>;
382 rockchip,pins = <HDMI_DSCL>;
383 rockchip,pull = <VALUE_PULL_DEFAULT>;
384 //rockchip,drive = <VALUE_DRV_DEFAULT>;
388 rockchip,pins = <HDMI_HPD>;
389 rockchip,pull = <VALUE_PULL_DEFAULT>;
390 //rockchip,drive = <VALUE_DRV_DEFAULT>;
394 hdmi_gpio: hdmi-gpio {
395 rockchip,pins = <FUNC_TO_GPIO(HDMI_CEC)>, <FUNC_TO_GPIO(HDMI_DSDA)>, <FUNC_TO_GPIO(HDMI_DSCL)>, <FUNC_TO_GPIO(HDMI_HPD)>;
396 rockchip,pull = <VALUE_PULL_DEFAULT>;
397 //rockchip,drive = <VALUE_DRV_DEFAULT>;
402 i2s0_mclk_mux0:i2s0-mclk-mux0 {
403 rockchip,pins = <I2S0_MCLK_MUX0>;
404 rockchip,pull = <VALUE_PULL_DEFAULT>;
408 i2s0_sclk_mux0:i2s0-sclk-mux0 {
409 rockchip,pins = <I2S0_SCLK_MUX0>;
410 rockchip,pull = <VALUE_PULL_DEFAULT>;
414 i2s0_lrckrx_mux0:i2s0-lrckrx-mux0 {
415 rockchip,pins = <I2S0_LRCKRX_MUX0>;
416 rockchip,pull = <VALUE_PULL_DEFAULT>;
420 i2s0_lrcktx_mux0:i2s0-lrcktx-mux0 {
421 rockchip,pins = <I2S0_LRCKTX_MUX0>;
422 rockchip,pull = <VALUE_PULL_DEFAULT>;
426 i2s0_sdo_mux0:i2s0-sdo-mux0 {
427 rockchip,pins = <I2S0_SDO_MUX0>;
428 rockchip,pull = <VALUE_PULL_DEFAULT>;
432 i2s0_sdi_mux0:i2s0-sdi-mux0 {
433 rockchip,pins = <I2S0_SDI_MUX0>;
434 rockchip,pull = <VALUE_PULL_DEFAULT>;
438 i2s0_gpio_mux0: i2s0-gpio-mux0 {
439 rockchip,pins = <FUNC_TO_GPIO(I2S0_MCLK_MUX0)>,
440 <FUNC_TO_GPIO(I2S0_SCLK_MUX0)>,
441 <FUNC_TO_GPIO(I2S0_LRCKRX_MUX0)>,
442 <FUNC_TO_GPIO(I2S0_LRCKTX_MUX0)>,
443 <FUNC_TO_GPIO(I2S0_SDO_MUX0)>,
444 <FUNC_TO_GPIO(I2S0_SDI_MUX0)>;
445 rockchip,pull = <VALUE_PULL_DEFAULT>;
450 i2s0_mclk_mux1:i2s0-mclk-mux1 {
451 rockchip,pins = <I2S0_MCLK_MUX1>;
452 rockchip,pull = <VALUE_PULL_DEFAULT>;
456 i2s0_sclk_mux1:i2s0-sclk-mux1 {
457 rockchip,pins = <I2S0_SCLK_MUX1>;
458 rockchip,pull = <VALUE_PULL_DEFAULT>;
462 i2s0_lrckrx_mux1:i2s0-lrckrx-mux1 {
463 rockchip,pins = <I2S0_LRCKRX_MUX1>;
464 rockchip,pull = <VALUE_PULL_DEFAULT>;
468 i2s0_lrcktx_mux1:i2s0-lrcktx-mux1 {
469 rockchip,pins = <I2S0_LRCKTX_MUX1>;
470 rockchip,pull = <VALUE_PULL_DEFAULT>;
474 i2s0_sdo_mux1:i2s0-sdo-mux1 {
475 rockchip,pins = <I2S0_SDO_MUX1>;
476 rockchip,pull = <VALUE_PULL_DEFAULT>;
480 i2s0_sdi_mux1:i2s0-sdi-mux1 {
481 rockchip,pins = <I2S0_SDI_MUX1>;
482 rockchip,pull = <VALUE_PULL_DEFAULT>;
486 i2s0_gpio_mux1: i2s0-gpio-mux1 {
487 rockchip,pins = <FUNC_TO_GPIO(I2S0_MCLK_MUX1)>,
488 <FUNC_TO_GPIO(I2S0_SCLK_MUX1)>,
489 <FUNC_TO_GPIO(I2S0_LRCKRX_MUX1)>,
490 <FUNC_TO_GPIO(I2S0_LRCKTX_MUX1)>,
491 <FUNC_TO_GPIO(I2S0_SDO_MUX1)>,
492 <FUNC_TO_GPIO(I2S0_SDI_MUX1)>;
493 rockchip,pull = <VALUE_PULL_DEFAULT>;
501 rockchip,pins = <SPDIF_TX>;
502 rockchip,pull = <VALUE_PULL_DEFAULT>;
508 emmc0_clk: emmc0-clk {
509 rockchip,pins = <EMMC_CLKOUT>;
510 rockchip,pull = <VALUE_PULL_DEFAULT>;
515 emmc0_cmd_mux0: emmc0-cmd-mux0 {
516 rockchip,pins = <EMMC_CMD_MUX0>;
517 rockchip,pull = <VALUE_PULL_UP>;
522 emmc0_cmd_mux1: emmc0-cmd-mux1 {
523 rockchip,pins = <EMMC_CMD_MUX1>;
524 rockchip,pull = <VALUE_PULL_UP>;
530 emmc0_bus1: emmc0-bus-width1 {
531 rockchip,pins = <EMMC_D0>;
532 rockchip,pull = <VALUE_PULL_UP>;
537 emmc0_bus4: emmc0-bus-width4 {
538 rockchip,pins = <EMMC_D0>,
542 rockchip,pull = <VALUE_PULL_UP>;
549 sdmmc0_clk: sdmmc0-clk {
550 rockchip,pins = <MMC0_CLKOUT>;
551 rockchip,pull = <VALUE_PULL_DEFAULT>;
556 sdmmc0_cmd: sdmmc0-cmd {
557 rockchip,pins = <MMC0_CMD>;
558 rockchip,pull = <VALUE_PULL_UP>;
562 sdmmc0_dectn: sdmmc0-dectn{
563 rockchip,pins = <MMC0_DETN>;
564 rockchip,pull = <VALUE_PULL_UP>;
569 sdmmc0_pwren: sdmmc0-pwren{
570 rockchip,pins = <MMC0_PWREN>;
571 rockchip,pull = <VALUE_PULL_UP>;
574 sdmmc0_bus1: sdmmc0-bus-width1 {
575 rockchip,pins = <MMC0_D0>;
576 rockchip,pull = <VALUE_PULL_UP>;
581 sdmmc0_bus4: sdmmc0-bus-width4 {
582 rockchip,pins = <MMC0_D0>,
586 rockchip,pull = <VALUE_PULL_UP>;
591 sdmmc0_gpio: sdmmc0_gpio{
601 rockchip,pull = <VALUE_PULL_UP>;
609 nandc_ale:nandc-ale {
610 rockchip,pins = <NAND_ALE>;
611 rockchip,pull = <VALUE_PULL_DEFAULT>;
614 nandc_cle:nandc-cle {
615 rockchip,pins = <NAND_CLE>;
616 rockchip,pull = <VALUE_PULL_DEFAULT>;
619 nandc_wrn:nandc-wrn {
620 rockchip,pins = <NAND_WRN>;
621 rockchip,pull = <VALUE_PULL_DEFAULT>;
624 nandc_rdn:nandc-rdn {
625 rockchip,pins = <NAND_RDN>;
626 rockchip,pull = <VALUE_PULL_DEFAULT>;
629 nandc_rdy:nandc-rdy {
630 rockchip,pins = <NAND_RDY>;
631 rockchip,pull = <VALUE_PULL_DEFAULT>;
634 nandc_cs0:nandc-cs0 {
635 rockchip,pins = <NAND_CS0>;
636 rockchip,pull = <VALUE_PULL_DEFAULT>;
640 nandc_data: nandc-data {
641 rockchip,pins = <NAND_D0>,
649 rockchip,pull = <VALUE_PULL_DEFAULT>;
656 sdio0_pwren: sdio0_pwren {
657 rockchip,pins = <MMC1_PWREN>;
658 rockchip,pull = <VALUE_PULL_DEFAULT>;
663 sdio0_cmd: sdio0_cmd {
664 rockchip,pins = <MMC1_CMD>;
665 rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
667 sdio0_clk: sdio0_clk {
668 rockchip,pins = <SDMMC_CLKOUT>;
669 rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
671 sdio0_bus1: sdio0-bus-width1 {
672 rockchip,pins = <SDMMC_DATA0>;
673 rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
675 sdio0_bus4: sdio0-bus-width4 {
676 rockchip,pins = <SDMMC_DATA0>,
680 rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
683 sdio0_gpio: sdio0_gpio{
684 rockchip,pins = <GPIO0_D6>, //pwren
691 rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
698 rockchip,pins = <PWM0>;
699 rockchip,pull = <VALUE_PULL_DEFAULT>;
705 rockchip,pins = <PWM1>;
706 rockchip,pull = <VALUE_PULL_DEFAULT>;
712 rockchip,pins = <PWM2>;
713 rockchip,pull = <VALUE_PULL_DEFAULT>;
719 rockchip,pins = <PWM_IRIN>;
720 rockchip,pull = <VALUE_PULL_DEFAULT>;
727 gmac_rxdv:gmac-rxdv {
728 rockchip,pins = <GMAC_RXDV>;
729 rockchip,pull = <VALUE_PULL_DEFAULT>;
732 gmac_txclk:gmac-txclk {
733 rockchip,pins = <GMAC_TXCLK>;
734 rockchip,pull = <VALUE_PULL_DEFAULT>;
738 rockchip,pins = <GMAC_CRS>;
739 rockchip,pull = <VALUE_PULL_DEFAULT>;
742 gmac_rxclk:gmac-rxclk {
743 rockchip,pins = <GMAC_RXCLK>;
744 rockchip,pull = <VALUE_PULL_DEFAULT>;
747 gmac_mdio:gmac-mdio {
748 rockchip,pins = <GMAC_MDIO>;
749 rockchip,pull = <VALUE_PULL_DEFAULT>;
752 gmac_txen:gmac-txen {
753 rockchip,pins = <GMAC_TXEN>;
754 rockchip,pull = <VALUE_PULL_DEFAULT>;
758 rockchip,pins = <GMAC_CLK>;
759 rockchip,pull = <VALUE_PULL_DEFAULT>;
761 gmac_rxer:gmac-rxer {
762 rockchip,pins = <GMAC_RXER>;
763 rockchip,pull = <VALUE_PULL_DEFAULT>;
766 gmac_rxd1:gmac-rxd1 {
767 rockchip,pins = <GMAC_RXD1>;
768 rockchip,pull = <VALUE_PULL_DEFAULT>;
771 gmac_rxd0:gmac-rxd0 {
772 rockchip,pins = <GMAC_RXD0>;
773 rockchip,pull = <VALUE_PULL_DEFAULT>;
776 gmac_txd1:gmac-txd1 {
777 rockchip,pins = <GMAC_TXD1>;
778 rockchip,pull = <VALUE_PULL_DEFAULT>;
781 gmac_txd0:gmac-txd0 {
782 rockchip,pins = <GMAC_TXD0>;
783 rockchip,pull = <VALUE_PULL_DEFAULT>;
785 gmac_rxd3:gmac-rxd3 {
786 rockchip,pins = <GMAC_RXD3>;
787 rockchip,pull = <VALUE_PULL_DEFAULT>;
790 gmac_rxd2:gmac-rxd2 {
791 rockchip,pins = <GMAC_RXD2>;
792 rockchip,pull = <VALUE_PULL_DEFAULT>;
795 gmac_txd2:gmac-txd2 {
796 rockchip,pins = <GMAC_TXD2>;
797 rockchip,pull = <VALUE_PULL_DEFAULT>;
800 gmac_txd3:gmac-txd3 {
801 rockchip,pins = <GMAC_TXD3>;
802 rockchip,pull = <VALUE_PULL_DEFAULT>;
806 rockchip,pins = <GMAC_COL>;
807 rockchip,pull = <VALUE_PULL_DEFAULT>;
810 gmac_col_gpio:gmac-col-gpio {
811 rockchip,pins = <GPIO2_D0>;
812 rockchip,pull = <VALUE_PULL_DEFAULT>;
816 rockchip,pins = <GMAC_MDC>;
817 rockchip,pull = <VALUE_PULL_DEFAULT>;
824 lcdc0_lcdc:lcdc0-lcdc {
830 rockchip,pull = <VALUE_PULL_DISABLE>;
833 lcdc0_gpio:lcdc0-gpio {
835 <FUNC_TO_GPIO(LCDC0_DCLK)>,
836 <FUNC_TO_GPIO(LCDC0_DEN)>,
837 <FUNC_TO_GPIO(LCDC0_HSYNC)>,
838 <FUNC_TO_GPIO(LCDC0_VSYNC)>;
839 rockchip,pull = <VALUE_PULL_DISABLE>;
845 lcdc0_lcdc_d: lcdc0-lcdc_d {
863 rockchip,pull = <VALUE_PULL_DISABLE>;
866 lcdc0_lcdc_gpio: lcdc0-lcdc_gpio {
868 <FUNC_TO_GPIO(LCDC0_D10)>,
869 <FUNC_TO_GPIO(LCDC0_D11)>,
870 <FUNC_TO_GPIO(LCDC0_D12)>,
871 <FUNC_TO_GPIO(LCDC0_D13)>,
872 <FUNC_TO_GPIO(LCDC0_D14)>,
873 <FUNC_TO_GPIO(LCDC0_D15)>,
874 <FUNC_TO_GPIO(LCDC0_D16)>,
875 <FUNC_TO_GPIO(LCDC0_D17)>;
877 <FUNC_TO_GPIO(LCDC0_D18)>,
878 <FUNC_TO_GPIO(LCDC0_D19)>,
879 <FUNC_TO_GPIO(LCDC0_D20)>,
880 <FUNC_TO_GPIO(LCDC0_D21)>,
881 <FUNC_TO_GPIO(LCDC0_D22)>,
882 <FUNC_TO_GPIO(LCDC0_D23)>;
884 rockchip,pull = <VALUE_PULL_DOWN>;