Merge branch 'linux-linaro-lsk-v4.4-android' of git://git.linaro.org/kernel/linux...
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / rk3036-pinctrl.dtsi
1 #include <dt-bindings/interrupt-controller/arm-gic.h>
2 #include <dt-bindings/gpio/gpio.h>
3 #include <dt-bindings/pinctrl/rockchip.h>
4 #include <dt-bindings/pinctrl/rockchip-rk3036.h>
5
6 / {
7         pinctrl: pinctrl@20008000 {
8                 compatible = "rockchip,rk3036-pinctrl";
9                 reg = <0x20008000 0xA8>,
10                       <0x200080A8 0x30>,
11                       <0x20008118 0x18>,
12                       <0x20008100 0x04>;
13                 reg-names = "base", "mux", "pull", "drv";
14                 #address-cells = <1>;
15                 #size-cells = <1>;
16                 ranges;
17
18                 gpio0: gpio0@2007c000 {
19                         compatible = "rockchip,gpio-bank";
20                         reg = <0x2007c000 0x100>;
21                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
22                         clocks = <&clk_gates8 9>;
23
24                         gpio-controller;
25                         #gpio-cells = <2>;
26
27                         interrupt-controller;
28                         #interrupt-cells = <2>;
29                 };
30
31                 gpio1: gpio1@20080000 {
32                         compatible = "rockchip,gpio-bank";
33                         reg = <0x20080000 0x100>;
34                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
35                         clocks = <&clk_gates8 10>;
36
37                         gpio-controller;
38                         #gpio-cells = <2>;
39
40                         interrupt-controller;
41                         #interrupt-cells = <2>;
42                 };
43
44                 gpio2: gpio2@20084000 {
45                         compatible = "rockchip,gpio-bank";
46                         reg = <0x20084000 0x100>;
47                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
48                         clocks = <&clk_gates8 11>;
49
50                         gpio-controller;
51                         #gpio-cells = <2>;
52
53                         interrupt-controller;
54                         #interrupt-cells = <2>;
55                 };
56
57                 gpio15: gpio15@20086000 {
58                         compatible = "rockchip,gpio-bank";
59                         reg = <0x20086000 0x100>;
60                         interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;//127 = 160-32-1
61                         clocks = <&clk_gates8 12>;
62
63                         gpio-controller;
64                         #gpio-cells = <2>;
65
66                         interrupt-controller;
67                         #interrupt-cells = <2>;
68                 };
69
70                 pcfg_pull_up: pcfg_pull_up {
71                         bias-pull-up;
72                 };
73
74                 pcfg_pull_down: pcfg_pull_down {
75                         bias-pull-down;
76                 };
77
78                 pcfg_pull_none: pcfg_pull_none {
79                         bias-disable;
80                 };
81
82                 gpio0_uart0 {
83                         uart0_xfer: uart0-xfer {
84                                 rockchip,pins = <UART0_SIN>,
85                                                 <UART0_SOUT>;
86                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
87
88
89                         };
90
91                         uart0_cts: uart0-cts {
92                                 rockchip,pins = <UART0_CTSN>;
93                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
94
95
96                         };
97
98                         uart0_rts: uart0-rts {
99                                 rockchip,pins = <UART0_RTSN>;
100                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
101
102
103                         };
104
105                         uart0_rts_gpio: uart0-rts-gpio {
106                                 rockchip,pins = <FUNC_TO_GPIO(UART0_RTSN)>;
107                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
108
109                         };
110                 };
111
112                 gpio1_uart1 {
113                         uart1_xfer: uart1-xfer {
114                                 rockchip,pins = <UART1_SIN>,
115                                                 <UART1_SOUT>;
116                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
117
118
119                         };
120
121                 };
122
123                 gpio1_uart2 {
124                         uart2_xfer: uart2-xfer {
125                                 rockchip,pins = <UART2_SIN>,
126                                                 <UART2_SOUT>;
127                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
128
129
130                         };
131                         /* no rts / cts for uart2 */
132                 };
133
134
135                 gpio0_i2c0 {
136                         i2c0_sda:i2c0-sda {
137                                 rockchip,pins = <I2C0_SDA>;
138                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
139
140
141                         };
142
143                         i2c0_scl:i2c0-scl {
144                                 rockchip,pins = <I2C0_SCL>;
145                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
146
147
148                         };
149
150                         i2c0_gpio: i2c0-gpio {
151                                 rockchip,pins = <FUNC_TO_GPIO(I2C0_SDA)>, <FUNC_TO_GPIO(I2C0_SCL)>;
152                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
153
154                         };
155                 };
156
157                 gpio0_i2c1 {
158                         i2c1_sda:i2c1-sda {
159                                 rockchip,pins = <I2C1_SDA>;
160                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
161
162
163                         };
164
165                         i2c1_scl:i2c1-scl {
166                                 rockchip,pins = <I2C1_SCL>;
167                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
168
169
170                         };
171
172                         i2c1_gpio: i2c1-gpio {
173                                 rockchip,pins = <FUNC_TO_GPIO(I2C1_SDA)>, <FUNC_TO_GPIO(I2C1_SCL)>;
174                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
175
176                         };
177                 };
178
179                 gpio2_i2c2 {
180                         i2c2_sda:i2c2-sda {
181                                 rockchip,pins = <I2C2_SDA>;
182                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
183
184
185                         };
186
187                         i2c2_scl:i2c2-scl {
188                                 rockchip,pins = <I2C2_SCL>;
189                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
190
191
192                         };
193
194                         i2c2_gpio: i2c2-gpio {
195                                 rockchip,pins = <FUNC_TO_GPIO(I2C2_SDA)>, <FUNC_TO_GPIO(I2C2_SCL)>;
196                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
197
198                         };
199                 };
200
201                 gpio1_spi0 {
202                         spi0_txd:spi0-txd {
203                                 rockchip,pins = <SPI0_TXD>;
204                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
205
206
207                         };
208
209                         spi0_rxd:spi0-rxd {
210                                 rockchip,pins = <SPI0_RXD>;
211                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
212
213
214                         };
215
216                         spi0_clk:spi0-clk {
217                                 rockchip,pins = <SPI0_CLK>;
218                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
219
220
221                         };
222
223                         spi0_cs0:spi0-cs0 {
224                                 rockchip,pins = <SPI0_CS0>;
225                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
226
227
228                         };
229
230                         spi0_cs1:spi0-cs1 {
231                                 rockchip,pins = <SPI0_CS1>;
232                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
233
234
235                         };
236
237                 };
238
239                 gpio1_hdmi {
240                         hdmi_cec:hdmi-cec {
241                                 rockchip,pins = <HDMI_CEC>;
242                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
243                                 //rockchip,drive = <VALUE_DRV_DEFAULT>;
244                         };
245
246                         hdmi_sda:hdmi-sda {
247                                 rockchip,pins = <HDMI_SDA>;
248                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
249                                 //rockchip,drive = <VALUE_DRV_DEFAULT>;
250                         };
251
252                         hdmi_scl:hdmi-scl {
253                                 rockchip,pins = <HDMI_SCL>;
254                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
255                                 //rockchip,drive = <VALUE_DRV_DEFAULT>;
256                         };
257
258                         hdmi_hpd:hdmi-hpd {
259                                 rockchip,pins = <HDMI_HPD>;
260                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
261                                 //rockchip,drive = <VALUE_DRV_DEFAULT>;
262
263                         };
264
265                         hdmi_gpio: hdmi-gpio {
266                                 rockchip,pins = <FUNC_TO_GPIO(HDMI_CEC)>, <FUNC_TO_GPIO(HDMI_SDA)>, <FUNC_TO_GPIO(HDMI_SCL)>, <FUNC_TO_GPIO(HDMI_HPD)>;
267                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
268                                 //rockchip,drive = <VALUE_DRV_DEFAULT>;
269                         };
270                 };
271
272                 gpio1_i2s0 {
273                         i2s0_mclk:i2s0-mclk {
274                                 rockchip,pins = <I2S0_MCLK>;
275                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
276
277                         };
278
279                         i2s0_sclk:i2s0-sclk {
280                                 rockchip,pins = <I2S0_SCLK>;
281                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
282
283                         };
284
285                         i2s0_lrckrx:i2s0-lrckrx {
286                                 rockchip,pins = <I2S0_LRCKRX>;
287                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
288
289                         };
290
291                         i2s0_lrcktx:i2s0-lrcktx {
292                                 rockchip,pins = <I2S0_LRCKTX>;
293                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
294
295                         };
296
297                         i2s0_sdo:i2s0-sdo {
298                                 rockchip,pins = <I2S0_SDO>;
299                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
300
301                         };
302
303                         i2s0_sdi:i2s0-sdi {
304                                 rockchip,pins = <I2S0_SDI>;
305                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
306
307                         };
308
309                         i2s0_gpio: i2s0-gpio {
310                                 rockchip,pins = <FUNC_TO_GPIO(I2S0_MCLK)>,
311                                                 <FUNC_TO_GPIO(I2S0_SCLK)>,
312                                                 <FUNC_TO_GPIO(I2S0_LRCKRX)>,
313                                                 <FUNC_TO_GPIO(I2S0_LRCKTX)>,
314                                                 <FUNC_TO_GPIO(I2S0_SDO)>,
315                                                 <FUNC_TO_GPIO(I2S0_SDI)>;
316                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
317
318                         };
319                 };
320
321                 gpio0_spdif {
322                         spdif_tx: spdif-tx {
323                                 rockchip,pins = <SPDIF_TX>;
324                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
325
326                         };
327                 };
328
329                 gpio1_emmc0 {
330                         emmc0_clk: emmc0-clk {
331                                 rockchip,pins = <EMMC_CLKOUT>;
332                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
333
334
335                         };
336
337                         emmc0_cmd: emmc0-cmd {
338                                 rockchip,pins = <EMMC_CMD>;
339                                 rockchip,pull = <VALUE_PULL_UP>;
340
341
342                         };
343
344
345                         emmc0_bus1: emmc0-bus-width1 {
346                                 rockchip,pins = <EMMC_D0>;
347                                 rockchip,pull = <VALUE_PULL_UP>;
348
349
350                         };
351
352                         emmc0_bus4: emmc0-bus-width4 {
353                                 rockchip,pins = <EMMC_D0>,
354                                                 <EMMC_D1>,
355                                                 <EMMC_D2 >,
356                                                 <EMMC_D3>;
357                                 rockchip,pull = <VALUE_PULL_UP>;
358
359
360                         };
361                 };
362
363                 gpio1_sdmmc0 {
364                         sdmmc0_clk: sdmmc0-clk {
365                                 rockchip,pins = <MMC0_CLKOUT>;
366                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
367
368
369                         };
370
371                         sdmmc0_cmd: sdmmc0-cmd {
372                                 rockchip,pins = <MMC0_CMD>;
373                                 rockchip,pull = <VALUE_PULL_UP>;
374
375                         };
376
377                         sdmmc0_dectn: sdmmc0-dectn{
378                                 rockchip,pins = <MMC0_DETN>;
379                                 rockchip,pull = <VALUE_PULL_UP>;
380
381
382                         };
383
384
385                         sdmmc0_bus1: sdmmc0-bus-width1 {
386                                 rockchip,pins = <MMC0_D0>;
387                                 rockchip,pull = <VALUE_PULL_UP>;
388
389
390                         };
391
392                         sdmmc0_bus4: sdmmc0-bus-width4 {
393                                 rockchip,pins = <MMC0_D0>,
394                                                 <MMC0_D1>,
395                                                 <MMC0_D2>,
396                                                 <MMC0_D3>;
397                                 rockchip,pull = <VALUE_PULL_UP>;
398
399
400                         };
401
402                         sdmmc0_gpio: sdmmc0_gpio{
403                                 rockchip,pins =
404                                         <GPIO1_B7>,  //CMD
405                                         <GPIO1_C0>,  //CLK
406                                         <GPIO1_C1>,  //DET
407                                         <GPIO1_C2>,  //D0
408                                         <GPIO1_C3>,  //D1
409                                         <GPIO1_C4>,  //D2
410                                         <GPIO1_C5>;  //D3
411                                 rockchip,pull = <VALUE_PULL_UP>;
412
413
414                         };
415
416                 };
417
418                 gpio1_nandc {
419                         nandc_ale:nandc-ale {
420                                 rockchip,pins = <NAND_ALE>;
421                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
422                         };
423
424                         nandc_cle:nandc-cle {
425                                 rockchip,pins = <NAND_CLE>;
426                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
427                         };
428
429                         nandc_wrn:nandc-wrn {
430                                 rockchip,pins = <NAND_WRN>;
431                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
432                         };
433
434                         nandc_rdn:nandc-rdn {
435                                 rockchip,pins = <NAND_RDN>;
436                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
437                         };
438
439                         nandc_rdy:nandc-rdy {
440                                 rockchip,pins = <NAND_RDY>;
441                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
442                         };
443
444                         nandc_cs0:nandc-cs0 {
445                                 rockchip,pins = <NAND_CS0>;
446                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
447                         };
448
449
450                         nandc_data: nandc-data {
451                                 rockchip,pins = <NAND_D0>,
452                                                 <NAND_D1>,
453                                                 <NAND_D2>,
454                                                 <NAND_D3>,
455                                                 <NAND_D4>,
456                                                 <NAND_D5>,
457                                                 <NAND_D6>,
458                                                 <NAND_D7>;
459                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
460
461                         };
462
463                 };
464
465                 gpio0_sdio0 {
466                         sdio0_clk: sdio0_clk {
467                                 rockchip,pins = <MMC1_CLKOUT>;
468                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
469
470
471                         };
472
473                         sdio0_cmd: sdio0_cmd {
474                                 rockchip,pins = <MMC1_CMD>;
475                                 rockchip,pull = <VALUE_PULL_UP>;
476
477
478                         };
479
480                         sdio0_bus1: sdio0-bus-width1 {
481                                 rockchip,pins = <MMC1_D0>;
482                                 rockchip,pull = <VALUE_PULL_UP>;
483
484
485                         };
486
487                         sdio0_bus4: sdio0-bus-width4 {
488                                 rockchip,pins = <MMC1_D0>,
489                                                 <MMC1_D1>,
490                                                 <MMC1_D2>,
491                                                 <MMC1_D3>;
492                                 rockchip,pull = <VALUE_PULL_UP>;
493
494
495                         };
496
497                         sdio0_gpio: sdio0-all-gpio{
498                                 rockchip,pins =
499                                         <GPIO0_B1>,   //CLK
500                                         <GPIO0_B0>,   //CMD
501                                         <GPIO0_B3>,   //DO
502                                         <GPIO0_B4>,   //D1
503                                         <GPIO0_B5>,   //D2
504                                         <GPIO0_B6>;   //D3
505                                 rockchip,pull = <VALUE_PULL_UP>;
506
507
508                         };
509                 };
510
511                 gpio0_pwm{
512                         pwm0_pin:pwm0 {
513                                 rockchip,pins = <PWM0>;
514                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
515
516
517                         };
518
519                         pwm1_pin:pwm1 {
520                                 rockchip,pins = <PWM1>;
521                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
522
523
524                         };
525
526                         pwm2_pin:pwm2 {
527                                 rockchip,pins = <PWM2>;
528                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
529
530
531                         };
532
533                         pwm3_pin:pwm3 {
534                                 rockchip,pins = <PWM3(IR)>;
535                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
536
537
538                         };
539                 };
540
541                 gpio2_gmac {
542                         mac_clk: mac-clk {
543                                 rockchip,pins = <MAC_CLKOUT>;
544                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
545                         };
546
547                         mac_txpins: mac-txpins {
548                                 rockchip,pins = <MAC_TXD0>, <MAC_TXD1>,  <MAC_TXEN>;
549                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
550
551
552                         };
553
554                         mac_rxpins: mac-rxpins {
555                                 rockchip,pins = <MAC_RXD0>, <MAC_RXD1>,<MAC_RXER>;
556                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
557
558
559                         };
560
561                         mac_crs: mac-crs {
562                                 rockchip,pins = <MAC_CRS>;
563                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
564
565
566                         };
567
568                         mac_mdpins: mac-mdpins {
569                                 rockchip,pins = <MAC_MDIO>, <MAC_MDC>;
570                                 rockchip,pull = <VALUE_PULL_DEFAULT>;
571
572
573                         };
574                 };
575
576
577                 //to add
578
579
580         };
581
582 };