Merge branch 'kvm-arm/vgic-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git...
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / kirkwood.dtsi
1 /include/ "skeleton.dtsi"
2
3 / {
4         compatible = "marvell,kirkwood";
5         interrupt-parent = <&intc>;
6
7         aliases {
8                gpio0 = &gpio0;
9                gpio1 = &gpio1;
10         };
11         intc: interrupt-controller {
12                 compatible = "marvell,orion-intc", "marvell,intc";
13                 interrupt-controller;
14                 #interrupt-cells = <1>;
15                 reg = <0xf1020204 0x04>,
16                       <0xf1020214 0x04>;
17         };
18
19         ocp@f1000000 {
20                 compatible = "simple-bus";
21                 ranges = <0x00000000 0xf1000000 0x4000000
22                           0xf5000000 0xf5000000 0x0000400>;
23                 #address-cells = <1>;
24                 #size-cells = <1>;
25
26                 core_clk: core-clocks@10030 {
27                         compatible = "marvell,kirkwood-core-clock";
28                         reg = <0x10030 0x4>;
29                         #clock-cells = <1>;
30                 };
31
32                 gpio0: gpio@10100 {
33                         compatible = "marvell,orion-gpio";
34                         #gpio-cells = <2>;
35                         gpio-controller;
36                         reg = <0x10100 0x40>;
37                         ngpios = <32>;
38                         interrupt-controller;
39                         #interrupt-cells = <2>;
40                         interrupts = <35>, <36>, <37>, <38>;
41                         clocks = <&gate_clk 7>;
42                 };
43
44                 gpio1: gpio@10140 {
45                         compatible = "marvell,orion-gpio";
46                         #gpio-cells = <2>;
47                         gpio-controller;
48                         reg = <0x10140 0x40>;
49                         ngpios = <18>;
50                         interrupt-controller;
51                         #interrupt-cells = <2>;
52                         interrupts = <39>, <40>, <41>;
53                         clocks = <&gate_clk 7>;
54                 };
55
56                 serial@12000 {
57                         compatible = "ns16550a";
58                         reg = <0x12000 0x100>;
59                         reg-shift = <2>;
60                         interrupts = <33>;
61                         clocks = <&gate_clk 7>;
62                         status = "disabled";
63                 };
64
65                 serial@12100 {
66                         compatible = "ns16550a";
67                         reg = <0x12100 0x100>;
68                         reg-shift = <2>;
69                         interrupts = <34>;
70                         clocks = <&gate_clk 7>;
71                         status = "disabled";
72                 };
73
74                 rtc@10300 {
75                         compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
76                         reg = <0x10300 0x20>;
77                         interrupts = <53>;
78                         clocks = <&gate_clk 7>;
79                 };
80
81                 spi@10600 {
82                         compatible = "marvell,orion-spi";
83                         #address-cells = <1>;
84                         #size-cells = <0>;
85                         cell-index = <0>;
86                         interrupts = <23>;
87                         reg = <0x10600 0x28>;
88                         clocks = <&gate_clk 7>;
89                         status = "disabled";
90                 };
91
92                 gate_clk: clock-gating-control@2011c {
93                         compatible = "marvell,kirkwood-gating-clock";
94                         reg = <0x2011c 0x4>;
95                         clocks = <&core_clk 0>;
96                         #clock-cells = <1>;
97                 };
98
99                 wdt@20300 {
100                         compatible = "marvell,orion-wdt";
101                         reg = <0x20300 0x28>;
102                         clocks = <&gate_clk 7>;
103                         status = "okay";
104                 };
105
106                 xor@60800 {
107                         compatible = "marvell,orion-xor";
108                         reg = <0x60800 0x100
109                                0x60A00 0x100>;
110                         status = "okay";
111                         clocks = <&gate_clk 8>;
112
113                         xor00 {
114                               interrupts = <5>;
115                               dmacap,memcpy;
116                               dmacap,xor;
117                         };
118                         xor01 {
119                               interrupts = <6>;
120                               dmacap,memcpy;
121                               dmacap,xor;
122                               dmacap,memset;
123                         };
124                 };
125
126                 xor@60900 {
127                         compatible = "marvell,orion-xor";
128                         reg = <0x60900 0x100
129                                0xd0B00 0x100>;
130                         status = "okay";
131                         clocks = <&gate_clk 16>;
132
133                         xor00 {
134                               interrupts = <7>;
135                               dmacap,memcpy;
136                               dmacap,xor;
137                         };
138                         xor01 {
139                               interrupts = <8>;
140                               dmacap,memcpy;
141                               dmacap,xor;
142                               dmacap,memset;
143                         };
144                 };
145
146                 ehci@50000 {
147                         compatible = "marvell,orion-ehci";
148                         reg = <0x50000 0x1000>;
149                         interrupts = <19>;
150                         clocks = <&gate_clk 3>;
151                         status = "okay";
152                 };
153
154                 sata@80000 {
155                         compatible = "marvell,orion-sata";
156                         reg = <0x80000 0x5000>;
157                         interrupts = <21>;
158                         clocks = <&gate_clk 14>, <&gate_clk 15>;
159                         clock-names = "0", "1";
160                         status = "disabled";
161                 };
162
163                 nand@3000000 {
164                         #address-cells = <1>;
165                         #size-cells = <1>;
166                         cle = <0>;
167                         ale = <1>;
168                         bank-width = <1>;
169                         compatible = "marvell,orion-nand";
170                         reg = <0x3000000 0x400>;
171                         chip-delay = <25>;
172                         /* set partition map and/or chip-delay in board dts */
173                         clocks = <&gate_clk 7>;
174                         status = "disabled";
175                 };
176
177                 i2c@11000 {
178                         compatible = "marvell,mv64xxx-i2c";
179                         reg = <0x11000 0x20>;
180                         #address-cells = <1>;
181                         #size-cells = <0>;
182                         interrupts = <29>;
183                         clock-frequency = <100000>;
184                         clocks = <&gate_clk 7>;
185                         status = "disabled";
186                 };
187
188                 crypto@30000 {
189                         compatible = "marvell,orion-crypto";
190                         reg = <0x30000 0x10000>,
191                               <0xf5000000 0x800>;
192                         reg-names = "regs", "sram";
193                         interrupts = <22>;
194                         clocks = <&gate_clk 17>;
195                         status = "okay";
196                 };
197
198                 mvsdio@90000 {
199                         compatible = "marvell,orion-sdio";
200                         reg = <0x90000 0x200>;
201                         interrupts = <28>;
202                         clocks = <&gate_clk 4>;
203                         status = "disabled";
204                 };
205         };
206 };