arch/arm/boot/dts/imx27-apf27dev.dts

   1 /*
   2  * Copyright 2013 Armadeus Systems - <support@armadeus.com>
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 /* APF27Dev is a docking board for the APF27 SOM */
  13 #include "imx27-apf27.dts"
  14
  15 / {
  16         model = "Armadeus Systems APF27Dev docking/development board";
  17         compatible = "armadeus,imx27-apf27dev", "armadeus,imx27-apf27", "fsl,imx27";
  18
  19         display: display {
  20                 model = "Chimei-LW700AT9003";
  21                 native-mode = <&timing0>;
  22                 bits-per-pixel = <16>;  /* non-standard but required */
  23                 fsl,pcr = <0xfae80083>; /* non-standard but required */
  24                 display-timings {
  25                         timing0: 800x480 {
  26                                 clock-frequency = <33000033>;
  27                                 hactive = <800>;
  28                                 vactive = <480>;
  29                                 hback-porch = <96>;
  30                                 hfront-porch = <96>;
  31                                 vback-porch = <20>;
  32                                 vfront-porch = <21>;
  33                                 hsync-len = <64>;
  34                                 vsync-len = <4>;
  35                         };
  36                 };
  37         };
  38
  39         gpio-keys {
  40                 compatible = "gpio-keys";
  41                 pinctrl-names = "default";
  42                 pinctrl-0 = <&pinctrl_gpio_keys>;
  43
  44                 user-key {
  45                         label = "user";
  46                         gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
  47                         linux,code = <276>; /* BTN_EXTRA */
  48                 };
  49         };
  50
  51         leds {
  52                 compatible = "gpio-leds";
  53                 pinctrl-names = "default";
  54                 pinctrl-0 = <&pinctrl_gpio_leds>;
  55
  56                 user {
  57                         label = "Heartbeat";
  58                         gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>;
  59                         linux,default-trigger = "heartbeat";
  60                 };
  61         };
  62
  63         regulators {
  64                 compatible = "simple-bus";
  65                 #address-cells = <1>;
  66                 #size-cells = <0>;
  67
  68                 reg_max5821: regulator@0 {
  69                         compatible = "regulator-fixed";
  70                         reg = <0>;
  71                         regulator-name = "max5821-reg";
  72                         regulator-min-microvolt = <2500000>;
  73                         regulator-max-microvolt = <2500000>;
  74                         regulator-always-on;
  75                 };
  76         };
  77 };
  78
  79 &cspi1 {
  80         fsl,spi-num-chipselects = <1>;
  81         cs-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
  82         pinctrl-names = "default";
  83         pinctrl-0 = <&pinctrl_cspi1 &pinctrl_cspi1_cs>;
  84         status = "okay";
  85
  86         adc@0 {
  87                 compatible = "maxim,max1027";
  88                 reg = <0>;
  89                 interrupt-parent = <&gpio5>;
  90                 interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
  91                 pinctrl-names = "default";
  92                 pinctrl-0 = <&pinctrl_max1027>;
  93                 spi-max-frequency = <10000000>;
  94         };
  95 };
  96
  97 &cspi2 {
  98         fsl,spi-num-chipselects = <3>;
  99         cs-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>,
 100                    <&gpio4 27 GPIO_ACTIVE_LOW>,
 101                    <&gpio2 17 GPIO_ACTIVE_LOW>;
 102         pinctrl-names = "default";
 103         pinctrl-0 = <&pinctrl_cspi2 &pinctrl_cspi2_cs>;
 104         status = "okay";
 105 };
 106
 107 &fb {
 108         display = <&display>;
 109         fsl,dmacr = <0x00020010>;
 110         pinctrl-names = "default";
 111         pinctrl-0 = <&pinctrl_imxfb1>;
 112         status = "okay";
 113 };
 114
 115 &i2c1 {
 116         clock-frequency = <400000>;
 117         pinctrl-names = "default";
 118         pinctrl-0 = <&pinctrl_i2c1>;
 119         status = "okay";
 120
 121         rtc@68 {
 122                 compatible = "dallas,ds1374";
 123                 reg = <0x68>;
 124         };
 125
 126         max5821@38 {
 127                 compatible = "maxim,max5821";
 128                 reg = <0x38>;
 129                 vref-supply = <&reg_max5821>;
 130         };
 131 };
 132
 133 &i2c2 {
 134         pinctrl-names = "default";
 135         pinctrl-0 = <&pinctrl_i2c2>;
 136         status = "okay";
 137 };
 138
 139 &iomuxc {
 140         imx27-apf27dev {
 141                 pinctrl_cspi1: cspi1grp {
 142                         fsl,pins = <
 143                                 MX27_PAD_CSPI1_MISO__CSPI1_MISO 0x0
 144                                 MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0x0
 145                                 MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0x0
 146                         >;
 147                 };
 148
 149                 pinctrl_cspi1_cs: cspi1csgrp {
 150                         fsl,pins = <MX27_PAD_CSPI1_SS0__GPIO4_28 0x0>;
 151                 };
 152
 153                 pinctrl_cspi2: cspi2grp {
 154                         fsl,pins = <
 155                                 MX27_PAD_CSPI2_MISO__CSPI2_MISO 0x0
 156                                 MX27_PAD_CSPI2_MOSI__CSPI2_MOSI 0x0
 157                                 MX27_PAD_CSPI2_SCLK__CSPI2_SCLK 0x0
 158                         >;
 159                 };
 160
 161                 pinctrl_cspi2_cs: cspi2csgrp {
 162                         fsl,pins = <
 163                                 MX27_PAD_CSI_D5__GPIO2_17 0x0
 164                                 MX27_PAD_CSPI2_SS0__GPIO4_21 0x0
 165                                 MX27_PAD_CSPI1_SS1__GPIO4_27 0x0
 166                         >;
 167                 };
 168
 169                 pinctrl_gpio_leds: gpioledsgrp {
 170                         fsl,pins = <MX27_PAD_PC_VS1__GPIO6_14 0x0>;
 171                 };
 172
 173                 pinctrl_gpio_keys: gpiokeysgrp {
 174                         fsl,pins = <MX27_PAD_PC_VS2__GPIO6_13 0x0>;
 175                 };
 176
 177                 pinctrl_imxfb1: imxfbgrp {
 178                         fsl,pins = <
 179                                 MX27_PAD_CLS__CLS 0x0
 180                                 MX27_PAD_CONTRAST__CONTRAST 0x0
 181                                 MX27_PAD_LD0__LD0 0x0
 182                                 MX27_PAD_LD1__LD1 0x0
 183                                 MX27_PAD_LD2__LD2 0x0
 184                                 MX27_PAD_LD3__LD3 0x0
 185                                 MX27_PAD_LD4__LD4 0x0
 186                                 MX27_PAD_LD5__LD5 0x0
 187                                 MX27_PAD_LD6__LD6 0x0
 188                                 MX27_PAD_LD7__LD7 0x0
 189                                 MX27_PAD_LD8__LD8 0x0
 190                                 MX27_PAD_LD9__LD9 0x0
 191                                 MX27_PAD_LD10__LD10 0x0
 192                                 MX27_PAD_LD11__LD11 0x0
 193                                 MX27_PAD_LD12__LD12 0x0
 194                                 MX27_PAD_LD13__LD13 0x0
 195                                 MX27_PAD_LD14__LD14 0x0
 196                                 MX27_PAD_LD15__LD15 0x0
 197                                 MX27_PAD_LD16__LD16 0x0
 198                                 MX27_PAD_LD17__LD17 0x0
 199                                 MX27_PAD_LSCLK__LSCLK 0x0
 200                                 MX27_PAD_OE_ACD__OE_ACD 0x0
 201                                 MX27_PAD_PS__PS 0x0
 202                                 MX27_PAD_REV__REV 0x0
 203                                 MX27_PAD_SPL_SPR__SPL_SPR 0x0
 204                                 MX27_PAD_HSYNC__HSYNC 0x0
 205                                 MX27_PAD_VSYNC__VSYNC 0x0
 206                         >;
 207                 };
 208
 209                 pinctrl_i2c1: i2c1grp {
 210                         fsl,pins = <
 211                                 MX27_PAD_I2C_DATA__I2C_DATA 0x0
 212                                 MX27_PAD_I2C_CLK__I2C_CLK 0x0
 213                         >;
 214                 };
 215
 216                 pinctrl_i2c2: i2c2grp {
 217                         fsl,pins = <
 218                                 MX27_PAD_I2C2_SDA__I2C2_SDA 0x0
 219                                 MX27_PAD_I2C2_SCL__I2C2_SCL 0x0
 220                         >;
 221                 };
 222
 223                 pinctrl_max1027: max1027 {
 224                          fsl,pins = <
 225                                  MX27_PAD_UART1_CTS__GPIO5_14 0x0 /* CNVST */
 226                                  MX27_PAD_UART1_RTS__GPIO5_15 0x0 /* EOC */
 227                         >;
 228                 };
 229
 230                 pinctrl_pwm: pwmgrp {
 231                         fsl,pins = <
 232                                 MX27_PAD_PWMO__PWMO 0x0
 233                         >;
 234                 };
 235
 236                 pinctrl_sdhc2: sdhc2grp {
 237                         fsl,pins = <
 238                                 MX27_PAD_SD2_CLK__SD2_CLK 0x0
 239                                 MX27_PAD_SD2_CMD__SD2_CMD 0x0
 240                                 MX27_PAD_SD2_D0__SD2_D0 0x0
 241                                 MX27_PAD_SD2_D1__SD2_D1 0x0
 242                                 MX27_PAD_SD2_D2__SD2_D2 0x0
 243                                 MX27_PAD_SD2_D3__SD2_D3 0x0
 244                         >;
 245                 };
 246
 247                 pinctrl_sdhc2_cd: sdhc2cdgrp {
 248                         fsl,pins = <MX27_PAD_TOUT__GPIO3_14 0x0>;
 249                 };
 250         };
 251 };
 252
 253 &sdhci2 {
 254         bus-width = <4>;
 255         cd-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
 256         pinctrl-names = "default";
 257         pinctrl-0 = <&pinctrl_sdhc2 &pinctrl_sdhc2_cd>;
 258         status = "okay";
 259 };
 260
 261 &pwm {
 262         pinctrl-names = "default";
 263         pinctrl-0 = <&pinctrl_pwm>;
 264 };