arch/arm/boot/dts/at91sam9263.dtsi

   1 /*
   2  * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
   3  *
   4  *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
   5  *
   6  * Licensed under GPLv2 only.
   7  */
   8
   9 /include/ "skeleton.dtsi"
  10
  11 / {
  12         model = "Atmel AT91SAM9263 family SoC";
  13         compatible = "atmel,at91sam9263";
  14         interrupt-parent = <&aic>;
  15
  16         aliases {
  17                 serial0 = &dbgu;
  18                 serial1 = &usart0;
  19                 serial2 = &usart1;
  20                 serial3 = &usart2;
  21                 gpio0 = &pioA;
  22                 gpio1 = &pioB;
  23                 gpio2 = &pioC;
  24                 gpio3 = &pioD;
  25                 gpio4 = &pioE;
  26                 tcb0 = &tcb0;
  27                 i2c0 = &i2c0;
  28                 ssc0 = &ssc0;
  29                 ssc1 = &ssc1;
  30         };
  31         cpus {
  32                 #address-cells = <0>;
  33                 #size-cells = <0>;
  34
  35                 cpu {
  36                         compatible = "arm,arm926ej-s";
  37                         device_type = "cpu";
  38                 };
  39         };
  40
  41         memory {
  42                 reg = <0x20000000 0x08000000>;
  43         };
  44
  45         ahb {
  46                 compatible = "simple-bus";
  47                 #address-cells = <1>;
  48                 #size-cells = <1>;
  49                 ranges;
  50
  51                 apb {
  52                         compatible = "simple-bus";
  53                         #address-cells = <1>;
  54                         #size-cells = <1>;
  55                         ranges;
  56
  57                         aic: interrupt-controller@fffff000 {
  58                                 #interrupt-cells = <3>;
  59                                 compatible = "atmel,at91rm9200-aic";
  60                                 interrupt-controller;
  61                                 reg = <0xfffff000 0x200>;
  62                                 atmel,external-irqs = <30 31>;
  63                         };
  64
  65                         pmc: pmc@fffffc00 {
  66                                 compatible = "atmel,at91rm9200-pmc";
  67                                 reg = <0xfffffc00 0x100>;
  68                         };
  69
  70                         ramc: ramc@ffffe200 {
  71                                 compatible = "atmel,at91sam9260-sdramc";
  72                                 reg = <0xffffe200 0x200
  73                                        0xffffe800 0x200>;
  74                         };
  75
  76                         pit: timer@fffffd30 {
  77                                 compatible = "atmel,at91sam9260-pit";
  78                                 reg = <0xfffffd30 0xf>;
  79                                 interrupts = <1 4 7>;
  80                         };
  81
  82                         tcb0: timer@fff7c000 {
  83                                 compatible = "atmel,at91rm9200-tcb";
  84                                 reg = <0xfff7c000 0x100>;
  85                                 interrupts = <19 4 0>;
  86                         };
  87
  88                         rstc@fffffd00 {
  89                                 compatible = "atmel,at91sam9260-rstc";
  90                                 reg = <0xfffffd00 0x10>;
  91                         };
  92
  93                         shdwc@fffffd10 {
  94                                 compatible = "atmel,at91sam9260-shdwc";
  95                                 reg = <0xfffffd10 0x10>;
  96                         };
  97
  98                         pinctrl@fffff200 {
  99                                 #address-cells = <1>;
 100                                 #size-cells = <1>;
 101                                 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
 102                                 ranges = <0xfffff200 0xfffff200 0xa00>;
 103
 104                                 atmel,mux-mask = <
 105                                       /*    A         B     */
 106                                        0xfffffffb 0xffffe07f  /* pioA */
 107                                        0x0007ffff 0x39072fff  /* pioB */
 108                                        0xffffffff 0x3ffffff8  /* pioC */
 109                                        0xfffffbff 0xffffffff  /* pioD */
 110                                        0xffe00fff 0xfbfcff00  /* pioE */
 111                                       >;
 112
 113                                 /* shared pinctrl settings */
 114                                 dbgu {
 115                                         pinctrl_dbgu: dbgu-0 {
 116                                                 atmel,pins =
 117                                                         <2 30 0x1 0x0   /* PC30 periph A */
 118                                                          2 31 0x1 0x1>; /* PC31 periph with pullup */
 119                                         };
 120                                 };
 121
 122                                 usart0 {
 123                                         pinctrl_usart0: usart0-0 {
 124                                                 atmel,pins =
 125                                                         <0 26 0x1 0x1   /* PA26 periph A with pullup */
 126                                                          0 27 0x1 0x0>; /* PA27 periph A */
 127                                         };
 128
 129                                         pinctrl_usart0_rts: usart0_rts-0 {
 130                                                 atmel,pins =
 131                                                         <0 28 0x1 0x0>; /* PA28 periph A */
 132                                         };
 133
 134                                         pinctrl_usart0_cts: usart0_cts-0 {
 135                                                 atmel,pins =
 136                                                         <0 29 0x1 0x0>; /* PA29 periph A */
 137                                         };
 138                                 };
 139
 140                                 usart1 {
 141                                         pinctrl_usart1: usart1-0 {
 142                                                 atmel,pins =
 143                                                         <3 0 0x1 0x1    /* PD0 periph A with pullup */
 144                                                          3 1 0x1 0x0>;  /* PD1 periph A */
 145                                         };
 146
 147                                         pinctrl_usart1_rts: usart1_rts-0 {
 148                                                 atmel,pins =
 149                                                         <3 7 0x2 0x0>;  /* PD7 periph B */
 150                                         };
 151
 152                                         pinctrl_usart1_cts: usart1_cts-0 {
 153                                                 atmel,pins =
 154                                                         <3 8 0x2 0x0>;  /* PD8 periph B */
 155                                         };
 156                                 };
 157
 158                                 usart2 {
 159                                         pinctrl_usart2: usart2-0 {
 160                                                 atmel,pins =
 161                                                         <3 2 0x1 0x1    /* PD2 periph A with pullup */
 162                                                          3 3 0x1 0x0>;  /* PD3 periph A */
 163                                         };
 164
 165                                         pinctrl_usart2_rts: usart2_rts-0 {
 166                                                 atmel,pins =
 167                                                         <3 5 0x2 0x0>;  /* PD5 periph B */
 168                                         };
 169
 170                                         pinctrl_usart2_cts: usart2_cts-0 {
 171                                                 atmel,pins =
 172                                                         <4 6 0x2 0x0>;  /* PD6 periph B */
 173                                         };
 174                                 };
 175
 176                                 nand {
 177                                         pinctrl_nand: nand-0 {
 178                                                 atmel,pins =
 179                                                         <0 22 0x0 0x1   /* PA22 gpio RDY pin pull_up*/
 180                                                          3 15 0x0 0x1>; /* PD15 gpio enable pin pull_up */
 181                                         };
 182                                 };
 183
 184                                 macb {
 185                                         pinctrl_macb_rmii: macb_rmii-0 {
 186                                                 atmel,pins =
 187                                                         <2 25 0x2 0x0   /* PC25 periph B */
 188                                                          4 21 0x1 0x0   /* PE21 periph A */
 189                                                          4 23 0x1 0x0   /* PE23 periph A */
 190                                                          4 24 0x1 0x0   /* PE24 periph A */
 191                                                          4 25 0x1 0x0   /* PE25 periph A */
 192                                                          4 26 0x1 0x0   /* PE26 periph A */
 193                                                          4 27 0x1 0x0   /* PE27 periph A */
 194                                                          4 28 0x1 0x0   /* PE28 periph A */
 195                                                          4 29 0x1 0x0   /* PE29 periph A */
 196                                                          4 30 0x1 0x0>; /* PE30 periph A */
 197                                         };
 198
 199                                         pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
 200                                                 atmel,pins =
 201                                                         <2 20 0x2 0x0   /* PC20 periph B */
 202                                                          2 21 0x2 0x0   /* PC21 periph B */
 203                                                          2 22 0x2 0x0   /* PC22 periph B */
 204                                                          2 23 0x2 0x0   /* PC23 periph B */
 205                                                          2 24 0x2 0x0   /* PC24 periph B */
 206                                                          2 25 0x2 0x0   /* PC25 periph B */
 207                                                          2 27 0x2 0x0   /* PC27 periph B */
 208                                                          4 22 0x2 0x0>; /* PE22 periph B */
 209                                         };
 210                                 };
 211
 212                                 mmc0 {
 213                                         pinctrl_mmc0_clk: mmc0_clk-0 {
 214                                                 atmel,pins =
 215                                                         <0 12 0x1 0x0>; /* PA12 periph A */
 216                                         };
 217
 218                                         pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
 219                                                 atmel,pins =
 220                                                         <0 1 0x1 0x1    /* PA1 periph A with pullup */
 221                                                          0 0 0x1 0x1>;  /* PA0 periph A with pullup */
 222                                         };
 223
 224                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 225                                                 atmel,pins =
 226                                                         <0 3 0x1 0x1    /* PA3 periph A with pullup */
 227                                                          0 4 0x1 0x1    /* PA4 periph A with pullup */
 228                                                          0 5 0x1 0x1>;  /* PA5 periph A with pullup */
 229                                         };
 230
 231                                         pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
 232                                                 atmel,pins =
 233                                                         <0 16 0x1 0x1   /* PA16 periph A with pullup */
 234                                                          0 17 0x1 0x1>; /* PA17 periph A with pullup */
 235                                         };
 236
 237                                         pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
 238                                                 atmel,pins =
 239                                                         <0 18 0x1 0x1   /* PA18 periph A with pullup */
 240                                                          0 19 0x1 0x1   /* PA19 periph A with pullup */
 241                                                          0 20 0x1 0x1>; /* PA20 periph A with pullup */
 242                                         };
 243                                 };
 244
 245                                 mmc1 {
 246                                         pinctrl_mmc1_clk: mmc1_clk-0 {
 247                                                 atmel,pins =
 248                                                         <0 6 0x1 0x0>;  /* PA6 periph A */
 249                                         };
 250
 251                                         pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
 252                                                 atmel,pins =
 253                                                         <0 7 0x1 0x1    /* PA7 periph A with pullup */
 254                                                          0 8 0x1 0x1>;  /* PA8 periph A with pullup */
 255                                         };
 256
 257                                         pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
 258                                                 atmel,pins =
 259                                                         <0 9 0x1 0x1    /* PA9 periph A with pullup */
 260                                                          0 10 0x1 0x1   /* PA10 periph A with pullup */
 261                                                          0 11 0x1 0x1>; /* PA11 periph A with pullup */
 262                                         };
 263
 264                                         pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
 265                                                 atmel,pins =
 266                                                         <0 21 0x1 0x1   /* PA21 periph A with pullup */
 267                                                          0 22 0x1 0x1>; /* PA22 periph A with pullup */
 268                                         };
 269
 270                                         pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
 271                                                 atmel,pins =
 272                                                         <0 23 0x1 0x1   /* PA23 periph A with pullup */
 273                                                          0 24 0x1 0x1   /* PA24 periph A with pullup */
 274                                                          0 25 0x1 0x1>; /* PA25 periph A with pullup */
 275                                         };
 276                                 };
 277
 278                                 ssc0 {
 279                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 280                                                 atmel,pins =
 281                                                         <1 0 0x2 0x0    /* PB0 periph B */
 282                                                          1 1 0x2 0x0    /* PB1 periph B */
 283                                                          1 2 0x2 0x0>;  /* PB2 periph B */
 284                                         };
 285
 286                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 287                                                 atmel,pins =
 288                                                         <1 3 0x2 0x0    /* PB3 periph B */
 289                                                          1 4 0x2 0x0    /* PB4 periph B */
 290                                                          1 5 0x2 0x0>;  /* PB5 periph B */
 291                                         };
 292                                 };
 293
 294                                 ssc1 {
 295                                         pinctrl_ssc1_tx: ssc1_tx-0 {
 296                                                 atmel,pins =
 297                                                         <1 6 0x1 0x0    /* PB6 periph A */
 298                                                          1 7 0x1 0x0    /* PB7 periph A */
 299                                                          1 8 0x1 0x0>;  /* PB8 periph A */
 300                                         };
 301
 302                                         pinctrl_ssc1_rx: ssc1_rx-0 {
 303                                                 atmel,pins =
 304                                                         <1 9 0x1 0x0    /* PB9 periph A */
 305                                                          1 10 0x1 0x0   /* PB10 periph A */
 306                                                          1 11 0x1 0x0>; /* PB11 periph A */
 307                                         };
 308                                 };
 309
 310                                 spi0 {
 311                                         pinctrl_spi0: spi0-0 {
 312                                                 atmel,pins =
 313                                                         <0 0 0x2 0x0    /* PA0 periph B SPI0_MISO pin */
 314                                                          0 1 0x2 0x0    /* PA1 periph B SPI0_MOSI pin */
 315                                                          0 2 0x2 0x0>;  /* PA2 periph B SPI0_SPCK pin */
 316                                         };
 317                                 };
 318
 319                                 spi1 {
 320                                         pinctrl_spi1: spi1-0 {
 321                                                 atmel,pins =
 322                                                         <1 12 0x1 0x0   /* PB12 periph A SPI1_MISO pin */
 323                                                          1 13 0x1 0x0   /* PB13 periph A SPI1_MOSI pin */
 324                                                          1 14 0x1 0x0>; /* PB14 periph A SPI1_SPCK pin */
 325                                         };
 326                                 };
 327
 328                                 pioA: gpio@fffff200 {
 329                                         compatible = "atmel,at91rm9200-gpio";
 330                                         reg = <0xfffff200 0x200>;
 331                                         interrupts = <2 4 1>;
 332                                         #gpio-cells = <2>;
 333                                         gpio-controller;
 334                                         interrupt-controller;
 335                                         #interrupt-cells = <2>;
 336                                 };
 337
 338                                 pioB: gpio@fffff400 {
 339                                         compatible = "atmel,at91rm9200-gpio";
 340                                         reg = <0xfffff400 0x200>;
 341                                         interrupts = <3 4 1>;
 342                                         #gpio-cells = <2>;
 343                                         gpio-controller;
 344                                         interrupt-controller;
 345                                         #interrupt-cells = <2>;
 346                                 };
 347
 348                                 pioC: gpio@fffff600 {
 349                                         compatible = "atmel,at91rm9200-gpio";
 350                                         reg = <0xfffff600 0x200>;
 351                                         interrupts = <4 4 1>;
 352                                         #gpio-cells = <2>;
 353                                         gpio-controller;
 354                                         interrupt-controller;
 355                                         #interrupt-cells = <2>;
 356                                 };
 357
 358                                 pioD: gpio@fffff800 {
 359                                         compatible = "atmel,at91rm9200-gpio";
 360                                         reg = <0xfffff800 0x200>;
 361                                         interrupts = <4 4 1>;
 362                                         #gpio-cells = <2>;
 363                                         gpio-controller;
 364                                         interrupt-controller;
 365                                         #interrupt-cells = <2>;
 366                                 };
 367
 368                                 pioE: gpio@fffffa00 {
 369                                         compatible = "atmel,at91rm9200-gpio";
 370                                         reg = <0xfffffa00 0x200>;
 371                                         interrupts = <4 4 1>;
 372                                         #gpio-cells = <2>;
 373                                         gpio-controller;
 374                                         interrupt-controller;
 375                                         #interrupt-cells = <2>;
 376                                 };
 377                         };
 378
 379                         dbgu: serial@ffffee00 {
 380                                 compatible = "atmel,at91sam9260-usart";
 381                                 reg = <0xffffee00 0x200>;
 382                                 interrupts = <1 4 7>;
 383                                 pinctrl-names = "default";
 384                                 pinctrl-0 = <&pinctrl_dbgu>;
 385                                 status = "disabled";
 386                         };
 387
 388                         usart0: serial@fff8c000 {
 389                                 compatible = "atmel,at91sam9260-usart";
 390                                 reg = <0xfff8c000 0x200>;
 391                                 interrupts = <7 4 5>;
 392                                 atmel,use-dma-rx;
 393                                 atmel,use-dma-tx;
 394                                 pinctrl-names = "default";
 395                                 pinctrl-0 = <&pinctrl_usart0>;
 396                                 status = "disabled";
 397                         };
 398
 399                         usart1: serial@fff90000 {
 400                                 compatible = "atmel,at91sam9260-usart";
 401                                 reg = <0xfff90000 0x200>;
 402                                 interrupts = <8 4 5>;
 403                                 atmel,use-dma-rx;
 404                                 atmel,use-dma-tx;
 405                                 pinctrl-names = "default";
 406                                 pinctrl-0 = <&pinctrl_usart1>;
 407                                 status = "disabled";
 408                         };
 409
 410                         usart2: serial@fff94000 {
 411                                 compatible = "atmel,at91sam9260-usart";
 412                                 reg = <0xfff94000 0x200>;
 413                                 interrupts = <9 4 5>;
 414                                 atmel,use-dma-rx;
 415                                 atmel,use-dma-tx;
 416                                 pinctrl-names = "default";
 417                                 pinctrl-0 = <&pinctrl_usart2>;
 418                                 status = "disabled";
 419                         };
 420
 421                         ssc0: ssc@fff98000 {
 422                                 compatible = "atmel,at91rm9200-ssc";
 423                                 reg = <0xfff98000 0x4000>;
 424                                 interrupts = <16 4 5>;
 425                                 pinctrl-names = "default";
 426                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 427                                 status = "disabled";
 428                         };
 429
 430                         ssc1: ssc@fff9c000 {
 431                                 compatible = "atmel,at91rm9200-ssc";
 432                                 reg = <0xfff9c000 0x4000>;
 433                                 interrupts = <17 4 5>;
 434                                 pinctrl-names = "default";
 435                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
 436                                 status = "disabled";
 437                         };
 438
 439                         macb0: ethernet@fffbc000 {
 440                                 compatible = "cdns,at32ap7000-macb", "cdns,macb";
 441                                 reg = <0xfffbc000 0x100>;
 442                                 interrupts = <21 4 3>;
 443                                 pinctrl-names = "default";
 444                                 pinctrl-0 = <&pinctrl_macb_rmii>;
 445                                 status = "disabled";
 446                         };
 447
 448                         usb1: gadget@fff78000 {
 449                                 compatible = "atmel,at91rm9200-udc";
 450                                 reg = <0xfff78000 0x4000>;
 451                                 interrupts = <24 4 2>;
 452                                 status = "disabled";
 453                         };
 454
 455                         i2c0: i2c@fff88000 {
 456                                 compatible = "atmel,at91sam9263-i2c";
 457                                 reg = <0xfff88000 0x100>;
 458                                 interrupts = <13 4 6>;
 459                                 #address-cells = <1>;
 460                                 #size-cells = <0>;
 461                                 status = "disabled";
 462                         };
 463
 464                         mmc0: mmc@fff80000 {
 465                                 compatible = "atmel,hsmci";
 466                                 reg = <0xfff80000 0x600>;
 467                                 interrupts = <10 4 0>;
 468                                 #address-cells = <1>;
 469                                 #size-cells = <0>;
 470                                 status = "disabled";
 471                         };
 472
 473                         mmc1: mmc@fff84000 {
 474                                 compatible = "atmel,hsmci";
 475                                 reg = <0xfff84000 0x600>;
 476                                 interrupts = <11 4 0>;
 477                                 #address-cells = <1>;
 478                                 #size-cells = <0>;
 479                                 status = "disabled";
 480                         };
 481
 482                         watchdog@fffffd40 {
 483                                 compatible = "atmel,at91sam9260-wdt";
 484                                 reg = <0xfffffd40 0x10>;
 485                                 status = "disabled";
 486                         };
 487
 488                         spi0: spi@fffa4000 {
 489                                 #address-cells = <1>;
 490                                 #size-cells = <0>;
 491                                 compatible = "atmel,at91rm9200-spi";
 492                                 reg = <0xfffa4000 0x200>;
 493                                 interrupts = <14 4 3>;
 494                                 pinctrl-names = "default";
 495                                 pinctrl-0 = <&pinctrl_spi0>;
 496                                 status = "disabled";
 497                         };
 498
 499                         spi1: spi@fffa8000 {
 500                                 #address-cells = <1>;
 501                                 #size-cells = <0>;
 502                                 compatible = "atmel,at91rm9200-spi";
 503                                 reg = <0xfffa8000 0x200>;
 504                                 interrupts = <15 4 3>;
 505                                 pinctrl-names = "default";
 506                                 pinctrl-0 = <&pinctrl_spi1>;
 507                                 status = "disabled";
 508                         };
 509                 };
 510
 511                 nand0: nand@40000000 {
 512                         compatible = "atmel,at91rm9200-nand";
 513                         #address-cells = <1>;
 514                         #size-cells = <1>;
 515                         reg = <0x40000000 0x10000000
 516                                0xffffe000 0x200
 517                               >;
 518                         atmel,nand-addr-offset = <21>;
 519                         atmel,nand-cmd-offset = <22>;
 520                         pinctrl-names = "default";
 521                         pinctrl-0 = <&pinctrl_nand>;
 522                         gpios = <&pioA 22 0
 523                                  &pioD 15 0
 524                                  0
 525                                 >;
 526                         status = "disabled";
 527                 };
 528
 529                 usb0: ohci@00a00000 {
 530                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
 531                         reg = <0x00a00000 0x100000>;
 532                         interrupts = <29 4 2>;
 533                         status = "disabled";
 534                 };
 535         };
 536
 537         i2c@0 {
 538                 compatible = "i2c-gpio";
 539                 gpios = <&pioB 4 0 /* sda */
 540                          &pioB 5 0 /* scl */
 541                         >;
 542                 i2c-gpio,sda-open-drain;
 543                 i2c-gpio,scl-open-drain;
 544                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
 545                 #address-cells = <1>;
 546                 #size-cells = <0>;
 547                 status = "disabled";
 548         };
 549 };