Merge branch 'v3.10/topic/misc' into linux-linaro-lsk
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / at91rm9200.dtsi
1 /*
2  * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
3  *
4  *  Copyright (C) 2011 Atmel,
5  *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6  *                2012 Joachim Eastwood <manabian@gmail.com>
7  *
8  * Based on at91sam9260.dtsi
9  *
10  * Licensed under GPLv2 or later.
11  */
12
13 /include/ "skeleton.dtsi"
14
15 / {
16         model = "Atmel AT91RM9200 family SoC";
17         compatible = "atmel,at91rm9200";
18         interrupt-parent = <&aic>;
19
20         aliases {
21                 serial0 = &dbgu;
22                 serial1 = &usart0;
23                 serial2 = &usart1;
24                 serial3 = &usart2;
25                 serial4 = &usart3;
26                 gpio0 = &pioA;
27                 gpio1 = &pioB;
28                 gpio2 = &pioC;
29                 gpio3 = &pioD;
30                 tcb0 = &tcb0;
31                 tcb1 = &tcb1;
32                 i2c0 = &i2c0;
33                 ssc0 = &ssc0;
34                 ssc1 = &ssc1;
35                 ssc2 = &ssc2;
36         };
37         cpus {
38                 #address-cells = <0>;
39                 #size-cells = <0>;
40
41                 cpu {
42                         compatible = "arm,arm920t";
43                         device_type = "cpu";
44                 };
45         };
46
47         memory {
48                 reg = <0x20000000 0x04000000>;
49         };
50
51         ahb {
52                 compatible = "simple-bus";
53                 #address-cells = <1>;
54                 #size-cells = <1>;
55                 ranges;
56
57                 apb {
58                         compatible = "simple-bus";
59                         #address-cells = <1>;
60                         #size-cells = <1>;
61                         ranges;
62
63                         aic: interrupt-controller@fffff000 {
64                                 #interrupt-cells = <3>;
65                                 compatible = "atmel,at91rm9200-aic";
66                                 interrupt-controller;
67                                 reg = <0xfffff000 0x200>;
68                                 atmel,external-irqs = <25 26 27 28 29 30 31>;
69                         };
70
71                         ramc0: ramc@ffffff00 {
72                                 compatible = "atmel,at91rm9200-sdramc";
73                                 reg = <0xffffff00 0x100>;
74                         };
75
76                         pmc: pmc@fffffc00 {
77                                 compatible = "atmel,at91rm9200-pmc";
78                                 reg = <0xfffffc00 0x100>;
79                         };
80
81                         st: timer@fffffd00 {
82                                 compatible = "atmel,at91rm9200-st";
83                                 reg = <0xfffffd00 0x100>;
84                                 interrupts = <1 4 7>;
85                         };
86
87                         tcb0: timer@fffa0000 {
88                                 compatible = "atmel,at91rm9200-tcb";
89                                 reg = <0xfffa0000 0x100>;
90                                 interrupts = <17 4 0 18 4 0 19 4 0>;
91                         };
92
93                         tcb1: timer@fffa4000 {
94                                 compatible = "atmel,at91rm9200-tcb";
95                                 reg = <0xfffa4000 0x100>;
96                                 interrupts = <20 4 0 21 4 0 22 4 0>;
97                         };
98
99                         i2c0: i2c@fffb8000 {
100                                 compatible = "atmel,at91rm9200-i2c";
101                                 reg = <0xfffb8000 0x4000>;
102                                 interrupts = <12 4 6>;
103                                 pinctrl-names = "default";
104                                 pinctrl-0 = <&pinctrl_twi>;
105                                 #address-cells = <1>;
106                                 #size-cells = <0>;
107                                 status = "disabled";
108                         };
109
110                         mmc0: mmc@fffb4000 {
111                                 compatible = "atmel,hsmci";
112                                 reg = <0xfffb4000 0x4000>;
113                                 interrupts = <10 4 0>;
114                                 #address-cells = <1>;
115                                 #size-cells = <0>;
116                                 status = "disabled";
117                         };
118
119                         ssc0: ssc@fffd0000 {
120                                 compatible = "atmel,at91rm9200-ssc";
121                                 reg = <0xfffd0000 0x4000>;
122                                 interrupts = <14 4 5>;
123                                 pinctrl-names = "default";
124                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
125                                 status = "disable";
126                         };
127
128                         ssc1: ssc@fffd4000 {
129                                 compatible = "atmel,at91rm9200-ssc";
130                                 reg = <0xfffd4000 0x4000>;
131                                 interrupts = <15 4 5>;
132                                 pinctrl-names = "default";
133                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
134                                 status = "disable";
135                         };
136
137                         ssc2: ssc@fffd8000 {
138                                 compatible = "atmel,at91rm9200-ssc";
139                                 reg = <0xfffd8000 0x4000>;
140                                 interrupts = <16 4 5>;
141                                 pinctrl-names = "default";
142                                 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
143                                 status = "disable";
144                         };
145
146                         macb0: ethernet@fffbc000 {
147                                 compatible = "cdns,at91rm9200-emac", "cdns,emac";
148                                 reg = <0xfffbc000 0x4000>;
149                                 interrupts = <24 4 3>;
150                                 phy-mode = "rmii";
151                                 pinctrl-names = "default";
152                                 pinctrl-0 = <&pinctrl_macb_rmii>;
153                                 status = "disabled";
154                         };
155
156                         pinctrl@fffff400 {
157                                 #address-cells = <1>;
158                                 #size-cells = <1>;
159                                 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
160                                 ranges = <0xfffff400 0xfffff400 0x800>;
161
162                                 atmel,mux-mask = <
163                                         /*    A         B     */
164                                          0xffffffff 0xffffffff  /* pioA */
165                                          0xffffffff 0x083fffff  /* pioB */
166                                          0xffff3fff 0x00000000  /* pioC */
167                                          0x03ff87ff 0x0fffff80  /* pioD */
168                                         >;
169
170                                 /* shared pinctrl settings */
171                                 dbgu {
172                                         pinctrl_dbgu: dbgu-0 {
173                                                 atmel,pins =
174                                                         <0 30 0x1 0x0   /* PA30 periph A */
175                                                          0 31 0x1 0x1>; /* PA31 periph with pullup */
176                                         };
177                                 };
178
179                                 uart0 {
180                                         pinctrl_uart0: uart0-0 {
181                                                 atmel,pins =
182                                                         <0 17 0x1 0x0   /* PA17 periph A */
183                                                          0 18 0x1 0x0>; /* PA18 periph A */
184                                         };
185
186                                         pinctrl_uart0_rts: uart0_rts-0 {
187                                                 atmel,pins =
188                                                         <0 20 0x1 0x0>; /* PA20 periph A */
189                                         };
190
191                                         pinctrl_uart0_cts: uart0_cts-0 {
192                                                 atmel,pins =
193                                                         <0 21 0x1 0x0>; /* PA21 periph A */
194                                         };
195                                 };
196
197                                 uart1 {
198                                         pinctrl_uart1: uart1-0 {
199                                                 atmel,pins =
200                                                         <1 20 0x1 0x1   /* PB20 periph A with pullup */
201                                                          1 21 0x1 0x0>; /* PB21 periph A */
202                                         };
203
204                                         pinctrl_uart1_rts: uart1_rts-0 {
205                                                 atmel,pins =
206                                                         <1 24 0x1 0x0>; /* PB24 periph A */
207                                         };
208
209                                         pinctrl_uart1_cts: uart1_cts-0 {
210                                                 atmel,pins =
211                                                         <1 26 0x1 0x0>; /* PB26 periph A */
212                                         };
213
214                                         pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
215                                                 atmel,pins =
216                                                         <1 19 0x1 0x0   /* PB19 periph A */
217                                                          1 25 0x1 0x0>; /* PB25 periph A */
218                                         };
219
220                                         pinctrl_uart1_dcd: uart1_dcd-0 {
221                                                 atmel,pins =
222                                                         <1 23 0x1 0x0>; /* PB23 periph A */
223                                         };
224
225                                         pinctrl_uart1_ri: uart1_ri-0 {
226                                                 atmel,pins =
227                                                         <1 18 0x1 0x0>; /* PB18 periph A */
228                                         };
229                                 };
230
231                                 uart2 {
232                                         pinctrl_uart2: uart2-0 {
233                                                 atmel,pins =
234                                                         <0 22 0x1 0x0   /* PA22 periph A */
235                                                          0 23 0x1 0x1>; /* PA23 periph A with pullup */
236                                         };
237
238                                         pinctrl_uart2_rts: uart2_rts-0 {
239                                                 atmel,pins =
240                                                         <0 30 0x2 0x0>; /* PA30 periph B */
241                                         };
242
243                                         pinctrl_uart2_cts: uart2_cts-0 {
244                                                 atmel,pins =
245                                                         <0 31 0x2 0x0>; /* PA31 periph B */
246                                         };
247                                 };
248
249                                 uart3 {
250                                         pinctrl_uart3: uart3-0 {
251                                                 atmel,pins =
252                                                         <0 5 0x2 0x1    /* PA5 periph B with pullup */
253                                                          0 6 0x2 0x0>;  /* PA6 periph B */
254                                         };
255
256                                         pinctrl_uart3_rts: uart3_rts-0 {
257                                                 atmel,pins =
258                                                         <1 0 0x2 0x0>;  /* PB0 periph B */
259                                         };
260
261                                         pinctrl_uart3_cts: uart3_cts-0 {
262                                                 atmel,pins =
263                                                         <1 1 0x2 0x0>;  /* PB1 periph B */
264                                         };
265                                 };
266
267                                 nand {
268                                         pinctrl_nand: nand-0 {
269                                                 atmel,pins =
270                                                         <2 2 0x0 0x1    /* PC2 gpio RDY pin pull_up */
271                                                          1 1 0x0 0x1>;  /* PB1 gpio CD pin pull_up */
272                                         };
273                                 };
274
275                                 macb {
276                                         pinctrl_macb_rmii: macb_rmii-0 {
277                                                 atmel,pins =
278                                                         <0 7 0x1 0x0    /* PA7 periph A */
279                                                          0 8 0x1 0x0    /* PA8 periph A */
280                                                          0 9 0x1 0x0    /* PA9 periph A */
281                                                          0 10 0x1 0x0   /* PA10 periph A */
282                                                          0 11 0x1 0x0   /* PA11 periph A */
283                                                          0 12 0x1 0x0   /* PA12 periph A */
284                                                          0 13 0x1 0x0   /* PA13 periph A */
285                                                          0 14 0x1 0x0   /* PA14 periph A */
286                                                          0 15 0x1 0x0   /* PA15 periph A */
287                                                          0 16 0x1 0x0>; /* PA16 periph A */
288                                         };
289
290                                         pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
291                                                 atmel,pins =
292                                                         <1 12 0x2 0x0   /* PB12 periph B */
293                                                          1 13 0x2 0x0   /* PB13 periph B */
294                                                          1 14 0x2 0x0   /* PB14 periph B */
295                                                          1 15 0x2 0x0   /* PB15 periph B */
296                                                          1 16 0x2 0x0   /* PB16 periph B */
297                                                          1 17 0x2 0x0   /* PB17 periph B */
298                                                          1 18 0x2 0x0   /* PB18 periph B */
299                                                          1 19 0x2 0x0>; /* PB19 periph B */
300                                         };
301                                 };
302
303                                 mmc0 {
304                                         pinctrl_mmc0_clk: mmc0_clk-0 {
305                                                 atmel,pins =
306                                                         <0 27 0x1 0x0>; /* PA27 periph A */
307                                         };
308
309                                         pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
310                                                 atmel,pins =
311                                                         <0 28 0x1 0x1   /* PA28 periph A with pullup */
312                                                          0 29 0x1 0x1>; /* PA29 periph A with pullup */
313                                         };
314
315                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
316                                                 atmel,pins =
317                                                         <1 3 0x2 0x1    /* PB3 periph B with pullup */
318                                                          1 4 0x2 0x1    /* PB4 periph B with pullup */
319                                                          1 5 0x2 0x1>;  /* PB5 periph B with pullup */
320                                         };
321
322                                         pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
323                                                 atmel,pins =
324                                                         <0 8 0x2 0x1    /* PA8 periph B with pullup */
325                                                          0 9 0x2 0x1>;  /* PA9 periph B with pullup */
326                                         };
327
328                                         pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
329                                                 atmel,pins =
330                                                         <0 10 0x2 0x1   /* PA10 periph B with pullup */
331                                                          0 11 0x2 0x1   /* PA11 periph B with pullup */
332                                                          0 12 0x2 0x1>; /* PA12 periph B with pullup */
333                                         };
334                                 };
335
336                                 ssc0 {
337                                         pinctrl_ssc0_tx: ssc0_tx-0 {
338                                                 atmel,pins =
339                                                         <1 0 0x1 0x0    /* PB0 periph A */
340                                                          1 1 0x1 0x0    /* PB1 periph A */
341                                                          1 2 0x1 0x0>;  /* PB2 periph A */
342                                         };
343
344                                         pinctrl_ssc0_rx: ssc0_rx-0 {
345                                                 atmel,pins =
346                                                         <1 3 0x1 0x0    /* PB3 periph A */
347                                                          1 4 0x1 0x0    /* PB4 periph A */
348                                                          1 5 0x1 0x0>;  /* PB5 periph A */
349                                         };
350                                 };
351
352                                 ssc1 {
353                                         pinctrl_ssc1_tx: ssc1_tx-0 {
354                                                 atmel,pins =
355                                                         <1 6 0x1 0x0    /* PB6 periph A */
356                                                          1 7 0x1 0x0    /* PB7 periph A */
357                                                          1 8 0x1 0x0>;  /* PB8 periph A */
358                                         };
359
360                                         pinctrl_ssc1_rx: ssc1_rx-0 {
361                                                 atmel,pins =
362                                                         <1 9 0x1 0x0    /* PB9 periph A */
363                                                          1 10 0x1 0x0   /* PB10 periph A */
364                                                          1 11 0x1 0x0>; /* PB11 periph A */
365                                         };
366                                 };
367
368                                 ssc2 {
369                                         pinctrl_ssc2_tx: ssc2_tx-0 {
370                                                 atmel,pins =
371                                                         <1 12 0x1 0x0   /* PB12 periph A */
372                                                          1 13 0x1 0x0   /* PB13 periph A */
373                                                          1 14 0x1 0x0>; /* PB14 periph A */
374                                         };
375
376                                         pinctrl_ssc2_rx: ssc2_rx-0 {
377                                                 atmel,pins =
378                                                         <1 15 0x1 0x0   /* PB15 periph A */
379                                                          1 16 0x1 0x0   /* PB16 periph A */
380                                                          1 17 0x1 0x0>; /* PB17 periph A */
381                                         };
382                                 };
383
384                                 twi {
385                                         pinctrl_twi: twi-0 {
386                                                 atmel,pins =
387                                                         <0 25 0x1 0x2   /* PA25 periph A with multi drive */
388                                                          0 26 0x1 0x2>; /* PA26 periph A with multi drive */
389                                         };
390
391                                         pinctrl_twi_gpio: twi_gpio-0 {
392                                                 atmel,pins =
393                                                         <0 25 0x0 0x2   /* PA25 GPIO with multi drive */
394                                                          0 26 0x0 0x2>; /* PA26 GPIO with multi drive */
395                                         };
396                                 };
397
398                                 pioA: gpio@fffff400 {
399                                         compatible = "atmel,at91rm9200-gpio";
400                                         reg = <0xfffff400 0x200>;
401                                         interrupts = <2 4 1>;
402                                         #gpio-cells = <2>;
403                                         gpio-controller;
404                                         interrupt-controller;
405                                         #interrupt-cells = <2>;
406                                 };
407
408                                 pioB: gpio@fffff600 {
409                                         compatible = "atmel,at91rm9200-gpio";
410                                         reg = <0xfffff600 0x200>;
411                                         interrupts = <3 4 1>;
412                                         #gpio-cells = <2>;
413                                         gpio-controller;
414                                         interrupt-controller;
415                                         #interrupt-cells = <2>;
416                                 };
417
418                                 pioC: gpio@fffff800 {
419                                         compatible = "atmel,at91rm9200-gpio";
420                                         reg = <0xfffff800 0x200>;
421                                         interrupts = <4 4 1>;
422                                         #gpio-cells = <2>;
423                                         gpio-controller;
424                                         interrupt-controller;
425                                         #interrupt-cells = <2>;
426                                 };
427
428                                 pioD: gpio@fffffa00 {
429                                         compatible = "atmel,at91rm9200-gpio";
430                                         reg = <0xfffffa00 0x200>;
431                                         interrupts = <5 4 1>;
432                                         #gpio-cells = <2>;
433                                         gpio-controller;
434                                         interrupt-controller;
435                                         #interrupt-cells = <2>;
436                                 };
437                         };
438
439                         dbgu: serial@fffff200 {
440                                 compatible = "atmel,at91rm9200-usart";
441                                 reg = <0xfffff200 0x200>;
442                                 interrupts = <1 4 7>;
443                                 pinctrl-names = "default";
444                                 pinctrl-0 = <&pinctrl_dbgu>;
445                                 status = "disabled";
446                         };
447
448                         usart0: serial@fffc0000 {
449                                 compatible = "atmel,at91rm9200-usart";
450                                 reg = <0xfffc0000 0x200>;
451                                 interrupts = <6 4 5>;
452                                 atmel,use-dma-rx;
453                                 atmel,use-dma-tx;
454                                 pinctrl-names = "default";
455                                 pinctrl-0 = <&pinctrl_uart0>;
456                                 status = "disabled";
457                         };
458
459                         usart1: serial@fffc4000 {
460                                 compatible = "atmel,at91rm9200-usart";
461                                 reg = <0xfffc4000 0x200>;
462                                 interrupts = <7 4 5>;
463                                 atmel,use-dma-rx;
464                                 atmel,use-dma-tx;
465                                 pinctrl-names = "default";
466                                 pinctrl-0 = <&pinctrl_uart1>;
467                                 status = "disabled";
468                         };
469
470                         usart2: serial@fffc8000 {
471                                 compatible = "atmel,at91rm9200-usart";
472                                 reg = <0xfffc8000 0x200>;
473                                 interrupts = <8 4 5>;
474                                 atmel,use-dma-rx;
475                                 atmel,use-dma-tx;
476                                 pinctrl-names = "default";
477                                 pinctrl-0 = <&pinctrl_uart2>;
478                                 status = "disabled";
479                         };
480
481                         usart3: serial@fffcc000 {
482                                 compatible = "atmel,at91rm9200-usart";
483                                 reg = <0xfffcc000 0x200>;
484                                 interrupts = <23 4 5>;
485                                 atmel,use-dma-rx;
486                                 atmel,use-dma-tx;
487                                 pinctrl-names = "default";
488                                 pinctrl-0 = <&pinctrl_uart3>;
489                                 status = "disabled";
490                         };
491
492                         usb1: gadget@fffb0000 {
493                                 compatible = "atmel,at91rm9200-udc";
494                                 reg = <0xfffb0000 0x4000>;
495                                 interrupts = <11 4 2>;
496                                 status = "disabled";
497                         };
498                 };
499
500                 nand0: nand@40000000 {
501                         compatible = "atmel,at91rm9200-nand";
502                         #address-cells = <1>;
503                         #size-cells = <1>;
504                         reg = <0x40000000 0x10000000>;
505                         atmel,nand-addr-offset = <21>;
506                         atmel,nand-cmd-offset = <22>;
507                         pinctrl-names = "default";
508                         pinctrl-0 = <&pinctrl_nand>;
509                         nand-ecc-mode = "soft";
510                         gpios = <&pioC 2 0
511                                  0
512                                  &pioB 1 0
513                                 >;
514                         status = "disabled";
515                 };
516
517                 usb0: ohci@00300000 {
518                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
519                         reg = <0x00300000 0x100000>;
520                         interrupts = <23 4 2>;
521                         status = "disabled";
522                 };
523         };
524
525         i2c@0 {
526                 compatible = "i2c-gpio";
527                 gpios = <&pioA 25 0 /* sda */
528                          &pioA 26 0 /* scl */
529                         >;
530                 i2c-gpio,sda-open-drain;
531                 i2c-gpio,scl-open-drain;
532                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
533                 pinctrl-names = "default";
534                 pinctrl-0 = <&pinctrl_twi_gpio>;
535                 #address-cells = <1>;
536                 #size-cells = <0>;
537                 status = "disabled";
538         };
539 };