Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt

   1 ROCKCHIP USB2 PHY
   2
   3 Required properties:
   4  - compatible: matching the soc type, one of
   5      "rockchip,rk3066a-usb-phy"
   6      "rockchip,rk3188-usb-phy"
   7      "rockchip,rk3288-usb-phy"
   8      "rockchip,rk336x-usb-phy"
   9      "rockchip,rk3399-usb-phy"
  10  - rockchip,grf : phandle to the syscon managing the "general
  11    register files"
  12  - #address-cells: should be 1
  13  - #size-cells: should be 0
  14
  15 Sub-nodes:
  16 Each PHY should be represented as a sub-node.
  17
  18 Sub-nodes
  19 required properties:
  20 - #phy-cells: should be 0
  21 - reg: PHY configure reg address offset in GRF
  22                 "0x320" - for PHY attach to OTG controller
  23                 "0x334" - for PHY attach to HOST0 controller
  24                 "0x348" - for PHY attach to HOST1 controller
  25
  26 Optional Properties:
  27 - clocks : phandle + clock specifier for the phy clocks
  28 - clock-names: string, clock name, must be "phyclk"
  29 - host_drv_gpio: vbus-drv gpio, pull gpio on/off to
  30   control vbus supply.
  31 - #clock-cells: for users of the phy-pll, should be 0
  32
  33 Example:
  34
  35 usbphy: phy {
  36         compatible = "rockchip,rk3288-usb-phy";
  37         rockchip,grf = <&grf>;
  38         #address-cells = <1>;
  39         #size-cells = <0>;
  40
  41         usbphy0: usb-phy0 {
  42                 #phy-cells = <0>;
  43                 reg = <0x320>;
  44         };
  45 };