Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt

   1 * Rockchip specific extensions to the Synopsys Designware Mobile
   2   Storage Host Controller
   3
   4 The Synopsys designware mobile storage host controller is used to interface
   5 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
   6 differences between the core Synopsys dw mshc controller properties described
   7 by synopsys-dw-mshc.txt and the properties used by the Rockchip specific
   8 extensions to the Synopsys Designware Mobile Storage Host Controller.
   9
  10 Required Properties:
  11
  12 * compatible: should be
  13     - "rockchip,rk_mmc": for controllers compliant with Rockchip sdmmc.
  14     - "rockchip,rk3188-sdmmc": for Rockchip RK3188 and following
  15     - "rockchip,rk3288-sdmmc": for Rockchip RK3288 and following
  16 * pinctrl-0: Should specify pin control groups used for this controller.
  17 * pinctrl-names: The corresponding state of the various definitions ,such as "default","idle".
  18 * clocks: Clock IDs array as required by the controller.
  19 * clock-names: names of clock correseponding IDs clock property as requested by the controller driver.
  20
  21 * num-slots:
  22         specifies the number of slots supported by the controller.
  23     The number of physical slots actually used could be equal or less than the
  24     value specified by num-slots. If this property is not specified, the value
  25     of num-slot property is assumed to be 1.
  26
  27 * fifo-depth: The maximum size of the tx/rx fifo's. If this property is not
  28     specified, the default value of the fifo size is determined from the
  29     controller registers.
  30
  31 * bus-width: as documented in mmc core bindings.
  32
  33 * wp-gpios: specifies the write protect gpio line. The format of the
  34           gpio specifier depends on the gpio controller. If a GPIO is not used
  35           for write-protect, this property is optional.
  36
  37 * disable-wp: If the wp-gpios property isn't present then (by default)
  38           we'd assume that the write protect is hooked up directly to the
  39           controller's special purpose write protect line (accessible via
  40           the WRTPRT register).  However, it's possible that we simply don't
  41           want write protect.  In that case specify 'disable-wp'.
  42           NOTE: This property is not required for slots known to always
  43           connect to eMMC or SDIO cards.
  44
  45 * clock-frequency:
  46         Stable clk freq for data transfer
  47
  48 * clock-freq-min-max:
  49     Host issue slave devices for timing supportted ranges from this clk gap
  50
  51 * supports-highspeed:
  52         Indicate if this controller support highspeed mode or not
  53
  54 * supports-emmc:
  55         Indicate this controller works as emmc
  56
  57 * supports-sd:
  58         Indicate this controller works as sd/mmc card
  59
  60 * supports-sdio:
  61         Indicate this controller works as sdio function(card)
  62
  63 * ignore-pm-notify:
  64         Indicate this controller will ignore pm notify
  65
  66 * keep-power-in-suspend:
  67         Indicate this controller should keep power in system suspend
  68
  69 * broken-cd:
  70         For SD/MMC card, detect card insert/remove with controller's register flag
  71
  72 * card-detect-delay:
  73         For SD/MMC card insert/remove debounce time
  74
  75
  76 * caps2-mmc-hs200-1_8v: Supports mmc HS200 SDR 1.8V mode
  77
  78 * caps2-mmc-hs200-1_2v: Supports mmc HS200 SDR 1.2V mode
  79
  80 * broken-cd: as documented in mmc core bindings.
  81
  82 * vmmc-supply: The phandle to the regulator to use for vmmc.  If this is
  83           specified we'll defer probe until we can find this regulator.
  84
  85 * poll-hw-reset: need hardware reset for some eMMCs with VCCQ always supplied when powered up
  86         to enter idle state.
  87
  88 Example: adding device info in dtsi file
  89
  90         emmc: rksdmmc@ff0f0000 {
  91                 compatible = "rockchip,rk_mmc","rockchip,rk32xx-sdmmc";
  92                 device_type = "emmc";
  93                 reg = <0xff0f0000 0x4000>;
  94                 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;/*irq=67*/
  95                 #address-cells = <1>;
  96                 #size-cells = <0>;
  97                 //pinctrl-names = "default",,"suspend";
  98                 //pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_wp &sd0_pwr &sd0_bus1 &sd0_bus4>;
  99                 clocks = <&clk_emmc>, <&clk_gates8 6>;
 100                 clock-names = "clk_mmc", "hclk_mmc";
 101                 num-slots = <1>;
 102                 fifo-depth = <0x100>;
 103                 bus-width = <8>;
 104         };
 105
 106         sdmmc: rksdmmc@ff0c0000 {
 107                 compatible = "rockchip,rk_mmc","rockchip,rk32xx-sdmmc";
 108                 device_type = "sdmmc";
 109                 reg = <0xff0c0000 0x4000>;
 110                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; /*irq=64*/
 111                 #address-cells = <1>;
 112                 #size-cells = <0>;
 113                 pinctrl-names = "default","idle";
 114                 pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
 115                 pinctrl-1 = <&sdmmc0_gpio>;
 116                 clocks = <&clk_sdmmc>, <&clk_gates8 3>;
 117                 clock-names = "clk_mmc", "hclk_mmc";
 118                 num-slots = <1>;
 119                 fifo-depth = <0x100>;
 120                 bus-width = <4>;
 121
 122         };
 123
 124         sdio: rksdmmc@ff0d0000 {
 125                 compatible = "rockchip,rk_mmc","rockchip,rk32xx-sdmmc";
 126                 device_type = "sdio";
 127                 reg = <0xff0d0000 0x4000>;
 128                 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 129                 #address-cells = <1>;
 130                 #size-cells = <0>;
 131                 pinctrl-names = "default","idle";
 132                 pinctrl-0 = <&sdio0_clk &sdio0_cmd &sdio0_dectn  &sdio0_wrprt &sdio0_pwr &sdio0_bkpwr
 133                                          &sdio0_intn &sdio0_bus4>;
 134                 pinctrl-1 = <&sdio0_gpio>;
 135                 clocks = <&clk_sdio0>, <&clk_gates8 4>;
 136                 clock-names = "clk_mmc", "hclk_mmc";
 137                 num-slots = <1>;
 138                 fifo-depth = <0x100>;
 139                 bus-width = <4>;
 140         };
 141
 142     sdio1: rksdmmc@ff0e0000 {
 143                 compatible = "rockchip,rk_mmc","rockchip,rk32xx-sdmmc";
 144         device_type = "sdio";
 145                 reg = <0xff0e0000 0x4000>;
 146         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 147         #address-cells = <1>;
 148         #size-cells = <0>;
 149         //pinctrl-names = "default","suspend";
 150         //pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_wp &sd1_bus1 &sd1_bus4>;
 151         /*gate8_0 --hclk_sdmmc_ahb_arbi_gate_en, gate13_2 --clk_sdio1_src_gate_en*/
 152         clocks = <&clk_sdio1>, <&clk_gates8 5>;
 153         clock-names = "clk_mmc", "hclk_mmc";
 154         num-slots = <1>;
 155         fifo-depth = <0x100>;
 156         bus-width = <4>;
 157                 status = "disabled";
 158         };
 159
 160
 161
 162  Example: Adding child nodes in dts file
 163
 164         &emmc {
 165                 clock-frequency = <200000000>;
 166                 clock-freq-min-max = <400000 200000000>;
 167                 supports-highspeed;
 168                 supports-emmc;
 169                 bootpart-no-access;
 170                 ignore-pm-notify;
 171                 keep-power-in-suspend;
 172                 status = "okay";
 173         };
 174
 175         &sdmmc {
 176                 clock-frequency = <50000000>;
 177                 lock-freq-min-max = <400000 50000000>;
 178                 supports-highspeed;
 179                 supports-sd;
 180                 broken-cd;
 181                 card-detect-delay = <200>;
 182                 vmmc-supply = <&rk808_ldo5_reg>;
 183                 status = "okay";
 184         };
 185
 186         &sdio {
 187                 clock-frequency = <50000000>;
 188                 clock-freq-min-max = <200000 50000000>;
 189                 supports-highspeed;
 190                 supports-sdio;
 191                 ignore-pm-notify;
 192                 keep-power-in-suspend;
 193                 //cap-sdio-irq;
 194                 status = "okay";
 195         };
 196