fix up a bug in multicore RAW interruption version codes
[IRC.git] / Robust / src / Runtime / raw_interrupt.s
1 #include <raw_asm.h>
2
3 .text
4         .align  2
5         .globl  setup_ints
6         .ent    setup_ints
7 setup_ints:     
8         # set up dynamic network
9         uintoff
10         intoff
11
12         # set gdn_cfg
13         xor $8,$8,$8
14         aui $8,$8,(3<<11)|(0 <<6)|(0 <<1)
15         ori $8, (0 <<12)|(2<<9)
16         mtsr    GDN_CFG,$8
17 #       mtsr    PASS,$8
18
19         # set exception vector
20     la $3, interrupt_table
21 #       mtsri PASS, 0xaaa
22 #       mtsr PASS, $3
23     mtsr EX_BASE_ADDR, $3
24
25         # set EX_MASK
26         mfsr    $8,EX_MASK
27         ori     $8,$8,0x20          # 1 << kVEC_GDN_AVAIL
28         mtsr    EX_MASK,$8
29
30         inton
31         uinton
32         jr $31
33         .end    setup_ints
34
35 .macro empty_vec fail_code
36         mtsri FAIL, \fail_code
37 1:      b 1b
38         nop
39         nop
40 .endm
41
42 interrupt_table:
43
44 vec_gdn_refill:
45         empty_vec 0x2300
46 vec_gdn_complete:
47         empty_vec 0x2301
48 vec_trace:
49         empty_vec 0x2302
50 vec_extern:
51         empty_vec 0x2303
52 vec_timer:
53         empty_vec 0x2304
54 vec_gdn_avail:
55         mtsri PASS, 0xef00
56         uintoff
57
58         addiu   $sp,$sp,-64
59         sw      $31,0x3c($sp)
60         sw      $30,0x38($sp)
61         sw      $23,0x34($sp)
62         sw      $22,0x30($sp)
63         sw      $21,0x2c($sp)
64         sw      $20,0x28($sp)
65         sw      $19,0x24($sp)
66         sw      $18,0x20($sp)
67         sw      $17,0x1c($sp)
68         sw      $16,0x18($sp)
69         sw      $7,0x14($sp)
70         sw      $6,0x10($sp)
71         sw      $5,0xc($sp)
72         sw      $4,0x8($sp)
73         sw      $3,0x4($sp)
74         sw      $2,0x0($sp)
75
76         jal receiveObject
77
78         lw      $31,0x3c($sp)
79         lw      $30,0x38($sp)
80         lw      $23,0x34($sp)
81         lw      $22,0x30($sp)
82         lw      $21,0x2c($sp)
83         lw      $20,0x28($sp)
84         lw      $19,0x24($sp)
85         lw      $18,0x20($sp)
86         lw      $17,0x1c($sp)
87         lw      $16,0x18($sp)
88         lw      $7,0x14($sp)
89         lw      $6,0x10($sp)
90         lw      $5,0xc($sp)
91         lw      $4,0x8($sp)
92         lw      $3,0x4($sp)
93         lw      $2,0x0($sp)
94         addiu   $sp,$sp,64
95
96         mtsri PASS, 0xefff
97         dret
98 vec_event_counters:
99         empty_vec 0x2306