Programming Languages Research Group: Git

2015-02-13	Andrea Di Biagio	[CodeGenPrepare] Removed duplicate logic. SimplifyCFG...	commit \| commitdiff \| tree
2015-02-12	Andrea Di Biagio	[TTI] Teach the cost heuristic how to query TLI to...	commit \| commitdiff \| tree
2015-02-11	Andrea Di Biagio	[TTI] Improved cost heuristic for cttz/ctlz calls.	commit \| commitdiff \| tree
2015-02-10	Andrea Di Biagio	[X86][FastIsel] Avoid introducing legacy SSE instructions...	commit \| commitdiff \| tree
2015-02-07	Andrea Di Biagio	Fix typos; NFC.	commit \| commitdiff \| tree
2015-01-27	Andrea Di Biagio	[InstCombine] Teach how to fold a select into a cttz...	commit \| commitdiff \| tree
2015-01-24	Andrea Di Biagio	[DAG] Fix wrong canonicalization performed on shuffle...	commit \| commitdiff \| tree
2015-01-16	Andrea Di Biagio	[X86][DAG] Disable target specific combine on INSERTPS...	commit \| commitdiff \| tree
2015-01-06	Andrea Di Biagio	[CodeGenPrepare] Improved logic to speculate calls...	commit \| commitdiff \| tree
2015-01-02	Andrea Di Biagio	Improved comments. No functional change intended.	commit \| commitdiff \| tree
2014-12-28	Andrea Di Biagio	[CodeGenPrepare] Teach when it is profitable to speculate...	commit \| commitdiff \| tree
2014-12-12	Andrea Di Biagio	Reapply "[MachineScheduler] Fix for PR21807: minor...	commit \| commitdiff \| tree
2014-12-12	Andrea Di Biagio	Revert: [MachineScheduler] Fix for PR21807: minor code...	commit \| commitdiff \| tree
2014-12-12	Andrea Di Biagio	[MachineScheduler] Fix for PR21807: minor code difference...	commit \| commitdiff \| tree
2014-12-11	Andrea Di Biagio	[InstCombine][X86] Improved folding of calls to Intrinsic...	commit \| commitdiff \| tree
2014-12-08	Andrea Di Biagio	[X86] Improved tablegen patters for matching TZCNT...	commit \| commitdiff \| tree
2014-12-08	Andrea Di Biagio	[X86] Improved lowering of packed v8i16 vector shifts...	commit \| commitdiff \| tree
2014-12-05	Andrea Di Biagio	[X86] Improved lowering of packed vector shifts to...	commit \| commitdiff \| tree
2014-12-05	Andrea Di Biagio	[X86] Avoid introducing extra shuffles when lowering...	commit \| commitdiff \| tree
2014-12-04	Andrea Di Biagio	[X86] Simplify code. NFC.	commit \| commitdiff \| tree
2014-11-24	Andrea Di Biagio	[X86] Improved target specific combine on VSELECT dag...	commit \| commitdiff \| tree
2014-11-21	Andrea Di Biagio	[DAG] Teach how to turn a build_vector into a shuffle...	commit \| commitdiff \| tree
2014-11-21	Andrea Di Biagio	[DAG] Refactor the shuffle combining logic in DAGCombiner...	commit \| commitdiff \| tree
2014-11-19	Andrea Di Biagio	[X86] Improved lowering of v4x32 build_vector dag nodes.	commit \| commitdiff \| tree
2014-11-15	Andrea Di Biagio	[DAG] Improved target independent vector shuffle folding...	commit \| commitdiff \| tree
2014-11-11	Andrea Di Biagio	[X86] Add missing check for 'isINSERTPSMask' in method...	commit \| commitdiff \| tree
2014-11-06	Andrea Di Biagio	[X86] When commuting SSE immediate blend, make sure...	commit \| commitdiff \| tree
2014-11-05	Andrea Di Biagio	[X86] Teach method 'isVectorClearMaskLegal' how to...	commit \| commitdiff \| tree
2014-11-04	Andrea Di Biagio	[X86] Add 'FeatureSlowSHLD' to cpu 'bdver3'. Also explicit...	commit \| commitdiff \| tree
2014-10-17	Andrea Di Biagio	[X86] Fix missed selection of non-temporal store of...	commit \| commitdiff \| tree
2014-10-09	Andrea Di Biagio	[InstCombine] Fix wrong folding of constant comparisons...	commit \| commitdiff \| tree
2014-09-30	Andrea Di Biagio	[DAG] Check in advance if a build_vector has a legal...	commit \| commitdiff \| tree
2014-09-26	Andrea Di Biagio	[X86][SchedModel] SSE reciprocal square root instruction...	commit \| commitdiff \| tree
2014-09-17	Andrea Di Biagio	[InstCombine] Fix wrong folding of constant comparison...	commit \| commitdiff \| tree
2014-09-02	Andrea Di Biagio	Revert: [APFloat] Fixed a bug in method 'fusedMultiplyAdd'.	commit \| commitdiff \| tree
2014-09-02	Andrea Di Biagio	[APFloat] Fixed a bug in method 'fusedMultiplyAdd'.	commit \| commitdiff \| tree
2014-08-16	Andrea Di Biagio	[DAGCombiner] Improve the folding of target independet...	commit \| commitdiff \| tree
2014-08-13	Andrea Di Biagio	[DAGCombiner] Improved target independent vector shuffle...	commit \| commitdiff \| tree
2014-07-23	Andrea Di Biagio	Revert r211771. It was: "[X86] Improve the selection...	commit \| commitdiff \| tree
2014-07-21	Andrea Di Biagio	[DAGCombiner] Improve the shuffle-vector folding logic.	commit \| commitdiff \| tree
2014-07-21	Andrea Di Biagio	[DAG] Refactor some logic. No functional change.	commit \| commitdiff \| tree
2014-07-19	Andrea Di Biagio	[x86] Fix wrong shuffle mask in test 'combine-vec-shuffle...	commit \| commitdiff \| tree
2014-07-16	Andrea Di Biagio	[X86] Add a check for 'isMOVHLPSMask' within method...	commit \| commitdiff \| tree
2014-07-15	Andrea Di Biagio	[DAGCombiner] Add more rules to fold shuffles.	commit \| commitdiff \| tree
2014-07-15	Andrea Di Biagio	Silence a warning in conditional expression.	commit \| commitdiff \| tree
2014-07-15	Andrea Di Biagio	Improve test 'CodeGen/X86/combine-vec-shuffle-3.ll'.	commit \| commitdiff \| tree
2014-07-15	Andrea Di Biagio	[DAGCombiner] Avoid calling method 'isShuffleMaskLegal...	commit \| commitdiff \| tree
2014-07-14	Andrea Di Biagio	[DAGCombiner] Add more rules to combine shuffle vector...	commit \| commitdiff \| tree
2014-07-13	Andrea Di Biagio	[DAGCombiner] Fix a crash caused by a missing check...	commit \| commitdiff \| tree
2014-07-10	Andrea Di Biagio	Extend the test coverage in combine-vec-shuffle-2.ll...	commit \| commitdiff \| tree
2014-07-10	Andrea Di Biagio	[DAG] Further improve the logic in DAGCombiner that...	commit \| commitdiff \| tree
2014-07-08	Andrea Di Biagio	[DAG] Teach how to combine a pair of shuffles into...	commit \| commitdiff \| tree
2014-07-07	Andrea Di Biagio	[x86] Fix assertion failure caused by a wrong combine...	commit \| commitdiff \| tree
2014-07-03	Andrea Di Biagio	[CostModel][x86] Improved cost model for alternate...	commit \| commitdiff \| tree
2014-07-03	Andrea Di Biagio	[X86] Add ISel patterns to select 'f32_to_f16' and...	commit \| commitdiff \| tree
2014-06-30	Andrea Di Biagio	[X86] Add support for builtin to read performance monitoring...	commit \| commitdiff \| tree
2014-06-26	Andrea Di Biagio	Silence a warning due to a comparison between signed...	commit \| commitdiff \| tree
2014-06-26	Andrea Di Biagio	[X86] Improve the selection of SSE3/AVX addsub instructions.	commit \| commitdiff \| tree
2014-06-25	Andrea Di Biagio	[X86] Always prefer to lower a VECTOR_SHUFFLE into...	commit \| commitdiff \| tree
2014-06-25	Andrea Di Biagio	[X86] Add target combine rule to select ADDSUB instructions...	commit \| commitdiff \| tree
2014-06-21	Andrea Di Biagio	[X86] Add ISel patterns to select SSE3/AVX ADDSUB instructions.	commit \| commitdiff \| tree
2014-06-19	Andrea Di Biagio	[X86] Teach how to combine horizontal binop even in...	commit \| commitdiff \| tree
2014-06-12	Andrea Di Biagio	[X86] Teach how to dump the name of target node RDTSCP_DAG.	commit \| commitdiff \| tree
2014-06-12	Andrea Di Biagio	[X86] Teach how to combine AVX and AVX2 horizontal...	commit \| commitdiff \| tree
2014-06-11	Andrea Di Biagio	[X86] Refactor the logic to select horizontal adds...	commit \| commitdiff \| tree
2014-06-10	Andrea Di Biagio	[X86] Improved target combine rules for selecting horizontal...	commit \| commitdiff \| tree
2014-06-09	Andrea Di Biagio	[X86] Add target combine rules for horizontal add/sub.	commit \| commitdiff \| tree
2014-06-09	Andrea Di Biagio	[X86] Avoid emitting unnecessary test instructions.	commit \| commitdiff \| tree
2014-06-09	Andrea Di Biagio	[DAG] Expose NoSignedWrap, NoUnsignedWrap and Exact...	commit \| commitdiff \| tree
2014-06-02	Andrea Di Biagio	[X86] Fix checked arithmetic for i8 on X86.	commit \| commitdiff \| tree
2014-05-30	Andrea Di Biagio	[X86] Add two combine rules to simplify dag nodes introduced...	commit \| commitdiff \| tree
2014-05-22	Andrea Di Biagio	[X86] Improve the lowering of BITCAST from MVT::f64...	commit \| commitdiff \| tree
2014-05-19	Andrea Di Biagio	[X86] Add ISel patterns to improve the selection of...	commit \| commitdiff \| tree
2014-05-15	Andrea Di Biagio	[X86] Teach the backend how to fold SSE4.1/AVX/AVX2...	commit \| commitdiff \| tree
2014-05-09	Andrea Di Biagio	Fix 80 col violation.	commit \| commitdiff \| tree
2014-05-08	Andrea Di Biagio	[X86] Add target specific combine rules to fold SSE2...	commit \| commitdiff \| tree
2014-05-06	Andrea Di Biagio	[X86] Improve the lowering of BITCAST dag nodes from...	commit \| commitdiff \| tree
2014-04-29	Andrea Di Biagio	[Windows] Fix assertion failure when passing 'nul'...	commit \| commitdiff \| tree
2014-04-26	Andrea Di Biagio	[InstCombine][X86] Teach how to fold calls to SSE2...	commit \| commitdiff \| tree
2014-04-24	Andrea Di Biagio	[X86] Add support for Read Time Stamp Counter x86 builtin...	commit \| commitdiff \| tree
2014-04-15	Andrea Di Biagio	[X86] Improve the lowering of packed shifts by constant...	commit \| commitdiff \| tree
2014-03-22	Andrea Di Biagio	[DAG] Fix an assertion failure caused by an invalid...	commit \| commitdiff \| tree
2014-03-18	Andrea Di Biagio	[DAGCombiner] teach how to simplify xor/and/or nodes...	commit \| commitdiff \| tree
2014-03-06	Andrea Di Biagio	[X86] Teach the DAGCombiner how to fold a OR of two...	commit \| commitdiff \| tree
2014-02-12	Andrea Di Biagio	[Vectorizer] Add a new 'OperandValueKind' in TargetTransform...	commit \| commitdiff \| tree
2014-02-12	Andrea Di Biagio	[X86] Teach the backend how to lower vector shift left...	commit \| commitdiff \| tree
2014-01-28	Andrea Di Biagio	[X86] Add extra rules for combining vselect dag nodes...	commit \| commitdiff \| tree
2014-01-28	Andrea Di Biagio	[DAGCombiner] Avoid introducing an illegal build_vector...	commit \| commitdiff \| tree
2014-01-27	Andrea Di Biagio	[DAGCombiner] Teach how to fold sext/aext/zext of constant...	commit \| commitdiff \| tree
2014-01-20	Andrea Di Biagio	[X86] Teach how to combine a vselect into a movss/movsd	commit \| commitdiff \| tree
2014-01-15	Andrea Di Biagio	Update test/CodeGen/X86/vbinop-simplify-bug.ll.	commit \| commitdiff \| tree
2014-01-15	Andrea Di Biagio	[DAGCombiner] Fix a wrong check in method SimplifyVBinOp.	commit \| commitdiff \| tree
2014-01-14	Andrea Di Biagio	[X86] Fix assertion failure caused by a wrong folding...	commit \| commitdiff \| tree
2014-01-13	Andrea Di Biagio	[AArch64] Fix assertion failure caused by an invalid...	commit \| commitdiff \| tree
2014-01-08	Andrea Di Biagio	Teach the DAGCombiner how to fold 'vselect' dag nodes...	commit \| commitdiff \| tree
2013-12-28	Andrea Di Biagio	[X86] Teach the backend how to fold target specific...	commit \| commitdiff \| tree
2013-12-27	Andrea Di Biagio	Teach DAGCombiner how to fold a SIGN_EXTEND_INREG of...	commit \| commitdiff \| tree
2013-12-12	Andrea Di Biagio	Added new X86 patterns to select SSE scalar fp arithmetic...	commit \| commitdiff \| tree
2013-12-10	Andrea Di Biagio	Ensure that the backend no longer emits unnecessary...	commit \| commitdiff \| tree
2013-10-17	Andrea Di Biagio	Fix edge condition in DAGCombiner to improve codegen...	commit \| commitdiff \| tree
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