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R600: Simplify stream outputs intrinsic
2013-01-23 Tom StellardR600: Simplify stream outputs intrinsic
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-23 Tom StellardR600: rework handling of the constants
Tom Stellard:
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-23 Tom StellardR600: Add a CONST_ADDRESS node to model constant buf...
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-23 Tom StellardR600: Factorise VTX_WORD0 and VTX_WORD1 in tblgen def
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-21 Tom StellardR600/SI: Use unnormalized coordinates for sampling...
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-21 Tom StellardR600/SI: Take target parameter for sample intrinsics.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-21 Tom StellardR600/SI: Derive all sample intrinsics from a single...
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-18 Tom StellardR600: Proper insert S_WAITCNT instructions
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-18 Tom StellardR600: Optimize and cleanup KILL on SI
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-02 Tom StellardDAGCombiner: Avoid generating illegal vector INT_TO_FP...
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2012-12-21 Tom StellardR600: Coding style - remove empty spaces from the beginning...
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2012-12-21 Tom StellardR600: Fix MAX_UINT definition
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2012-12-21 Tom StellardR600: Add SHADOWCUBE to TEX_SHADOW pattern
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2012-12-21 Tom StellardR600: Expand vec4 INT <-> FP conversions
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2012-12-19 Tom StellardR600: Add entry in CODE_OWNERS.TXT
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2012-12-19 Tom StellardR600: Remove unecessary VREG alignment.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2012-12-19 Tom StellardR600: control flow optimization
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2012-12-19 Tom StellardR600: New control flow for SI v2
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2012-12-17 Tom StellardR600: enable S_*N2_* instructions
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2012-12-17 Tom StellardR600: BB operand support for SI
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2012-12-17 Tom StellardR600: remove nonsense setPrefLoopAlignment
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2012-12-13 Tom StellardFix warnings with -DNDEBUG
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2012-12-11 Tom StellardAdd R600 backend
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2012-12-10 Tom StellardLegalizeDAG: Allow type promotion of scalar loads
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2012-12-10 Tom StellardLegalizeDAG: Allow type promotion for scalar stores
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2012-09-18 Tom StellardMake MachinePostDominatorTree::DT private
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2012-09-17 Tom StellardAdd a MachinePostDominator pass
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2012-09-06 Tom StellardTablegen: Add OperandWithDefaultOps Operand type
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2012-07-16 Tom StellardRevert "AMDGPU: Add core backend files for R600/SI...
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2012-07-16 Tom StellardRevert "include/llvm: Add R600 Intrinsics v6"
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2012-07-16 Tom StellardRevert "Build script changes for R600/SI Codegen v6"
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2012-07-16 Tom StellardRevert "test/CodeGen/R600: Add some basic tests v6"
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2012-07-16 Tom StellardRevert "Target/AMDGPU/R600KernelParameters.cpp: Fix...
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2012-07-16 Tom StellardRevert "Target/AMDGPU: [CMake] Fix dependencies. 1...
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2012-07-16 Tom StellardRevert "Target/AMDGPU/R600KernelParameters.cpp: Don...
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2012-07-16 Tom StellardRevert "Target/AMDGPU/AMDILIntrinsicInfo.cpp: Use llvm_unrea...
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2012-07-16 Tom StellardRevert "Target/AMDGPU: Fix includes, or msvc build...
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2012-07-16 Tom Stellardtest/CodeGen/R600: Add some basic tests v6
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2012-07-16 Tom StellardBuild script changes for R600/SI Codegen v6
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2012-07-16 Tom Stellardinclude/llvm: Add R600 Intrinsics v6
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2012-07-16 Tom StellardAMDGPU: Add core backend files for R600/SI codegen v6
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2012-07-11 Tom Stellardtest commit
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C/C++ LLVM-based compilers that forbids OOTA behaviors