Programming Languages Research Group: Git

2015-10-28	Matthias Braun	lit/TestRunner.py: Get execdir from test.getExecPath...	commit \| commitdiff \| tree
2015-10-28	Matthias Braun	lit/TestRunner.py: Make parseIntegratedTestScriptCommands...	commit \| commitdiff \| tree
2015-10-22	Matthias Braun	AArch64: Disable the latency heuristic	commit \| commitdiff \| tree
2015-10-22	Matthias Braun	MachineScheduler: Add a way to disable the 'ReduceLatency...	commit \| commitdiff \| tree
2015-10-19	Matthias Braun	Revert "RegisterPressure: allocatable physreg uses...	commit \| commitdiff \| tree
2015-10-17	Matthias Braun	RegisterPressure: Unify the sparse sets in LiveRegsSet...	commit \| commitdiff \| tree
2015-10-17	Matthias Braun	RegisterPressure: allocatable physreg uses are always...	commit \| commitdiff \| tree
2015-10-17	Matthias Braun	RegisterPressure: Remove 0 entries from PressureChange	commit \| commitdiff \| tree
2015-10-17	Matthias Braun	RegisterPressure: Hide non-const iterators of PressureDiff	commit \| commitdiff \| tree
2015-10-17	Matthias Braun	StreamWriter: List basic types instead of derived ones...	commit \| commitdiff \| tree
2015-10-16	Matthias Braun	RegisterPressure: Use range based for, cleanup	commit \| commitdiff \| tree
2015-09-29	Matthias Braun	RegisterPressure: LiveRegSet tracks register units...	commit \| commitdiff \| tree
2015-09-25	Matthias Braun	LivePhysRegs: Fix live-outs of return blocks	commit \| commitdiff \| tree
2015-09-25	Matthias Braun	SelectionDAGDumper: Print simple operands inline.	commit \| commitdiff \| tree
2015-09-25	Matthias Braun	TargetRegisterInfo: Introduce PrintLaneMask.	commit \| commitdiff \| tree
2015-09-25	Matthias Braun	TargetRegisterInfo: Add typedef unsigned LaneBitmask...	commit \| commitdiff \| tree
2015-09-25	Matthias Braun	PrologueEpilogInserter: Fix missing live-ins when savepoint...	commit \| commitdiff \| tree
2015-09-25	Matthias Braun	MachineBasicBlock: Factor out common code into isReturnBlock()	commit \| commitdiff \| tree
2015-09-22	Matthias Braun	LiveIntervalAnalysis: Avoid multiple connected liveness...	commit \| commitdiff \| tree
2015-09-22	Matthias Braun	LiveInterval: Distribute subregister liveranges to...	commit \| commitdiff \| tree
2015-09-22	Matthias Braun	LiveIntervalAnalysis: Factor common code into splitSeparateC...	commit \| commitdiff \| tree
2015-09-22	Matthias Braun	Remove declarations for methods that do not exist.	commit \| commitdiff \| tree
2015-09-21	Matthias Braun	SelectionDAG: Use InsertNode for EntryNode	commit \| commitdiff \| tree
2015-09-18	Matthias Braun	SelectionDAGDumper: Leave out the <multiple use> markers	commit \| commitdiff \| tree
2015-09-18	Matthias Braun	SelectionDAGDumper: Avoid unnecessary newlines	commit \| commitdiff \| tree
2015-09-18	Matthias Braun	SelectionDAGDumper: Hide [ID=X], [ORD=X] and source...	commit \| commitdiff \| tree
2015-09-18	Matthias Braun	SelectionDAG: Introduce PersistentID to SDNode for...	commit \| commitdiff \| tree
2015-09-17	Matthias Braun	Revert "(HEAD -> master, origin/master, origin/HEAD...	commit \| commitdiff \| tree
2015-09-17	Matthias Braun	RegisterPressure: Move LiveInRegs/LiveOutRegs from...	commit \| commitdiff \| tree
2015-09-17	Matthias Braun	MachineScheduler: Provide an option for node hiding...	commit \| commitdiff \| tree
2015-09-14	Matthias Braun	RegisterPressure: constify getRegSetPressureAtPos()	commit \| commitdiff \| tree
2015-09-14	Matthias Braun	RegisterPressure: Simplify close{Top\|Bottom}()	commit \| commitdiff \| tree
2015-09-09	Matthias Braun	Save LaneMask with livein registers	commit \| commitdiff \| tree
2015-09-09	Matthias Braun	VirtRegMap: Improve addMBBLiveIns() using SlotIndex...	commit \| commitdiff \| tree
2015-09-09	Matthias Braun	MachineVerifier: Check that SlotIndex MBBIndexList...	commit \| commitdiff \| tree
2015-08-31	Matthias Braun	AArch64: Fix loads to lower NEON vector lanes using...	commit \| commitdiff \| tree
2015-08-31	Matthias Braun	X86: Fix FastISel SSESelect register class	commit \| commitdiff \| tree
2015-08-26	Matthias Braun	SelectionDAGBuilder: Fix SPDescriptor not resetting...	commit \| commitdiff \| tree
2015-08-26	Matthias Braun	FastISel: Avoid adding a successor block twice for...	commit \| commitdiff \| tree
2015-08-26	Matthias Braun	FastISel: Use finishCondBranch() for ARM,Mips,PowerPC...	commit \| commitdiff \| tree
2015-08-26	Matthias Braun	FastISel: Factor out common code; NFC intended	commit \| commitdiff \| tree
2015-08-25	Matthias Braun	MachineBasicBlock: Use MCPhysReg instead of unsigned...	commit \| commitdiff \| tree
2015-08-25	Matthias Braun	SlotIndexes: Introduce an iterator into the idx2MBBMap.	commit \| commitdiff \| tree
2015-08-25	Matthias Braun	Fix dependencies/shared library build	commit \| commitdiff \| tree
2015-08-24	Matthias Braun	Try to fix buildbots	commit \| commitdiff \| tree
2015-08-24	Matthias Braun	Let's try to fix GNU libstdc++ buildbots	commit \| commitdiff \| tree
2015-08-24	Matthias Braun	MachineBasicBlock: Add liveins() method returning an...	commit \| commitdiff \| tree
2015-08-21	Matthias Braun	AArch64: Fix testcase of r245640	commit \| commitdiff \| tree
2015-08-20	Matthias Braun	AArch64: Fix cmp;ccmp ordering	commit \| commitdiff \| tree
2015-08-20	Matthias Braun	AArch64: Do not create CCMP on multiple users.	commit \| commitdiff \| tree
2015-08-18	Matthias Braun	DAGCombiner: Improve DAGCombiner select normalization	commit \| commitdiff \| tree
2015-08-18	Matthias Braun	DAGCombiner: Optimize SELECTs first before turning...	commit \| commitdiff \| tree
2015-08-18	Matthias Braun	MachineRegisterInfo: Introduce isPhysRegUsed()	commit \| commitdiff \| tree
2015-07-29	Matthias Braun	IR: Implement Value::mergeUseLists() iteratively	commit \| commitdiff \| tree
2015-07-21	Matthias Braun	ARMLoadStoreOpt: Merge subs/adds into LDRD/STRD; Factor...	commit \| commitdiff \| tree
2015-07-21	Matthias Braun	ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2	commit \| commitdiff \| tree
2015-07-20	Matthias Braun	Revert "ARMLoadStoreOptimizer: Create LDRD/STRD on...	commit \| commitdiff \| tree
2015-07-20	Matthias Braun	Revert "ARMLoadStoreOpt: Merge subs/adds into LDRD...	commit \| commitdiff \| tree
2015-07-20	Matthias Braun	Revert "ARM: Use SpecificBumpPtrAllocator to fix leak...	commit \| commitdiff \| tree
2015-07-20	Matthias Braun	AArch64: Restrict macroop fusion heuristics to cyclone.	commit \| commitdiff \| tree
2015-07-20	Matthias Braun	AArch64: Add aditional Cyclone macroop fusion opportunities	commit \| commitdiff \| tree
2015-07-20	Matthias Braun	MachineScheduler: Restrict macroop fusion to data-dependent...	commit \| commitdiff \| tree
2015-07-17	Matthias Braun	ARM: Enable MachineScheduler and disable PostRAScheduler...	commit \| commitdiff \| tree
2015-07-17	Matthias Braun	ARM: Add scheduling information for LDRLIT instructions...	commit \| commitdiff \| tree
2015-07-17	Matthias Braun	Use llvm_unreachable() instead of report_fatal_error...	commit \| commitdiff \| tree
2015-07-17	Matthias Braun	ARM: Enable MachineScheduler and disable PostRAScheduler...	commit \| commitdiff \| tree
2015-07-16	Matthias Braun	Arm: Don't define a label twice with two setjmps in...	commit \| commitdiff \| tree
2015-07-16	Matthias Braun	Fix __builtin_setjmp in combination with sjlj exception...	commit \| commitdiff \| tree
2015-07-16	Matthias Braun	MachineInstr: Explain the subtle semantics of uses...	commit \| commitdiff \| tree
2015-07-16	Matthias Braun	AArch64: Implement conditional compare sequence matching.	commit \| commitdiff \| tree
2015-07-16	Matthias Braun	LiveInterval: Document and enforce rules about empty...	commit \| commitdiff \| tree
2015-07-16	Matthias Braun	Do not duplicate method name in comment, remove duplicate...	commit \| commitdiff \| tree
2015-07-15	Matthias Braun	TargetRegisterInfo: Provide a way to check assigned...	commit \| commitdiff \| tree
2015-07-14	Matthias Braun	MachineRegisterInfo: Remove UsedPhysReg infrastructure	commit \| commitdiff \| tree
2015-07-14	Matthias Braun	RAGreedy: Keep track of allocated PhysRegs internally	commit \| commitdiff \| tree
2015-07-14	Matthias Braun	PrologEpilogInserter: Rewrite API to determine callee...	commit \| commitdiff \| tree
2015-07-14	Matthias Braun	Revert "LegalizeDAG: Fix and improve FCOPYSIGN/FABS...	commit \| commitdiff \| tree
2015-07-14	Matthias Braun	LegalizeDAG: Fix and improve FCOPYSIGN/FABS legalization	commit \| commitdiff \| tree
2015-07-14	Matthias Braun	X86: Check output of x86 copysignl testcase.	commit \| commitdiff \| tree
2015-07-10	Matthias Braun	ARM: Use SpecificBumpPtrAllocator to fix leak introduced...	commit \| commitdiff \| tree
2015-07-10	Matthias Braun	ARMLoadStoreOpt: Merge subs/adds into LDRD/STRD; Factor...	commit \| commitdiff \| tree
2015-07-10	Matthias Braun	ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2	commit \| commitdiff \| tree
2015-07-10	Matthias Braun	ARMLoadStoreOptimizer: Rewrite LDM/STM matching logic.	commit \| commitdiff \| tree
2015-07-08	Matthias Braun	RegisterPressure: Add PressureDiff::dump()	commit \| commitdiff \| tree
2015-07-01	Matthias Braun	Test for specific output in lit test	commit \| commitdiff \| tree
2015-07-01	Matthias Braun	LivePhysRegs: Add support to add pristine registers...	commit \| commitdiff \| tree
2015-06-30	Matthias Braun	RegisterCoalescer: Cleanup empty subranges after shrinkToUses()	commit \| commitdiff \| tree
2015-06-29	Matthias Braun	X86: Rework inline asm integer register specification.	commit \| commitdiff \| tree
2015-06-26	Matthias Braun	Revert "X86: Reject register operands with obvious...	commit \| commitdiff \| tree
2015-06-26	Matthias Braun	Fix mismatched architectures in test	commit \| commitdiff \| tree
2015-06-26	Matthias Braun	aad/fix labels in test/CodeGen/X86/StackColoring.ll	commit \| commitdiff \| tree
2015-06-24	Matthias Braun	Revert "(HEAD -> master, origin/master, origin/HEAD...	commit \| commitdiff \| tree
2015-06-24	Matthias Braun	opt: Add option to strip or add llvm value names	commit \| commitdiff \| tree
2015-06-24	Matthias Braun	ARMLoadStoreOptimizer: Fix errata 602117 handling and...	commit \| commitdiff \| tree
2015-06-17	Matthias Braun	Revert "AArch64: Use CMP;CCMP sequences for and/or...	commit \| commitdiff \| tree
2015-06-16	Matthias Braun	VirtRegMap: Add undef flag when reading undefined subregisters.	commit \| commitdiff \| tree
2015-06-16	Matthias Braun	TargetRegisterInfo: Make the concept of imprecise lane...	commit \| commitdiff \| tree
2015-06-13	Matthias Braun	Rename TargetSubtargetInfo::enablePostMachineScheduler...	commit \| commitdiff \| tree
2015-06-13	Matthias Braun	MachineLICM: Use TargetSchedModel instead of just itineraries	commit \| commitdiff \| tree
2015-06-08	Matthias Braun	X86: Reject register operands with obvious type mismatches.	commit \| commitdiff \| tree
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