Explicitly zero out parts of a vector which are required to be zero by the algorithm in LowerUINT_TO_FP_i32.  This only has a substantial effect on the generated code when the input is extracted from a vector register; other ways of loading an i32 do the appropriate zeroing implicitly.  Fixes PR10802.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138768 91177308-0d34-0410-b5e6-96231b3b80d8

Tidy up. Whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138767 91177308-0d34-0410-b5e6-96231b3b80d8

Apply the same fix for the change in LDR_PRE_IMM/LDRB_PRE_IMM operand encodings to the load-store optimizer that I applied to the instruction selector in r138758.  Fixes ary3 from the nightly test suite.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138766 91177308-0d34-0410-b5e6-96231b3b80d8

Fix grammar, noticed by Duncan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138764 91177308-0d34-0410-b5e6-96231b3b80d8

Specify an additional fixed bit in the PLD/PLDW/PLI register-register encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138760 91177308-0d34-0410-b5e6-96231b3b80d8

Update tests to new EH model. Add landingpad instructions to landing pads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138759 91177308-0d34-0410-b5e6-96231b3b80d8

addrmode_imm12 and addrmode2_offset encode their immediate values differently.  Update the manual instruction selection code that was encoding them the addrmode2 way even though LDR_PRE_IMM/LDRB_PRE_IMM had switched to addrmode_imm12.  Should fix a number of nightly test failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138758 91177308-0d34-0410-b5e6-96231b3b80d8

Fixes following the CR by Chris and Duncan:

Optimize chained bitcasts of the form A->B->A.
Undo r138722 and change isEliminableCastPair to allow this case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138756 91177308-0d34-0410-b5e6-96231b3b80d8

Improve handling of #-0 offsets for many more pre-indexed addressing modes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138754 91177308-0d34-0410-b5e6-96231b3b80d8

Initialize CompactUnwindSection so that other targets won't use an uninitialized value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138752 91177308-0d34-0410-b5e6-96231b3b80d8

Expand ATOMIC_LOAD and ATOMIC_STORE for architectures I don't know well enough to fix properly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138751 91177308-0d34-0410-b5e6-96231b3b80d8

Tidy up. 80 columns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138750 91177308-0d34-0410-b5e6-96231b3b80d8

Dump with dbgs() instead of printf.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138749 91177308-0d34-0410-b5e6-96231b3b80d8

Make GCC happy by adding parens.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138748 91177308-0d34-0410-b5e6-96231b3b80d8

Add testcase for r138746.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138747 91177308-0d34-0410-b5e6-96231b3b80d8

Update the load-store optimizer for changes to the operands on LDR_PRE_IMM and LDRB_PRE_IMM in r138653.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138746 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a test that wasn't testing the right thing.

The APFloat "Zero" test was actually calling the
APFloat(const fltSemantics &, integerPart) constructor, and EXPECT_EQ was
treating 0 and -0 as equal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138745 91177308-0d34-0410-b5e6-96231b3b80d8

Move non-intruction patterns to a more appropriate place!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138744 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for parsing #-0 on non-memory-operand immediate values, and add a testcase that necessitates it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138739 91177308-0d34-0410-b5e6-96231b3b80d8

Reapply r138695. Fix PassManager stack depths.

Patch by Xiaoyi Guo!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138737 91177308-0d34-0410-b5e6-96231b3b80d8

Add AMDIL as valid target triple to LLVM.

Submitted by: Villmow, Micah <Micah.Villmow@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138734 91177308-0d34-0410-b5e6-96231b3b80d8

Remove premature previous commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138725 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR5329: pay attention to constructor/destructor priority
when outputting them.  With this, the entire LLVM testsuite
passes when built with dragonegg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138724 91177308-0d34-0410-b5e6-96231b3b80d8

Encoding of instructions referencing segments has changed. Do what X86MCCodeEmitter does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138723 91177308-0d34-0410-b5e6-96231b3b80d8

Bitcasts are transitive. Bitcast-Bitcast-X becomes Bitcast-X.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138722 91177308-0d34-0410-b5e6-96231b3b80d8

Fix integer overflow bug in raw_ostream::write. This showed up as a
non-deterministic crash in the test suite. Fixes PR10055!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138717 91177308-0d34-0410-b5e6-96231b3b80d8

The 'expected' argument to EXPECT_EQ is actually the first one;
flip these tests around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138708 91177308-0d34-0410-b5e6-96231b3b80d8

Silence GCC warnings and make an array const.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138706 91177308-0d34-0410-b5e6-96231b3b80d8

Report failure if there are less bytes than requested in a MemoryObject.

Before we just left the remaining bytes uninitialized. This is another step in making llvm valgrind-clean again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138705 91177308-0d34-0410-b5e6-96231b3b80d8

Reverted r138652, valgrind doesn't understand obj:*/tblgen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138703 91177308-0d34-0410-b5e6-96231b3b80d8

Auto upgrade the old EH scheme to use the new one. This is on a trial basis. If
things to disasterously over night, this can be reverted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138702 91177308-0d34-0410-b5e6-96231b3b80d8

Reverting r138695 to see if it fixes clang self host.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138701 91177308-0d34-0410-b5e6-96231b3b80d8

Only delete instructions once.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138700 91177308-0d34-0410-b5e6-96231b3b80d8

Update to new EH scheme.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138699 91177308-0d34-0410-b5e6-96231b3b80d8

Cannot have an llvm.eh.exception call in a non-landing pad block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138698 91177308-0d34-0410-b5e6-96231b3b80d8

These splits should be done whether they are critical edges or not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138697 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PassManager stack depths.

Patch by Xiaoyi Guo!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138695 91177308-0d34-0410-b5e6-96231b3b80d8

Excluding ARM JIT tests until someone can fix this compilation path.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138676 91177308-0d34-0410-b5e6-96231b3b80d8

Improve encoding support for BLX with immediat eoperands, and fix a BLX decoding bug this uncovered.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138675 91177308-0d34-0410-b5e6-96231b3b80d8

Correct encoding of BL with immediate offset.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138673 91177308-0d34-0410-b5e6-96231b3b80d8

ARM assembly parsing tweak for pldw.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138669 91177308-0d34-0410-b5e6-96231b3b80d8

Spelling fail.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138667 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb2 assembler parsing and encoding of IT instruction.

This handles only the handling of the IT instruction itself, not the
processing and validation of the instructions in the IT block. That's next,
and will include encoding tests for IT itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138665 91177308-0d34-0410-b5e6-96231b3b80d8

Update the dominator tree with the correct dominator for the new 'unwind' block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138664 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for generating CMPXCHG16B on x86-64 for the cmpxchg IR instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138660 91177308-0d34-0410-b5e6-96231b3b80d8

Split the landing pad block only if it's a critical edge. Also intelligently
split it in the other place where we're splitting critical edges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138658 91177308-0d34-0410-b5e6-96231b3b80d8

Fix ARM codegen breakage caused by r138653.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138657 91177308-0d34-0410-b5e6-96231b3b80d8

Revert r138606 until LowerInvoke has been converted to the new EH scheme.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138656 91177308-0d34-0410-b5e6-96231b3b80d8

Whitespace and 80-col.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138654 91177308-0d34-0410-b5e6-96231b3b80d8

invalid-LDR_PRE-arm.txt was already passing, but for the wrong reasons.  We were failing to specify enough fixed bits of LDR_PRE/LDRB_PRE, resulting in decoding conflicts.  Separate them into immediate vs. register versions, allowing us to specify the necessary fixed bits.  This in turn results in the test being decoded properly, and being rejected as UNPREDICTABLE rather than a hard failure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138653 91177308-0d34-0410-b5e6-96231b3b80d8

valgrind: Always suppress tblgen leaks.

I'll clean up the rest of the XFAIL: vg_leak lines if this works.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138652 91177308-0d34-0410-b5e6-96231b3b80d8

Don't sink landingpad instructions during ind-var simplification.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138651 91177308-0d34-0410-b5e6-96231b3b80d8

Use %% for literals in RUN lines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138647 91177308-0d34-0410-b5e6-96231b3b80d8

Update for feedback from Jim.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138642 91177308-0d34-0410-b5e6-96231b3b80d8

lit: Add %T as a replacement for the output directory

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138640 91177308-0d34-0410-b5e6-96231b3b80d8

ARMDisassembler: Always return a size, even when disassembling fails.

This should fix PR10772.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138636 91177308-0d34-0410-b5e6-96231b3b80d8

Support an extension of ARM asm syntax to allow immediate operands to ADR instructions.  This is helpful for disassembler testing, and indeed exposed a disassembler bug that is also fixed here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138635 91177308-0d34-0410-b5e6-96231b3b80d8

We don't care if TableGen leaks memory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138634 91177308-0d34-0410-b5e6-96231b3b80d8

Don't insert branch hint lables that are never used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138630 91177308-0d34-0410-b5e6-96231b3b80d8

Add a testcase for r138625.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138626 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR10755 by checking for invalid predicate codes from UNPREDICTABLE t2IT instructions when decoding their successors.
This is the last disassembly crash detected by exhaustive Thumb2 instruction space.  Major thanks to Chandler Carruth for making this kind of exhaustive testing possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138625 91177308-0d34-0410-b5e6-96231b3b80d8

Fix disassembling of VCVTSD2SI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138623 91177308-0d34-0410-b5e6-96231b3b80d8

LoopInfo::updateUnloop fix, and verify Block->Loop maps.

Fixes an oversight, and adds verification to catch it in the unloop.ll tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138622 91177308-0d34-0410-b5e6-96231b3b80d8

Atomic load/store on ARM/Thumb.

I don't really like the patterns, but I'm having trouble coming up with a
better way to handle them.

I plan on making other targets use the same legalization
ARM-without-memory-barriers is using... it's not especially efficient, but
if anyone cares, it's not that hard to fix for a given target if there's
some better lowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138621 91177308-0d34-0410-b5e6-96231b3b80d8

Address review comments.

- Reword comments.
- Allow undefined behavior interfering with undefined behavior.
- Add address space checks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138619 91177308-0d34-0410-b5e6-96231b3b80d8

SimplifyCFG: If we have a PHI node that can evaluate to NULL and do a load or store to the address returned by the PHI node then we can consider this incoming value as dead and remove the edge pointing there, unless there are instructions that can affect control flow executed in between.

In theory this could be extended to other instructions, eg. division by zero, but it's likely that it will "miscompile" some code because people depend on div by zero not trapping. NULL pointer dereference usually leads to a crash so we should be on the safe side.

This shrinks the size of a Release clang by 16k on x86_64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138618 91177308-0d34-0410-b5e6-96231b3b80d8

Update to the new EH scheme.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138606 91177308-0d34-0410-b5e6-96231b3b80d8

Look at only the terminators of the basic block. Also, if we're using the new EH
scheme, return 'true' so that it doesn't try to run the old EH scheme's fixup on
the new code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138605 91177308-0d34-0410-b5e6-96231b3b80d8

Initial check in that will auto-upgrade the old EH scheme to the new EH scheme.

This upgrade suffers from the problems of the old EH scheme - i.e., that the
calls to llvm.eh.exception() and llvm.eh.selector() can wander off and get
lost. It makes a valiant effort to reclaim these little lost lambs.

This is a first draft, so it hasn't yet been hooked up to the parser.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138602 91177308-0d34-0410-b5e6-96231b3b80d8

Do the same as r138461. Mark VZEROALL as clobbering all YMM registers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138592 91177308-0d34-0410-b5e6-96231b3b80d8

Remove stray fullstop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138589 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for AVX 256-bit version of MOVDDUP!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138588 91177308-0d34-0410-b5e6-96231b3b80d8

Make isMOVDDUP mask check more strict and update comments!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138587 91177308-0d34-0410-b5e6-96231b3b80d8

Constify Comparison

Make ConstantInt::uge() const so it may be used in const contexts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138579 91177308-0d34-0410-b5e6-96231b3b80d8

Port over additional encoding tests to decoding tests, and fix an operand ordering bug this exposed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138575 91177308-0d34-0410-b5e6-96231b3b80d8

Intel family 6 model 44 is Gulftown/Westmere-EP and doesn't have AVX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138573 91177308-0d34-0410-b5e6-96231b3b80d8

ARM fix for missing implicit operands on ldmia_ret.

rdar://10005094: miscompile of 176.gcc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138568 91177308-0d34-0410-b5e6-96231b3b80d8

whitespace

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138566 91177308-0d34-0410-b5e6-96231b3b80d8

Explicitly disallow predication in Thumb1 assembly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138562 91177308-0d34-0410-b5e6-96231b3b80d8

Add more missing TB encodings to VEX instructions to allow them to be disassembled. Fixes remainder of PR10678.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138553 91177308-0d34-0410-b5e6-96231b3b80d8

Give ATTR_VEX higher priority when generating the disassembler context table. Fixes disassembling of VEX instructions with 'pp'=00. Fixes subset of PR10678.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138552 91177308-0d34-0410-b5e6-96231b3b80d8

Add TB encoding to VEROALL, VZEROUPPER, and VCVTPS2PD to allow them to be disassembled. Fixes PR10723.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138551 91177308-0d34-0410-b5e6-96231b3b80d8

LSR wants to split the landing pad's critical edge. Let it do it, but use the
proper function to do it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138550 91177308-0d34-0410-b5e6-96231b3b80d8

Initialize member variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138548 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for 256-bit versions of VSHUFPD and VSHUFPS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138546 91177308-0d34-0410-b5e6-96231b3b80d8

Add memory version of SHUFPD to mask decoding!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138545 91177308-0d34-0410-b5e6-96231b3b80d8

Remove empty directories.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138542 91177308-0d34-0410-b5e6-96231b3b80d8

Update tests to the newest EH syntax.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138541 91177308-0d34-0410-b5e6-96231b3b80d8

Hide -global-merge option.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138540 91177308-0d34-0410-b5e6-96231b3b80d8

Add feature test for the new exception handling stuff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138539 91177308-0d34-0410-b5e6-96231b3b80d8

When inserting new instructions, use getFirstInsertionPt instead of
getFirstNonPHI so that it will skip over the landingpad instructions as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138537 91177308-0d34-0410-b5e6-96231b3b80d8

Add a command line option to disable global merge pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138536 91177308-0d34-0410-b5e6-96231b3b80d8

Remove a out-of-place comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138534 91177308-0d34-0410-b5e6-96231b3b80d8

Create a section for non-instructions patterns in the beginning of the
file, and move more code around!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138521 91177308-0d34-0410-b5e6-96231b3b80d8

Move code around!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138520 91177308-0d34-0410-b5e6-96231b3b80d8

Organize UNPCK* patterns, also add remaining for AVX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138519 91177308-0d34-0410-b5e6-96231b3b80d8

Move remaining MOVDDUP patterns close to MOVDDUP defintion and duplicate
the missing ones for AVX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138518 91177308-0d34-0410-b5e6-96231b3b80d8

Organize and tidy up MOVDDUP section. Also update comments!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138517 91177308-0d34-0410-b5e6-96231b3b80d8

Move MOVHLPS patterns close to MOVHLPS definition, and duplicate the
pattern for 128-bit AVX mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138516 91177308-0d34-0410-b5e6-96231b3b80d8

Move all PSHUF* patterns close to the PSHUF* definitions. Also be
explicit about which subtarget they refer to, and add AVX versions of
the ones we currently don't. Remove old and now wrong comments!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138515 91177308-0d34-0410-b5e6-96231b3b80d8